With Particular Electrode Configuration Patents (Class 257/448)
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Patent number: 7872237Abstract: Embodiments of the invention are concerned with semiconductor circuit substrates for use in a radiation detection device, said radiation detection device comprising a detector substrate having a plurality of detector cells arranged to generate charge in response to incident radiation, each of said detector cells including at least one detector cell contact for coupling charge from said detector cell to said semiconductor circuit substrate.Type: GrantFiled: October 27, 2003Date of Patent: January 18, 2011Assignee: IPL Intellectual Property Licensing LimitedInventors: Kimmo Puhakka, Iain Benson
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Patent number: 7872324Abstract: Provided is a suspended nanowire sensor having good sensing characteristics and suitable for mass production, a method for fabricating the suspended nanowire sensor. The suspended nanowire sensor includes: first and second sensor electrodes formed on upper portions of a substrate and physically separated from each other; and a nanowire sensor material piece extending from the first sensor electrode to the second sensor electrode and physically suspended between the first and second sensor electrodes.Type: GrantFiled: October 31, 2007Date of Patent: January 18, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Yong-Shin Kim, Youn-Tae Kim, Duck-Gun Park
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Patent number: 7851880Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.Type: GrantFiled: November 26, 2007Date of Patent: December 14, 2010Assignee: Sony CorporationInventors: Masami Suzuki, Yoshimichi Harada, Yoshihiro Nabe, Yuji Takaoka, Masaaki Takizawa, Chiaki Sakai
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Patent number: 7851836Abstract: A photosensor includes a semiconductor thin film for photoelectric conversion having a first side portion and a second side portion. A source electrode extends in the longitudinal direction of the semiconductor thin film and has a side edge portion that overlaps the first side portion of the semiconductor thin film, and a drain electrode extends in the longitudinal direction and has a side edge portion that overlaps the second side portion of the semiconductor thin film. At least one of the side edge portions of the source and drain electrodes has protruding portions which are arranged along the longitudinal direction and which overlap the semiconductor thin film, and notched portions formed between the protruding portions. An ohmic contact layer is formed between the semiconductor thin film and the protruding portions of the at least one of the side edge portions of the source and drain electrodes.Type: GrantFiled: December 20, 2007Date of Patent: December 14, 2010Assignee: Casio Computer Co., Ltd.Inventors: Hiroshi Matsumoto, Ikuhiro Yamaguchi, Hirokazu Kobayashi
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Patent number: 7843061Abstract: The electrodes (7) and the contact zones (15) are structured in a film of a transparent conductive oxide (TCO), deposited on a transparent support (1) possibly coated with an intermediate film (3), while being separated by dielectric spaces (9) formed by nano fissures (11) obtained by UV radiation and passing through the TCO film. A protective film (13) can coat the electrodes (7) and the dielectric spaces (9).Type: GrantFiled: November 30, 2004Date of Patent: November 30, 2010Assignee: Asulab S.A.Inventors: Gian-Carlo Poli, Joachim Grupp, Pierre-Yves Baroni
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Patent number: 7834359Abstract: The invention enhances a production yield of a display device (an electro-optical device). The invention provides a method of manufacturing an electro-optical device including a display region in which a plurality of basic pixels are arranged, each basic pixel including a plurality of color pixels. The method includes: forming on a first substrate lines to drive a plurality of electro-optical elements respectively constituting the color pixels, correspondingly to the arrangement of the basic pixels; forming on a second substrate, as a chip to be transferred to each basic pixel, a drive circuit to drive the plurality of electro-optical elements which constitutes the plurality of color pixels of the basic pixels to obtain a plurality of basic-pixel driving chips; and transferring step of transferring the respective basic-pixel driving chips from the second substrate onto the first substrate, and connecting the drive circuits to regions of the lines corresponding to the basic pixels.Type: GrantFiled: December 18, 2006Date of Patent: November 16, 2010Assignee: Seiko Epson CorporationInventor: Mutsumi Kimura
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Patent number: 7834413Abstract: The present invention relates to a semiconductor photodetector and the like that can be made adequately compact while maintaining mechanical strength. The semiconductor photodetector includes a structural body of layers and a glass substrate. The structural body of layers is arranged from an antireflection film, a high-concentration carrier layer of an n-type (first conductive type), a light absorbing layer of the n-type, and a cap layer of the n-type that are laminated successively. The glass substrate is adhered via a silicon oxide film onto the antireflection film side of the structural body of layers. The glass substrate is optically transparent to incident light.Type: GrantFiled: November 30, 2004Date of Patent: November 16, 2010Assignee: Hamamatsu Photonics K.K.Inventor: Akimasa Tanaka
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Patent number: 7826738Abstract: A first image data interface section is disposed in an electrode region and an input/output buffer region provided along a first side of a semiconductor chip. A second image data interface section is disposed in an electrode region and an input/output buffer region provided along a second side. A first memory interface section is disposed in an electrode region and an input/output buffer region provided along a third side. A second memory interface section is disposed in an electrode region and an input/output buffer region provided along a fourth side.Type: GrantFiled: January 2, 2008Date of Patent: November 2, 2010Assignee: Seiko Epson CorporationInventors: Chisato Higuchi, Yoshinobu Amano
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Patent number: 7825328Abstract: A backside illuminated multi-junction solar cell module includes a substrate, multiple multi-junction solar cells, and a cell interconnection that provides a series connection between at least two of the multi-junction solar cells. The substrate may include a material that is substantially transparent to solar radiation. Each multi-junction solar cell includes a first active cell, grown over the substrate, for absorbing a first portion of the solar radiation for conversion into electrical energy and a second active cell, grown over the first active cell, for absorbing a second portion of the solar radiation for conversion into electrical energy. At least one of the first and second active cells includes a nitride.Type: GrantFiled: February 14, 2008Date of Patent: November 2, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jizhong Li
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Patent number: 7820475Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.Type: GrantFiled: December 20, 2006Date of Patent: October 26, 2010Assignee: Sunpower CorporationInventors: Denis De Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
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Patent number: 7816753Abstract: An optical device with an iridium oxide (IrOx) electrode neural interface, and a corresponding fabrication method are provided. The method provides a substrate and forms a first conductive electrode overlying the substrate. A photovoltaic device having a first electrical interface is connected to the first electrode. A second electrical interface of the photovoltaic device is connected to a second conductive electrode formed overlying the photovoltaic device. An array of neural interface single-crystal IrOx nanostructures are formed overlying the second electrode, where x?4. The IrOx nanostructures can be partially coated with an electrical insulator, such as SiO2, SiN, TiO2, or spin on glass (SOG), leaving the IrOx distal ends exposed. In one aspect, a buffer layer is formed overlying the second electrode surface, made from a material such as LiNbO3, LiTaO3, or SA, for the purpose of orienting the growth direction of the IrOx nanostructures.Type: GrantFiled: September 29, 2008Date of Patent: October 19, 2010Assignee: Sharp Laboratories of America, Inc.Inventors: Fengyan Zhang, Sheng Teng Hsu
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Patent number: 7808064Abstract: An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.Type: GrantFiled: July 23, 2009Date of Patent: October 5, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Atsuko Kawasaki, Mie Matsuo, Ikuko Inoue, Masayuki Ayabe, Masahiro Sekiguchi, Kazumasa Tanida
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Patent number: 7804149Abstract: The present invention provides methods of forming metal oxide semiconductor nanostructures and, in particular, zinc oxide (ZnO) semiconductor nanostructures, possessing high surface area, plant-like morphologies on a variety of substrates. Optoelectronic devices, such as photovoltaic cells, incorporating the nanostructures are also provided.Type: GrantFiled: April 2, 2007Date of Patent: September 28, 2010Assignee: The University of Utah Research FoundationInventors: Ashutosh Tiwari, Michael R. Snure
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Patent number: 7791159Abstract: A solid-state imaging device comprises an imaging region, a peripheral circuit region formed in an outer peripheral portion of the imaging region, a first conductivity type semiconductor substrate having the imaging region and the peripheral circuit region on a main surface thereof, a second conductivity type first semiconductor layer formed in the semiconductor substrate, a first conductivity type second semiconductor layer formed in first semiconductor layer, a through electrode formed in a through hole penetrating through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a pad portion formed on the semiconductor substrate and connected to the through electrode. The through hole penetrates through a first conductivity type region of the semiconductor substrate.Type: GrantFiled: October 30, 2008Date of Patent: September 7, 2010Assignee: Panasonic CorporationInventor: Toshihiro Kuriyama
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Patent number: 7786545Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.Type: GrantFiled: August 3, 2009Date of Patent: August 31, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Seoung Hyun Kim
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Patent number: 7786543Abstract: A MOS or CMOS based active pixel sensor with special sampling features to substantially eliminate clock noise. The sensor includes an array of pixels fabricated in or on a substrate, each pixel defining a charge collection node on which charges generated inside a photodiode region are collected, a charge integration node, at which charges generated in said pixel are integrated to produce pixel signals, a charge sensing node from which reset signals and the pixel signals are sensed. In preferred embodiments the sensor includes a continuous electromagnetic radiation detection structure located above the pixel circuits providing a photodiode region for each pixel. The sensor includes integrated circuit elements adapted to maintain voltage potentials of the charge integration nodes substantially constant during charge integration cycles. The sensor also includes integrated circuit elements having electrical capacitance adapted to store charges providing an electrical potential at the charge integration node.Type: GrantFiled: August 17, 2007Date of Patent: August 31, 2010Assignee: e-PhocusInventor: Tzu-Chiang Hsieh
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Patent number: 7781857Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.Type: GrantFiled: March 23, 2009Date of Patent: August 24, 2010Assignee: AU Optronics Corp.Inventors: Shih-Chyuan Fan Jiang, Ching-Huan Lin, Chih-Ming Chang
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Publication number: 20100207228Abstract: A solid-state imaging device comprises an imaging region, a peripheral circuit region formed in an outer peripheral portion of the imaging region, a first conductivity type semiconductor substrate having the imaging region and the peripheral circuit region on a main surface thereof, a second conductivity type first semiconductor layer formed in the semiconductor substrate, a first conductivity type second semiconductor layer formed in first semiconductor layer, a through electrode formed in a through hole penetrating through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a pad portion formed on the semiconductor substrate and connected to the through electrode. The through hole penetrates through a first conductivity type region of the semiconductor substrate.Type: ApplicationFiled: May 3, 2010Publication date: August 19, 2010Applicant: Panasonic CorporationInventor: Toshihiro KURIYAMA
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Patent number: 7763888Abstract: To reduce white spots by optimizing an impurity concentration of a p-type impurity doped region of a well contact, a size of a contact portion, a position of an n-type region serving as a photoelectric converter, and so on. In a solid state image pickup device in which a semiconductor substrate 11 includes a pixel region where a plurality of pixels are arranged, each pixel including a photoelectric converter 21, and a pixel well 12 shared by the respective pixels, a well contact 14 supplying a reference voltage to the pixel well 12 includes: an electrode 15 supplying a reference voltage; a p-type impurity doped region 16 placed in a surface of the pixel well 12; and a contact portion 17 placed in the p-type impurity doped region 16 so as to be connected to the electrode 15 and having a higher concentration than the p-type impurity doped region 16. The p-type impurity doped region 16 is doped with at least a p-type impurity, with an impurity concentration of 1×1019 cm?3 or less.Type: GrantFiled: August 22, 2005Date of Patent: July 27, 2010Assignee: Sony CorporationInventors: Toshifumi Wakano, Keiji Mabuchi, Takashi Nakashikiryo, Kazunari Matsubayashi
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Patent number: 7755158Abstract: An image sensor includes a semiconductor substrate having a pixel region and a peripheral circuit region. An interlayer dielectric layer has metal wirings and a pad formed over the semiconductor substrate. A lower electrode is selectively formed over the metal wirings. A photo diode is formed over the interlayer dielectric layer of the pixel region. An upper electrode formed over the photo diode. Therefore, a vertical integration of the transistor and the photodiode may approach a fill factor to 100%, and provide higher sensitivity, implement more complicated circuitry without reducing sensitivity in each unit pixel, improve the reliability of the image sensor by preventing crosstalk, etc., between the pixels, and improve light sensitivity by increasing the surface area of the photo diode in the unit pixel.Type: GrantFiled: December 31, 2007Date of Patent: July 13, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Min Hyung Lee
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Patent number: 7750285Abstract: An optical sensor is characterized by comprising a photoconductive material (1) which generates a carrier (4) inside when irradiated with a light or an electromagnetic wave (3), and carbon nanotube (2), and by sensing the carrier (4), which is generated within the photoconductive material (1) by irradiation of the light or electromagnetic wave (3), through change of electrical conduction of the carbon nanotube (2).Type: GrantFiled: July 15, 2004Date of Patent: July 6, 2010Assignees: Japan Science and Technology Agency, National Institute of Advanced Industrial Science and TechnologyInventors: Yasushi Nagamune, Kazuhiko Matsumoto
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Publication number: 20100165161Abstract: A photoelectric conversion apparatus includes: a first photoelectric conversion element generating a current by photoelectric conversion; a first current amplifying element for amplifying the current generated by the first photoelectric conversion element; a first detecting unit for detecting a reverse bias voltage value of the first photoelectric conversion element; and a first setting unit for setting the reverse bias voltage value of the first photoelectric conversion element at a first normal value based on a result of the detection by the first detecting unit, wherein the first normal value is larger than a depleting voltage of the first photoelectric conversion element.Type: ApplicationFiled: December 1, 2009Publication date: July 1, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Hideo Kobayashi, Tomohisa Kinugasa
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Patent number: 7745857Abstract: The object of the invention is to provide a semiconductor device that can form photodiodes that do not short circuit, without damage that causes leakage, despite formation of the opening part, and its manufacturing method. The second semiconductor layer (12, 16) of the second conductivity type is formed on the main surface of the first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) formed at least on the second semiconductor layer separate the device into the regions of plural photodiodes (PD1-PD4). Conductive layer 18 is formed on the second semiconductor layer 16 in a pattern that is divided for each of the photodiodes and is connected to the second semiconductor layer 16 along the outer periphery with respect to all of the plural photodiodes. Insulation layer (19, 21) is formed on the entire surface to cover conductive layer 18.Type: GrantFiled: March 29, 2006Date of Patent: June 29, 2010Assignee: Texas Instruments IncorporatedInventors: Yohichi Okumura, Hiroyuki Tomomatsu
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Publication number: 20100148296Abstract: Storage capacitors Ctd and Cts are provided alternately side by side sequentially in a row direction. Each of the storage capacitors Ctd and Cts has an electrode layer 21 constituting a signal electrode and an upper side electrode layer 23 and a lower side electrode layer 28 constituting a fixed potential electrode. The signal electrodes of the respective storage capacitors Ctd and Cts are electrically independent of each other. The fixed potential electrodes of the respective storage capacitors Ctd and Cts are electrically connected to each other and connected to the ground etc. Contact holes 26a and 26b that connect the electrode layers 23 and 28 are provided between the electrode layers 21 of the neighboring storage capacitors Ctd and Cts so as to occupy 52% or more of the opposed area of the second electrode sections of two neighboring storage capacitors.Type: ApplicationFiled: February 19, 2010Publication date: June 17, 2010Applicant: NIKON CORPORATIONInventor: Atsushi KOMAI
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Patent number: 7727794Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.Type: GrantFiled: March 10, 2004Date of Patent: June 1, 2010Assignee: Hamamatsu Photonics K.K.Inventor: Katsumi Shibayama
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Patent number: 7714403Abstract: An image sensor using a back-illuminated photodiode and a manufacturing method thereof are provided. According to the present invention, since a surface of the back-illuminated photodiode can be stably treated, the back-illuminated photodiode can be formed to have a low dark current, a constant sensitivity of blue light for all photodiodes, and high sensitivity. In addition, it is possible to manufacture an image sensor with high density by employing a three dimensional structure in which a photodiode and a logic circuit are separately formed on different substrates.Type: GrantFiled: June 14, 2007Date of Patent: May 11, 2010Assignee: Siliconfile Technologies Inc.Inventors: Byoung Su Lee, Jun Ho Won
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Patent number: 7709868Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.Type: GrantFiled: October 4, 2007Date of Patent: May 4, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Jin Pak, Hyung-Guel Kim, Kee-Han Uh, Jong-Whan Cho, Jin Jeon, Young-Bae Jung
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Patent number: 7709917Abstract: A solid state imaging device comprises: a photoelectric converting portion; a charge transferring portion including a charge transfer electrode for transferring an electric charge generated in the photoelectric converting portion; and a shielding film formed through an insulating film containing nitrogen on the charge transferring portion, wherein the insulating film containing the nitrogen includes: a first insulating film that covers at least a part of an upper surface of the charge transfer electrode; and a second insulating film formed to reach the upper surface of the charge transfer electrode from the photoelectric converting portion, and the first and second insulating films include a discontinuing portion.Type: GrantFiled: November 27, 2007Date of Patent: May 4, 2010Assignee: Fujifilm CorporationInventor: Noriaki Suzuki
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Patent number: 7701027Abstract: A method and apparatus for a photoinduced electromotive force sensor. The sensor has an active substrate formed of a semi-insulating photoconductor with sufficient carrier trap density to form an effective charge grating and pairs of electrodes disposed on the active substrate, where the sensor is configured to reduce the photovoltaic effect caused by the incident light in the vicinity of the electrodes. The shape or composition of the electrodes may be selected to reduce the photovoltaic effect or the electrodes may be disposed on the substrate to average out the photovoltaic effect arising from each one of the electrodes.Type: GrantFiled: March 3, 2006Date of Patent: April 20, 2010Assignee: HRL Laboratories, LLCInventors: David M. Pepper, Gilmore J. Dunning, Marvin B. Klein, Gerald David Bacher, Bruno Pouet
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Patent number: 7687870Abstract: A laterally configured electrooptical device including: a substrate having a surface; a first semiconductor layer of a first type semiconductor material; a second semiconductor layer formed of a second type semiconductor material different from the first type semiconductor material; a first electrode; and a second electrode. The lower surface of the first semiconductor layer is coupled to a section of the surface of the substrate. The lower surface of the second semiconductor layer is coupled to the upper surface of the first semiconductor layer to form a junction. The first electrode is directly electrically coupled to one side of the first semiconductor layer and the second electrode is directly electrically coupled to an opposite side of the second semiconductor layer. These electrodes are configured such that the lower surface of the first semiconductor layer and/or the upper surface of the second semiconductor layer are substantially unoccluded by them.Type: GrantFiled: December 29, 2006Date of Patent: March 30, 2010Assignees: Panasonic Corporation, Cornell Research Foundation, Inc.Inventors: Hon Hang Fong, George G. Malliaras, Kiyotaka Mori
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Publication number: 20100065939Abstract: The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises a photodiode array and method of manufacturing a photodiode array that provides for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased flexibility in application.Type: ApplicationFiled: September 15, 2009Publication date: March 18, 2010Inventors: Peter Steven Bui, Narayan Dass Taneja
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Patent number: 7679662Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.Type: GrantFiled: November 9, 2006Date of Patent: March 16, 2010Assignee: Sony CorporationInventors: Sadamu Suizu, Masaaki Takayama
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Publication number: 20100059846Abstract: Provided are image sensors and methods of manufacturing the same. An image sensor includes a metal line and an interlayer insulation layer on a semiconductor substrate including a readout circuit; an image detection unit on the interlayer insulation layer and including stacked first and second doping layers; a pixel separation unit penetrating the image detection unit, separating the image detection unit by pixel; a first metal contact penetrating the image detection unit and the interlayer insulation layer to contact the metal line; a first barrier pattern protecting the first metal contact from contacting the second doping layer, while exposing the first metal contact to the first doping layer; and a second metal contact in a trench above the first metal contact, wherein the second metal contact is electrically connected to the second doping layer while being isolated from the first metal contact by a second barrier pattern.Type: ApplicationFiled: September 3, 2009Publication date: March 11, 2010Inventor: TAE GYU KIM
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Patent number: 7671391Abstract: A lower cost range-finding image sensor based upon measurement of reflection time of light with reduced fabrication processes compared to standard CMOS manufacturing procedures. An oxide film is formed on a silicon substrate, and two photo-gate electrodes for charge-transfer are provided on the oxide film. Floating diffusion layers for taking charges out from a photodetector layer are provided at the ends of the oxide film, and on the outside thereof are provided a gate electrode for resetting and a diffusion layer for providing a reset voltage.Type: GrantFiled: February 14, 2005Date of Patent: March 2, 2010Assignee: National University Corporation Shizuoka UniversityInventor: Shoji Kawahito
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Patent number: 7663234Abstract: A package of a semiconductor device with a flexible wiring substrate and a method thereof are provided. The package of the semiconductor device includes a semiconductor substrate with at least one pad on a surface thereof, a bump bonded to the pad, an adhesive layer on the bump, and a flexible wiring substrate having at least one contact section being electrically connected with the bump by the adhesive layer. The present invention makes the flexible wiring substrate directly conductively attached onto the semiconductor substrate. The package size is shrunk and the cost down can be obtained.Type: GrantFiled: May 25, 2006Date of Patent: February 16, 2010Assignee: United Microelectronics Corp.Inventors: Joseph Sun, Kuang-Chih Cheng, Ming-Chieh Chen, Kevin Lee, Jui-Hsiang Pan
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Publication number: 20100032710Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.Type: ApplicationFiled: July 8, 2009Publication date: February 11, 2010Inventors: Peter Steven Bui, Narayan Dass Taneja
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Patent number: 7659594Abstract: A photo sensor including a gate, a first insulator, a semiconductor layer, a first electrode pattern layer, a second electrode pattern layer, a second insulator and a transparent electrode is provided. The gate is disposed on the substrate. The first insulator covers the gate and a portion of the substrate. The semiconductor layer is disposed on the first insulator above the gate. Moreover, there is a space between the first electrode pattern layer and the second electrode pattern layer located on the semiconductor layer. The second insulator covers a portion of the semiconductor layer, the first electrode pattern layer and the second electrode pattern layer. The transparent electrode is disposed on the second insulator above the semiconductor layer and corresponds to the first electrode pattern layer. The transparent electrode is electrically connected to the first electrode pattern layer, and a portion of the transparent electrode is within the space.Type: GrantFiled: October 28, 2008Date of Patent: February 9, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Meng-Chi Liou
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Patent number: 7659595Abstract: The present disclosure provide a microelectronic device. The microelectronic device includes a sensing element formed in the semiconductor substrate; a trench isolation feature formed in the semiconductor substrate; a bonding pad formed at least partially in the trench isolation feature; and interconnect features formed over the sensing element and the trench isolation feature, being coupled to the sensing element and the bonding pad, and isolated from each other by interlayer dielectric.Type: GrantFiled: July 16, 2007Date of Patent: February 9, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Gwo-Yuh Shiau, Chia-Shiung Tsai
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Patent number: 7652343Abstract: The reduction in size, noise and voltage is realized in a MOS solid-state imaging device. A gate electrode in a pixel part is formed in a two-level structure. An amplifier gate of an amplifier transistor is formed in the first level while a select gate of a select transistor is formed in the second level. The both are structurally partly overlapped. With the first-level amplifier gate as self-alignment, ions are implanted for a select gate in the second level. Although the gate electrode if formed in one level as in the conventional requires a space of nearly a design rule between the amplifier gate and the select gate, the structure of the invention can eliminate such a dead space. Meanwhile, because the diffusion layer does not exist between the amplifier gate and the select gate, the diffusion layer is eliminated of sheet resistance and voltage drop.Type: GrantFiled: October 13, 2004Date of Patent: January 26, 2010Assignee: Sony CorporationInventor: Keiji Mabuchi
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Patent number: 7649219Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a semiconductor substrate, a metal line layer, a first conduction type conducting layer, a first pixel isolation layer, an intrinsic layer, and second conduction type conducting layer. The semiconductor substrate includes a circuit region. The metal line layer including a plurality of metal lines and an interlayer insulating layer is formed on the semiconductor substrate. The first conductive layer having patterns separated from each other by the pixel isolation layer is formed on the metal lines. The first pixel isolation layer is formed between the separated patterns of the first conduction type conducting layer. The intrinsic layer is formed on the first conductive layer and the first pixel isolation layer. The second conduction type conducting layer is formed on the intrinsic layer.Type: GrantFiled: August 21, 2007Date of Patent: January 19, 2010Assignee: Dongbu Hitek Co., Ltd.Inventor: Seong Gyun Kim
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Publication number: 20090320909Abstract: An electro-optical device can include a plurality of semiconductor nanocrystals. In some circumstances, the device can omit an electron transporting layer.Type: ApplicationFiled: June 25, 2007Publication date: December 31, 2009Inventors: Alexi Arango, Vladimir Bulovic, David Oertel, Moungi G. Bawendi
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Publication number: 20090315086Abstract: An image sensor includes a first electrode for applying a voltage to a charge storage portion, a second electrode for applying a voltage to a charge increasing portion, a third electrode provided between the first electrode and the second electrode and an impurity region of a first conductive type for forming a path through which the signal charges are transferred, wherein an impurity concentration of a region of the impurity region corresponding to a portion located under the second electrode is higher than an impurity concentration of a region of the impurity region corresponding to a portion located under the third electrode.Type: ApplicationFiled: June 17, 2009Publication date: December 24, 2009Applicant: Sanyo Electric Co., Ltd.Inventors: Mamoru Arimoto, Kaori Misawa, Hayato Nakashima, Ryu Shimizu
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Patent number: 7635904Abstract: Apparatus and methods are provided for packaging IC (integrated circuit) chips to enable both optical access to the back side of an IC chip and electrical access to the front side of the IC chip.Type: GrantFiled: March 21, 2005Date of Patent: December 22, 2009Assignee: International Business Machines CorporationInventors: Alberto Tosi, Franco Stellari, Peilin Song
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Patent number: 7629663Abstract: This invention relates to an MSM type photo-detection device designed to detect incident light and comprising reflecting means (2) superposed on a support (1), to form a first mirror for a Fabry-Pérot type resonant cavity, a layer of material (3) that does not absorb light, an active layer (4) made of a semiconducting material absorbing incident light and a network (5) of polarization electrodes collecting the detected signal. The electrodes network is arranged on the active layer and is composed of parallel conducting strips at a uniform spacing at a period less than the wavelength of incident light, the electrodes network forming a second mirror for the resonant cavity, the optical characteristics of this second mirror being determined by the geometric dimensions of the said conducting strips. The distance separating the first mirror from the second mirror is determined to obtain a Fabry-Pérot type resonance for incident light between these two mirrors.Type: GrantFiled: July 24, 2003Date of Patent: December 8, 2009Assignee: Centre National de la Recherche ScientifiqueInventors: Fabrice Pardo, Stephane Collin, Jean-Luc Pelouard
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Patent number: 7626239Abstract: The invention relates to tunable wavelength-selective optical filters for letting light of a narrow optical spectrum band, centered around an adjustable wavelength, to pass through and to stop wavelengths lying outside this band. More particularly, the invention relates to a process for the collective fabrication of optical filtering components, consisting in producing a plurality of optical filtering components on a transparent substrate. The process further comprises covering the plurality of components with a transparent collective cover, in optically testing each component individually, and in separating the various components from one another. The invention also relates to a wafer of components, comprising a transparent substrate on which a plurality of optical filtering components has been produced, a transparent cover (8) collectively covering the components. The wafer further includes means for individually testing each component.Type: GrantFiled: May 16, 2003Date of Patent: December 1, 2009Assignee: Atmel Grenoble S.A.Inventors: Jean-Pierre Moy, Xavier Hugon
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Patent number: 7622780Abstract: An apparatus comprising a substrate having a probe suspension formed thereon, a see-saw probe coupled to the probe suspension, the see-saw probe including first and second ends, with a tip projecting from a side of the first end, and an actuation electrode formed on the substrate, the actuation electrode positioned to exert a force upon the second end of the see-saw probe. A process comprising forming a probe suspension on a substrate, coupling a see-saw probe to the probe suspension, the see-saw probe including first and second ends, with a tip projecting from a side of the first end, and forming an actuation electrode on the substrate, the actuation electrode positioned to exert a force upon the second end of the see-saw probe.Type: GrantFiled: December 21, 2006Date of Patent: November 24, 2009Assignee: Intel CorporationInventor: Tsung-Kuan Allen Chou
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Patent number: 7616904Abstract: A germanium on silicon waveguide photodetector disposed on a silicon on insulator (SOI) substrate. The photodetector is incorporated into a section of a planar silicon waveguide on the substrate. The photodetector generates an electric current as an infrared optical signal travels through the photodetector.Type: GrantFiled: February 23, 2007Date of Patent: November 10, 2009Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Giovanni Capellini
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Patent number: 7598583Abstract: An image sensor according to embodiments may include a first substrate having photodiode cells, a second substrate having a logic circuit, and connection electrodes that may electrically connect the photodiode cells with the logic circuit. In embodiments, more area may be available on the first substrate for photodiode cells and light loss may be reduced.Type: GrantFiled: July 24, 2007Date of Patent: October 6, 2009Assignee: Dongbu HiTek Co., Ltd.Inventor: Jae Won Han
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Patent number: 7592620Abstract: An active matrix organic light-emitting display device comprises a substrate, an active layer having a channel region and source and drain regions positioned on a predetermined region of the substrate. A first electrode is connected to one of the source and drain regions and extended onto the substrate, and has a multi-layer structure formed of at least one conductive layer. A second electrode is spaced from the first electrode to be connected to the other of the source and drain regions, and has the same stacked structure formed of conductive layer as the first electrode. An organic functional layer having at least an organic emission layer is positioned on the first electrode. A third electrode is positioned on the organic functional layer.Type: GrantFiled: August 25, 2004Date of Patent: September 22, 2009Assignee: Samsung Mobile Display Co., Ltd.Inventor: Mu-Hyun Kim
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Patent number: 7589388Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.Type: GrantFiled: October 19, 2007Date of Patent: September 15, 2009Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Yuichi Morita, Takashi Noma, Hiroyuki Shinogi, Shinzo Ishibe, Katsuhiko Kitagawa, Noboru Okubo, Kazuo Okada, Hiroshi Yamada