Abstract: A manufacturing method of a semiconductor device having a stacked structure in which a lower layer is exposed is provided without increasing the number of masks. A source electrode layer and a drain electrode layer are formed by forming a conductive film to have a two-layer structure, forming an etching mask thereover, etching the conductive film using the etching mask, and performing side-etching on an upper layer of the conductive film in a state where the etching mask is left so that part of a lower layer is exposed. The thus formed source and drain electrode layers and a pixel electrode layer are connected in a portion of the exposed lower layer. In the conductive film, the lower layer and the upper layer may be a Ti layer and an Al layer, respectively. The plurality of openings may be provided in the etching mask.

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

Abstract: A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.

Abstract: A semiconductor device includes: a transistor including an oxide semiconductor film; a first insulating film covering the oxide semiconductor film and including a first resin material; and a second insulating film including a second resin material that has polarity different from polarity of the first resin material, the second insulating film being laminated on the first insulating film.

Abstract: A semiconductor device with a novel structure is provided in which stored data can be held even when power is not supplied and the number of writing is not limited. The semiconductor includes a second transistor and a capacitor over a first transistor. The capacitor includes a source or drain electrode and a gate insulating layer of the second transistor and a capacitor electrode over an insulating layer which covers the second transistor. The gate electrode of the second transistor and the capacitor electrode overlap at least partly with each other with the insulating layer interposed therebetween. By forming the gate electrode of the second transistor and the capacitor electrode using different layers, an integration degree of the semiconductor device can be improved.

Abstract: The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.

Abstract: A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.

Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

Abstract: To provide a semiconductor element in which generation of oxygen vacancies in an oxide semiconductor thin film can be suppressed. The semiconductor element has a structure in which, in a gate insulating film, the nitrogen content of regions which do not overlap with a gate electrode is higher than the nitrogen content of a region which overlaps with the gate electrode. A nitride film has an excellent property of preventing impurity diffusion; thus, with the structure, release of oxygen in the oxide semiconductor film, in particular, in the channel formation region, to the outside of the semiconductor element can be effectively suppressed.

Abstract: A thin film transistor includes: a gate electrode and a pair of source and drain electrodes; and a semiconductor layer having a channel formed therein, and having a pair of connection sections connected to the pair of source and drain electrodes, respectively, wherein one or both of opposed surfaces of the pair of connection sections is a non-flat surface.

Abstract: A thin film transistor substrate includes: a polymer substrate, an oxide transparent electrode layer (TCO) formed on the polymer substrate, a barrier layer formed on the oxide transparent electrode layer, and a semiconductor layer formed on the barrier layer, in which the semiconductor layer is polysilicon. The polysilicon thin film transistor provides an oxide transparent electrode layer (TCO) which absorbs heat energy and light generated during a process of manufacturing the polysilicon thin film transistor to prevent a damage of the substrate using a polymer material.

Abstract: A method of fabricating a thin film transistor includes sequentially forming a first metal layer on a substrate and a second metal layer of copper on the first metal layer; performing a plasma process to form a copper nitride layer on the second metal layer; patterning the copper nitride layer, the second metal layer and the first metal layer to form a gate electrode; forming a first gate insulating layer of silicon nitride on the substrate including the gate electrode; forming a second gate insulating layer of silicon oxide on the first gate insulating layer; forming a semiconductor layer on the second gate insulating layer formed of an oxide semiconductor material; and forming a source electrode and a drain electrode on the semiconductor layer, the source electrode spaced apart from the drain electrode.

Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.

Abstract: An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode.

Abstract: Disclosed is an active matrix substrate (5) on which pixels, each having a thin film transistor (18) and a pixel electrode (19) connected to the thin film transistor (18), are disposed in a matrix, and that includes a base material (5a) on which the pixels in a matrix are formed. In a contact hole portion (H), by anodically oxidizing a three-layered metal film (metal film) (21), an anodic oxidation film (29) is formed on the three-layered metal film (21) so as to fill a contact hole of a protective layer (27), with an end portion of the anodic oxidation film (29) being placed under an insulating layer (28). In the contact hole portion (H), the pixel electrode (19) and the three-layered metal film (21) are connected to each other via the anodic oxidation film (29).

Abstract: A substrate includes a thin film transistor (TFT) which includes an active layer, a gate electrode, a source electrode, and a drain electrode; a first insulating layer disposed between the active layer and the gate electrode; a second insulating layer disposed between the gate electrode and the source and drain electrodes; a third insulating layer disposed on the second insulating layer, and including a first region for opening the second insulating layer and a second region for opening one of the source and drain electrodes, the first region and the second region being integrally connected; and a first electrode connected to one of the source and drain electrodes, and disposed so as to cover the first region and the second region.

Abstract: The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor in which the electric field hardly concentrates in the drain region. Another object is to provide a display device including such a transistor. End portions of first and second wiring layers having high electrical conductivity do not overlap with a gate electrode layer, whereby concentration of an electric field in the vicinity of a first electrode layer and a second electrode layer is reduced; thus, generation of hot carriers is suppressed. In addition, one of the first and second electrode layers having higher resistivity than the first and second wiring layers is used as a drain electrode layer.

Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.

Abstract: An electrochemically-gated field-effect transistor includes a source electrode, a drain electrode, a gate electrode, a transistor channel and an electrolyte. The transistor channel is located between the source electrode and the drain electrode. The electrolyte completely covers the transistor channel and has a one-dimensional nanostructure and a solid polymer-based electrolyte that is employed as the electrolyte.

Abstract: A flexible high-voltage thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a dielectric layer, and a flexible semiconductor layer. The flexible semiconductor layer serves as a channel for the transistor and is in electrical communication with the source electrode and the drain electrode. The drain electrode is laterally offset from the gate electrode. The dielectric layers is configured and arranged with respect to other elements of the transistor such that the transistor is stably operable to facilitate switching of relatively high drain voltages using relatively small controlling gate voltages.

Abstract: To reduce power consumption of a memory device. To reduce the area of a memory device. To reduce the number of transistors included in a memory device. The memory device includes a comparator comparing a first output signal with a second output signal, a first memory portion including a first oxide semiconductor transistor and a first silicon transistor, a second memory portion including a second oxide semiconductor transistor and a second silicon transistor, and an output potential determiner determining a potential of the first output signal and a potential of the second output signal. One of a source and a drain of the first oxide semiconductor transistor is electrically connected to a gate of the first silicon transistor. One of a source and a drain of the second oxide semiconductor transistor is electrically connected to a gate of the second silicon transistor.

Abstract: A semiconductor device comprising a circuit including a plurality of thin film transistors and at least one diode (D2a), wherein: the plurality of thin film transistors have the same conductivity type; when the conductivity type of the plurality of thin film transistors is an N type, a cathode-side electrode of the diode (D2a) is connected to a line (550) connected to a gate of a selected one of the plurality of thin film transistors; when the conductivity type of the plurality of thin film transistors, an anode-side electrode of the diode is connected to a line (550) connected to a gate of a selected one of the plurality of thin film transistors; and another diode arranged so that a current flow direction thereof is opposite to that of the diode (D2a) is not formed on the line (550). Thus, it is possible to suppress damage to a thin film transistor due to ESD while suppressing the increase in circuit scale from conventional techniques.

Abstract: An object is to suppress change of a threshold voltage of a transistor in a shift register and to prevent the transistor from malfunctioning during a non-selection period. A pulse output circuit provided in the shift register regularly supplies a potential to a gate electrode of a transistor which is in a floating state so that the gate electrode is turned on during a non-selection period when a pulse is not outputted. In addition, supply of a potential to the gate electrode of the transistor is performed by turning on or off another transistor regularly.

Abstract: A thin film transistor (TFT) comprises: an active layer formed on a substrate; a gate insulating layer formed on the active layer; a gate electrode including a first gate region and a second gate region formed on portions of the gate insulating layer and spaced apart with a separation region interposed therebetween; an interlayer insulating layer formed on the gate insulating layer and the gate electrode, and having an opening formed to expose portions of the gate insulating layer and the gate electrode around the separation region; a gate connection electrode formed on the interlayer insulating layer and connected to the first gate region and the second gate region through the opening; and source and drain electrodes formed on the interlayer insulating layer. The TFT and the OLED display device have excellent driving margin without a spatial loss.

Abstract: A semiconductor element having high mobility, which includes an oxide semiconductor layer having crystallinity, is provided. The oxide semiconductor layer includes a stacked-layer structure of a first oxide semiconductor film and a second oxide semiconductor film having a wider band gap than the first oxide semiconductor film, which is in contact with the first oxide semiconductor film. Thus, a channel region is formed in part of the first oxide semiconductor film (that is, in an oxide semiconductor film having a smaller band gap) which is in the vicinity of an interface with the second oxide semiconductor film. Further, dangling bonds in the first oxide semiconductor film and the second oxide semiconductor film are bonded to each other at the interface therebetween. Accordingly, a decrease in mobility resulting from an electron trap or the like due to dangling bonds can be reduced in the channel region.

Abstract: A methodology enabling the formation of steep channel profiles for devices, such as SSRW FETs, having a resultant channel profiles that enables suppression of threshold voltage variation and the resulting device are disclosed. Embodiments include providing STI regions in a silicon wafer; performing a deep well implantation of a dopant into the silicon wafer between STI regions; forming a recess in the doped silicon wafer between the STI regions; performing a shallow well implantation of the dopant into the silicon wafer in the recess; and forming Si:C on the doped silicon wafer in the recess.

Abstract: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

Abstract: There is provided a semiconductor device including a first conductive layer, an insulating layer, a second conductive layer, a channel layer, a passivation layer and a third conductive layer. The insulating layer covers the first conductive layer. The second conductive layer is formed on the insulating layer and has an inner opening. The channel layer is formed on the inner opening of the second conductive layer to fully cover the inner opening. The passivation layer is formed upon the channel layer to cover the channel layer and has a contact hole inside the inner opening of the second conductive layer. The third conductive layer is formed in the contact hole.

Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a semi-conductive layer, a gate insulator, a source and a drain. The gate insulator is located between the gate and the semi-conductive layer. A light shows a specific color after passing through the gate insulator. The source and the drain are disposed on the semi-conductive layer. A pixel structure and a liquid crystal display panel having the pixel structure are also provided. The liquid crystal display panel can display colorful images without disposing a color filter array additionally so that the manufacturing process of the liquid crystal panel is simple and the manufacturing cost of the liquid crystal panel is low.

Abstract: Embodiments of the disclosed technology provide to a thin film transistor array substrate comprising a first base substrate; a gate line formed on the first base substrate; and two data lines separately formed on the first base substrate; wherein the two data lines are located on both sides of the gate line respectively in the direction of data signal transmission but do not overlap with the gate line. The two data lines can be electrically connected through conductive elements for transmitting data signals.

Abstract: The present disclosure relates to a method of forming an epitaxial layer through asymmetric cyclic deposition etch (CDE) epitaxy. An initial layer growth rate of one or more cycles of the CDE process are designed to enhance a crystalline quality of the epitaxial layer. A growth rate of the epitaxial material may be altered by adjusting a flow rate of one or more silicon-containing precursors within a processing chamber wherein the epitaxial growth takes place. An etch rate may also be altered by adjusting a temperature or partial pressure of one or more vapor etchants, or the temperature within the processing chamber. In some embodiments, an initial layer thickness that is greater than a critical thickness of the epitaxial material for strain relaxation is achieved with a low growth rate, followed by a high growth rate for the remainder of epitaxial growth. Other methods are also disclosed.

Abstract: Systems and methods are disclosed for performing laser annealing in a manner that reduces or minimizes wafer surface temperature variations during the laser annealing process. The systems and methods include annealing the wafer surface with first and second laser beams that represent preheat and anneal laser beams having respective first and second intensities. The preheat laser beam brings the wafer surface temperate close to the annealing temperature and the anneal laser beam brings the wafer surface temperature up to the annealing temperature. The anneal laser beam can have a different wavelength, or the same wavelength but different orientation relative to the wafer surface. Reflectivity maps of the wafer surface at the preheat and anneal wavelengths are measured and used to select the first and second intensities that ensure good anneal temperature uniformity as a function of wafer position. The first and second intensities can also be selected to minimize edge damage or slip generation.

Abstract: A thin-film semiconductor device includes a semiconductor device part and a capacitor part. The semiconductor device part includes: a light-transmitting first gate electrode; a light-shielding second gate electrode; a first insulating layer; a semiconductor layer; a second insulating layer; and a source electrode and a drain electrode. The capacitor part includes: a first capacitor electrode made of a light-transmitting conductive material; a dielectric layer; and a second capacitor electrode. The second gate electrode, the semiconductor layer, and the second insulating layer have outlines that are coincident with one another in a top view.

Abstract: High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a bottom-gate transistor including an oxide semiconductor layer, an oxide semiconductor layer functioning as a current path (channel) of the transistor is sandwiched between oxide semiconductor layers having lower carrier densities than the oxide semiconductor layer. In such a structure, the channel is formed away from the interface of the oxide semiconductor stacked layer with an insulating layer in contact with the oxide semiconductor stacked layer, i.e., a buried channel is formed.

Abstract: An ohmic contact between an electrode and a semiconductor layer is more stably formed and an electrical contact resistance between them is further reduced. A semiconductor device comprises a semiconductor layer 103 composed of an oxide semiconductor material containing indium, an ohmic electrode 107 provided on the semiconductor layer 103 and having an ohmic contact with the semiconductor layer 103, and an intermediate layer 106 provided between the semiconductor layer 103 and the ohmic electrode 107, wherein the intermediate layer 106 includes a first region 106a whose indium atomic concentration is greater than that of an interior of the semiconductor layer 103 and a second region 106b whose indium atomic concentration is less than that of the first region.

Abstract: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.

Abstract: By controlling the luminance of light emitting element not by means of a voltage to be impressed to the TFT but by means of controlling a current that flows to the TFT in a signal line drive circuit, the current that flows to the light emitting element is held to a desired value without depending on the characteristics of the TFT. Further, a voltage of inverted bias is impressed to the light emitting element every predetermined period. Since a multiplier effect is given by the two configurations described above, it is possible to prevent the luminance from deteriorating due to a deterioration of the organic luminescent layer, and further, it is possible to maintain the current that flows to the light emitting element to a desired value without depending on the characteristics of the TFT.

Abstract: Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.

Abstract: A polysilicon thin film transistor device includes a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion, a gate insulating film formed on the gate metal pattern, a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region, a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer, and a pixel electrode connected with the drain electrode.

Abstract: A transistor is provided in which the bottom surface portion of an oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film, and an insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. In addition, the oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) through heat treatment in which impurities such as hydrogen, moisture, hydroxyl, and hydride are removed from the oxide semiconductor and oxygen which is one of main component materials of the oxide semiconductor is supplied and is also reduced in a step of removing impurities.

Abstract: There is provided an amorphous oxide semiconductor material including an amorphous oxide semiconductor including In, Ga and Zn, wherein when In:Ga:Zn=a:b:c denotes an element composition ratio of the oxide semiconductor, the element composition ratio is defined by the range of a+b=2 and b<2 and c<4b?3.2 and c>?5b+8 and 1?c?2.

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-stagger thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by wet etching in which an etching solution is used.

Abstract: To provide a highly reliable semiconductor device. To provide a semiconductor device which prevents a defect and achieves miniaturization. An oxide semiconductor layer in which the thickness of a region serving as a source region or a drain region is larger than the thickness of a region serving as a channel formation region is formed in contact with an insulating layer including a trench. In a transistor including the oxide semiconductor layer, variation in threshold voltage, degradation of electric characteristics, and shift to normally on can be suppressed and source resistance or drain resistance can be reduced, so that the transistor can have high reliability.

Abstract: To improve switching characteristics of a transistor in which a channel is formed in an oxide semiconductor layer. A parasitic channel is formed at an end portion of the oxide semiconductor layer because a source and a drain of the transistor are electrically connected to the end portion. That is, when at least one of the source and the drain of the transistor is not electrically connected to the end portion, the parasitic channel is not formed at the end portion. In view of this, a transistor having a structure in which at least one of a source and a drain of the transistor is not or less likely to be electrically connected to an end portion of an oxide semiconductor layer is provided.

Abstract: A thin film transistor and a method for fabricating the same are disclosed. The thin film transistor includes: a gate electrode formed on a substrate and having a plurality of horizontal electrode parts spaced apart at regular intervals; a gate insulating film formed over the entire surface of the substrate including the gate electrode; an active pattern formed on the gate insulating film above the plurality of horizontal electrode parts; an etch stop film pattern formed above the active pattern and the gate insulating film so as to overlap top portions of the active pattern and the gate electrode and; a source electrode formed on the active pattern, the gate insulating film, and the etch stop film pattern so as to overlap top portions of adjacent horizontal electrode parts; and a drain electrode formed on the active pattern, the gate insulating film, and the etch stop film pattern so as to overlap top portions of horizontal electrode parts located on the outermost ends.

Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.

Abstract: A pixel structure includes a first conductive layer, a stacked layer, and a third conductive layer. The first conductive layer includes a first gate, a first scan line connected to the first gate, and a capacitor electrode separated from the first scan line. The stacked layer includes a semiconductor layer and a second conductive layer. The second conductive layer includes a data line, a first source connected to the data line, a second source, a first drain, a second drain, a connecting electrode connected to the second source and electrically connected to the first drain, and a coupling electrode connected to the second drain. The third conductive layer includes a first pixel electrode connected to the first drain, a second pixel electrode electrically connected to the connecting electrode, a first extending portion, and a second extending portion.

Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.

Abstract: A structure including an oxide semiconductor layer which is provided over an insulating surface and includes a channel formation region and a pair of low-resistance regions between which the channel formation region is positioned, a gate insulating film covering a top surface and a side surface of the oxide semiconductor layer, a gate electrode covering a top surface and a side surface of the channel formation region with the gate insulating film positioned therebetween, and electrodes electrically connected to the low-resistance regions is employed. The electrodes are electrically connected to at least side surfaces of the low-resistance regions, so that contact resistance with the source electrode and the drain electrode is reduced.