Abstract: An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a source and a drain of the TFT on the polycrystalline silicon layer; forming a pixel electrode on the insulating layer and part of the source; forming a plain passivation layer on a source-drain electrode layer; forming a transparent electrode layer on the plain passivation layer so that the transparent electrode layer is connected to the gate, the source, and the drain via the contact hole. The use of masks in types and in numbers in the LTPS technology will be reduced. So, both of the processes and the production costs are reduced.

Abstract: An LTPS array substrate and a method for producing the same are proposed. The method includes: forming a gate of a thin-film transistor (TFT) of the LTPS array substrate on a substrate; forming a first insulating layer, a semiconductor layer, and a positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a second insulating layer on the substrate of the polycrystalline silicon layer; forming a source and a drain of the TFT on the second insulating layer so that the source and the drain is electrically connected to the polycrystalline silicon layer via a contact hole. The use of masks in types and in numbers in the LTPS technology will be reduced. So, both of the processes and the production costs are reduced.

Abstract: A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having small current in an off state (in a non-conductive state) is provided. A semiconductor device including such a transistor is provided. A first electrode is formed over a substrate, a first insulating layer is formed adjacent to a side surface of the first electrode, and a second insulating layer is formed to cover the first insulating layer and be in contact with at least part of a surface of the first electrode. The surface of the first electrode is formed of a conductive material that does not easily transmit an impurity element. The second insulating layer is formed of an insulating material that does not easily transmit an impurity element. An oxide semiconductor layer is formed over the first electrode with a third insulating layer provided therebetween.

Abstract: An organic EL display device includes an inorganic insulating film including a contact part as an opening where a contact electrode made of a conductive film is exposed, a TFT circuit layer provided on the inorganic insulating film and including a circuit including a thin film transistor, an organic EL element layer provided on the TFT circuit layer and including an organic EL element whose light emission is controlled by the circuit, and a sealing layer covering the organic EL element layer and made of an inorganic insulating material.

Abstract: An exemplary embodiment of the present invention discloses a method of manufacturing a touch panel, the method including, forming a plurality of sensing cells in a first region of a substrate, forming an insulating interlayer on the plurality of sensing cells, removing at least a portion of the insulating interlayer to form contact holes exposing the plurality of sensing cells, and forming a connection pattern and a transparent conductive pattern on the insulating interlayer simultaneously, wherein the connection pattern is electrically connected to adjacent sensing cells, and the transparent conductive pattern is disposed in a second region of the substrate outside of the first region.

Abstract: A liquid crystal display device including a first substrate, a second substrate disposed so as to face the first substrate and a liquid crystal layer disposed between the first and the second substrates, the first substrate including: a display area portion in which a plurality of pixels are arranged in a manner of a matrix; and a frame edge area lying outside the display area portion, the frame edge area including a peripheral circuit configured to drive the plurality of pixels of the display area portion, the peripheral circuit having at least one transistor, wherein a channel area of the transistor is covered with a conductive layer via an inorganic insulating layer, the inorganic insulating layer and the conductive layer being stacked in a direction orthogonal to a surface of the first substrate in the stated order, and a predetermined negative potential is applied to the conductive layer.

Abstract: A meta-structure and a tunable optical device including the same are provided. The meta-structure includes a plurality of metal layers spaced apart from one another, an active layer spaced apart from the plurality of metal layers and having a carrier concentration that is tuned according to an electric signal applied to the active layer and the plurality of metal layers, and a plurality of dielectric layers spaced apart from one another and each having one surface contacting a metal layer among the plurality of metal layers and another surface contacting the active layer.

Abstract: A semiconductor device capable of retaining data for a long time is provided. A semiconductor device includes a first transistor including a first insulator, a first oxide semiconductor, a first gate, and a second gate; a second transistor including a second oxide semiconductor, a third gate, and a fourth gate; and a node. The first gate and the second gate overlap with each other with the first oxide semiconductor therebetween. The third gate and the fourth gate overlap with each other with the second oxide semiconductor therebetween. The first oxide semiconductor and the second gate overlap with each other with the first insulator therebetween. One of a source and a drain of the first transistor, the first gate, and the fourth gate are electrically connected to the node. The first insulator is configured to charges.

Abstract: A flexible array substrate structure and manufacturing method thereof are disclosed, in which the patterning process of an organic semi-conductive layer is achieved by using the inside wall of the opening of a color film layer as a bank, so that one mask can be saved. Also, a process for manufacturing a device can be simplified by an improved device structure, so that the flexible array substrate structure of the invention can be obtained by only using four masks.

Abstract: A display unit includes a display panel including a display region and a terminal region on a first substrate, the display region including a plurality of pixels, each of the plurality of pixels including a light emitting element, and the terminal region including a plurality of terminals at a part of a peripheral region of the display region. The light emitting element includes a first electrode, an organic layer, and a second electrode that is provided commonly to the plurality of pixels, in order from the first substrate side. The second electrode extends, continuously in a plan view, to an end of the first substrate in a region on the first substrate except for the terminal region, and is configured to be electrically disconnected from an exterior member of the display panel.

Abstract: An exemplary embodiment provides a thin film transistor array panel, including: a substrate; an oxide semiconductor layer disposed on the substrate; an insulating layer disposed on the oxide semiconductor layer; and a pixel electrode disposed on the insulating layer. The oxide semiconductor layer includes a first layer and a second layer disposed on the first layer, the second layer includes an oxide semiconductor including silicon, and the second layer contacts the insulating layer.

Abstract: A metal oxide thin film transistor and a preparation method thereof, as well as an array substrate, wherein the metal oxide thin film transistor comprises a base substrate, an active layer and a source-drain metal layer formed on the base substrate that contact each other and are located in different layers, the source-drain metal layer comprising separated source electrode and drain electrode; the active layer having a hollow structure in a channel area located between the source electrode and the drain electrode.

Abstract: Based on a REF/NREF signal coming from a REF/NREF determination circuit, a polarity bias calculation circuit updates a polarity bias count value Nb indicating a degree of a polarity bias of an applied voltage to a liquid crystal layer, and based on this polarity bias count value Nb, a bias movement determination circuit determines a moving direction of the polarity bias. Upon receiving an OFF signal Soff instructing OFF of the power supply, a balance control circuit controls a drive unit based on a result of the determination of the polarity bias moving direction and on the polarity bias count value Nb at a point of time when the OFF signal Soff is inputted so that the polarity bias can be resolved before a power supply is turned off.

Abstract: An exemplary FET includes a substrate and multiple vertically stacked layer groups with each layer group having a quantum well semiconductive layer and a nonconductive layer adjacent the first quantum well semiconductive layer. Conductive source and drain electrodes in conductive contact with the semiconductive layers. A 3-dimensional ridge of the stacked layer groups is defined between spaced apart first and second trenches which are between the source and drain electrodes. A continuous conductive side gate is disposed on the sides and top of the ridge for inducing a field into the semiconductive layers. A gate electrode is disposed in conductive contact with the conductive side gate.

Abstract: One embodiment provides an imaging apparatus including a photoelectric conversion unit; and a junction type field effect transistor configured to output a signal based on a carrier generated by the photoelectric conversion unit. The junction type field effect transistor includes a semiconductor region of a first conductivity type that forms a channel and a gate region of a second conductivity type. The semiconductor region of the first conductivity type includes a first region and a second region. The first region and the second region are disposed in this order toward a direction to which a carrier in the channel drifts. An impurity density of the second region is lower than an impurity density of the first region.

Abstract: An exemplary FET includes a base and first and second stacked layer groups each having a nonconductive layer and a semiconductive layer adjacent the nonconductive layer. Source and drain electrodes are in low resistance contact with the semiconductive layers. First and second parallel trenches extend vertically between the source and drain electrodes to create access to first and second edges, respectively, of the layers. A 3-dimensional ridge is defined by the layers between the first and second trenches. A continuous conductive side gate extends generally perpendicular to the trenches and engages the first edges, the top of the ridge and the second edges. A gate electrode is disposed in low resistance contact with the conductive side gate. The figure of merit for the FET increases as the number of layer groups increases. A plurality of parallel spaced apart ridges, all engaged by the same side gate, can be utilized.

Abstract: Oxacycloolefinic polymers as typically obtained by metathesis polymerization using Ru-catalysts, show good solubility and are well suitable as dielectric material in electronic devices such as capacitors and organic field effect transistors.

Abstract: In a configuration including a memory cell that retains multilevel data by controlling the on/off state of a transistor, correct data can be read out even if a potential of data retained by turning off the transistor is changed. The memory cell controls writing or retention of data corresponding to one of a plurality of potentials by controlling an on/off state of the transistor. The write voltage generator circuit outputs a first write voltage of data to be written to the memory cell. The write voltage generator circuit obtains a read voltage of the data by reading the first write voltage written to the memory cell. The write voltage generator circuit generates a second write voltage by correcting a change of the first write voltage caused by turning off the transistor, and outputs the second write voltage to the memory cell.

Abstract: A display device with high design flexibility is provided. The display device includes a display element, a touch sensor, and a transistor between two flexible substrates. An external electrode that supplies a signal to the display element and an external electrode that supplies a signal to the touch sensor are connected from the same surface of one of the substrates.

Abstract: A semiconductor device includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating through the gate electrodes and the interlayer insulating layers, and a gate dielectric layer disposed on an external surface of the channel layer between the gate electrodes and the channel layer. In addition, the channel layer includes a first region extended in a direction perpendicular to a top surface of the substrate and a second region connected to the first region in a lower portion of the first region and including a plane inclined with respect to the top surface of the substrate.

Abstract: Some embodiments include an assembly having a first wiring level with a plurality of first shield lines and first signal lines. The first shield lines and first signal lines have first segments extending along a first direction and second segments extending along the first direction and laterally offset from the first segments. The assembly includes a second wiring level below the first wiring level and having a plurality of second shield lines and second signal lines. The second shield lines and second signal lines have third segments extending along the first direction and fourth segments extending along the first direction and laterally offset from the third segments. The fourth segments of the second shield lines extend to under the first segments of the first shield lines and are electrically coupled to the first segments of the first shield lines through vertical interconnects.

Abstract: An organic EL device according to the present application includes a substrate, a plurality of organic EL elements arranged on the substrate, the plurality of organic EL elements including an organic light-emitting layer interposed between an anode and a cathode, a plurality of connection terminals disposed on the substrate, a sealing layer covering the plurality of organic EL elements such that the plurality of organic EL elements lie between the substrate and the sealing layer, and an organic layer formed above the sealing layer. The organic layer and the sealing layer have an opening portion that exposes at least one of the plurality of connection terminals.

Abstract: The amount of nitrogen that is transferred to an oxide semiconductor film of a transistor including the oxide semiconductor film is reduced. In addition, in a semiconductor device which includes a transistor including an oxide semiconductor film, change in electrical characteristics is suppressed and reliability is improved. After a nitrogen-containing oxide insulating film is formed over a transistor including an oxide semiconductor film where a channel region is formed, nitrogen is released from the nitrogen-containing oxide insulating film by heat treatment. Note that the nitrogen concentration which is obtained by secondary ion mass spectrometry (SIMS) is greater than or equal to the lower limit of detection by SIMS and less than 3×1020 atoms/cm3.

Abstract: An electro-optical device includes one or more control lines that include a scanning line, a data line and a pixel circuit. The pixel circuit has a drive transistor, a write-in transistor with a gate which is electrically connected to the scanning line, a light-emitting element that emits light at a brightness that depends on the size of a current that is supplied through the drive transistor, and a control line which overlaps the gate of the drive transistor when viewed from a direction that is perpendicular to a surface of a substrate on which the pixel circuit is formed is included in the one or more control lines.

Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.

Abstract: The present application discloses a thin film transistor comprising active layer on a base substrate; an insulating layer over the active layer, the insulating layer comprising a source via and a drain via, each of which extending through the insulating layer; a source electrode within the source via in contact with the active layer; and a drain electrode within the drain via in contact with the active layer.

Abstract: The threshold voltage is shifted in a negative or positive direction in some cases by an unspecified factor in a manufacturing process of the thin film transistor. If the amount of shift from 0 V is large, driving voltage is increased, which results in an increase in power consumption of a semiconductor device. Thus, a resin layer having good flatness is formed as a first protective insulating film covering the oxide semiconductor layer, and then a second protective insulating film is formed by a sputtering method or a plasma CVD method under a low power condition over the resin layer. Further, in order to adjust the threshold voltage to a desired value, gate electrodes are provided over and below an oxide semiconductor layer.

Abstract: A transistor with stable electrical characteristics or a transistor with normally-off electrical characteristics. The transistor is a semiconductor device including a conductor, a semiconductor, a first insulator, and a second insulator. The semiconductor is over the first insulator. The conductor is over the semiconductor. The second insulator is between the conductor and the semiconductor. The first insulator includes fluorine and hydrogen. The fluorine concentration of the first insulator is higher than the hydrogen concentration of the first insulator.

Abstract: The invention generally relates to passivation layers for use in organic electronic devices, and more specifically in organic field effect transistors, to processes for preparing such passivation layers, and to organic electronic devices and organic field effect transistors encompassing such passivation layers.

Abstract: The present disclosure provides a thin film transistor (TFT), its manufacturing method, an array substrate and a display device. The method for manufacturing the TFT includes steps of forming patterns of a gate electrode, a source electrode and a drain electrode on a base substrate; and forming a pattern of an active layer and a pattern of a passivation layer covering the active layer by a single patterning process. The passivation layer is made of a negative or positive photoresist, and the active layer is insulated from the gate electrode and electrically connected to the source electrode and the drain electrode.

Abstract: Even in case of conductive particles being clamped between stepped sections of substrate electrodes and electrode terminals, conductive particles sandwiched between each main surface of the substrate electrodes and electrode terminals are sufficiently compressed, ensuring electrical conduction. An electronic component is connected to a circuit substrate via an anisotropic conductive adhesive agent, on respective edge-side areas of substrate electrodes of the circuit substrate and electrode terminals of the electronic component, stepped sections are formed and abutted, conductive particles are sandwiched between each main surface and stepped sections of the substrate electrodes and electrode terminals; the conductive particles and stepped sections satisfy formula, a+b+c?0.8 D (1), wherein a is height of the stepped section of the electrode terminals, b is height of the stepped section of the substrate electrodes, c is gap distance between each stepped sections and D is diameter of conductive particles.

Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

Abstract: A transistor with stable electrical characteristics is provided. Provided is a method for manufacturing a semiconductor device that includes, over a substrate, an oxide semiconductor, a first conductor, a first insulator, a second insulator, and a third insulator. The oxide semiconductor is over the first insulator. The second insulator is over the oxide semiconductor. The third insulator is over the second insulator. The first conductor is over the third insulator. The oxide semiconductor has a first region and a second region. To form the first region, ion implantation into the oxide semiconductor is performed using the first conductor as a mask, and then hydrogen is added to the oxide semiconductor using the first conductor as a mask.

Abstract: A semiconductor device including a transistor is provided. The transistor includes a gate electrode, a first insulating film over the gate electrode, a second insulating film over the first insulating film, an oxide semiconductor film over the second insulating film, a source electrode and a drain electrode electrically connected to the oxide semiconductor film, a third insulating film over the source electrode, and a fourth insulating film over the drain electrode. A fifth insulating film including oxygen is provided over the transistor. The third insulating film includes a first portion, the fourth insulating film includes a second portion, and the fifth insulating film includes a third portion. The amount of oxygen molecules released from each of the first portion and the second portion is smaller than the amount of oxygen molecules released from the third portion when the amounts are measured by thermal desorption spectroscopy.

Abstract: The present disclosure provides a method forming a semiconductor device in accordance with some embodiments. The method includes receiving a substrate having a fin protruding through the substrate, wherein the fin is formed of a first semiconductor material, exposing the substrate in an environment including hydrogen radicals, thereby passivating the protruded fin using the hydrogen radicals, and epitaxially growing a cap layer of a second semiconductor material to cover the protruded fin.

Abstract: A display device and a method of manufacturing the display device are disclosed. In one aspect, the display device includes a substrate including a display region and a peripheral region. A first block member is in the peripheral region and surrounding display structures, the first block member having a first height. A second block member is spaced apart from the first block member in a first direction extending from the display region to the peripheral region, the second block member surrounding the first block member, the second block member having a second height that is greater than the first height. A first encapsulation layer is over the display structures, the first block member, and the second block member. A second encapsulation layer is over the first encapsulation layer, the second encapsulation layer overlapping at least a portion of the first block member in the depth dimension of the display device.

Abstract: A display unit includes a plurality of light emitting devices, each of the light emitting devices including a function layer including at least an organic layer is sandwiched between a first electrode and a second electrode, and which have a resonator structure for resonating light by using a space between the first electrode and the second electrode as a resonant section and extracting the light through the second electrode are arranged on a substrate, wherein in the respective light emitting devices, the organic layer is made of an identical layer, and a distance of the resonant section between the first electrode and the second electrode is set to a plurality of different values.

Abstract: Disclosed is a semiconductor device having a first transistor and a second transistor over the first transistor. The first transistor includes a first semiconductor, and the second transistor includes an oxide semiconductor that is different from the first semiconductor. A gate of the first transistor is electrically connected to a source or drain electrode of the second transistor. The second transistor has a semiconductor layer including the oxide semiconductor over the source and drain electrodes and a gate electrode over the semiconductor layer with an insulating layer therebetween.

Abstract: The present invention provides a TFT and a manufacturing method thereof, an array substrate and a display device. The TFT comprises a gate, an active layer located on the gate, an ohmic contact layer located on the active layer, and a first electrode and a second electrode located on the ohmic contact layer, wherein the first electrode and the second electrode are partially overlapped with the active layer, the ohmic contact layer is located within a region where the first electrode and the second electrode are overlapped with the active layer; the active layer is partially overlapped with the gate, the active layer comprises at least one opening region partially overlapped with the gate; and the first electrode and/or the second electrode extends beyond the active layer through the at least one opening region.

Abstract: There has been a problem that power consumption is increased if a potential of a signal line changes every time a video signal is applied to a driving transistor from the signal line, since the parasitic capacitance of the signal line stores and releases electric charges. In a configuration of a display portion provided with a gate signal line for selecting an input of a video signal to a pixel and a source signal line for inputting a video signal to the pixel, a switch is connected in series with the source signal line, the switch being controlled to be in on state when the pixel is not selected by the gate signal line, and in off state when the pixel is selected by the gate signal line. Accordingly, the parasitic capacitance of the source signal line which stores and releases electric charges affects only pixels between an output side of a source driver up to and including the pixel selected to be written with a video signal.

Abstract: Each pixel region of an active matrix substrate includes a thin-film transistor, an interlayer insulating layer that includes an organic insulating layer, a transparent connection layer formed on the interlayer insulating layer, an inorganic insulating layer formed on the transparent connection layer, and a pixel electrode formed on the inorganic insulating layer. The transparent connection layer contacts a drain electrode inside of a first contact hole formed in the interlayer insulating layer. The pixel electrode contacts the transparent connection layer inside of a second contact hole formed in the inorganic insulating layer. The first contact hole and the second contact hole do not overlap with one another when a substrate is viewed from a normal direction. Inside the first contact hole, a bottom surface and sidewalls of the first contact hole are covered by the transparent connection layer, the inorganic insulating layer, and the pixel electrode.

Abstract: A semiconductor device including a substrate, at least one gate electrode, at least two silicon oxide layers comprising a first silicon oxide layer and a second silicon oxide layer, wherein the first silicon oxide layer is nearer to the substrate than the second silicon oxide layer, and wherein a thickness of the first silicon oxide layer is greater than or equal to a thickness of the second silicon oxide layer, and a semiconductor layer disposed between at least a portion of the first silicon oxide layer and at least a portion of the second silicon oxide layer. Also, an image pick-up device and a radiation imaging device including the semiconductor device.

Abstract: Disclosed is a thin-film transistor, which includes a gate terminal, a source terminal, and a drain terminal. The source terminal and the drain terminal are arranged side-by-aide above the gate terminal. The source terminal includes a first edge. The drain terminal includes a second edge. The first edge and the second edge face each other. The first edge and the second edge form therebetween a channel. The first edge and the second edge are both in a nonlinear form. A dimension of the channel in an extension of the first edge and the second edge is a width of the channel. The channel is narrowed from a middle thereof toward two ends in the widthwise direction of the channel. Light transmittance in each portion of the channel of the thin-film transistor is made consistent and the quality of the thin-film transistor is enhanced.

Abstract: A transistor, a method of manufacturing a transistor, and an electronic device including a transistor are provided, the transistor may include a channel layer having a multi-layer structure. The channel layer may have a double layer structure or a triple layer structure. At least two layers of the channel layer may have different oxygen concentrations.

Abstract: The invention relates to an electronic device comprising at least two organic transistors having different threshold voltages. The device comprises at least two transistors, each including a self-assembled layer of molecules having dipole moments that differ from one another by an absolute value of between 0.2 and 10 debye. The invention is particularly suitable for use in the field of electronic circuit production.

Abstract: A display device includes: a first substrate; a gate electrode on the first substrate; a gate insulating layer on the gate electrode; a semiconductor layer on the gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a first passivation layer including a silicon nitride-based material and on the semiconductor layer, the source electrode, and the drain electrode; a second passivation layer including a silicon nitride-based material and on the first passivation layer; and a third passivation layer including a silicon nitride-based material and on the second passivation layer, where a content ratio of silicon in the first passivation layer is higher than a content ratio of silicon in the second passivation layer, and the content ratio of silicon in the second passivation layer is higher than a content ratio of silicon in the third passivation layer.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: The present invention discloses a color filter substrate comprising a substrate; and a color filter layer disposed on the substrate. The color filter layer comprises at least two color regions, and at least two alignment marks, corresponding to the at least two color regions respectively, disposed on a perimeter zone of the substrate. Each of the alignment marks is configured to have a block structure, and at least one of the alignment marks is provided with a recess in a top thereof.

Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.

Abstract: The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, next, a first dry etching process is performed, to form a recess in the substrate. Afterwards, an ion implantation process is performed to a bottom surface of the recess, a wet etching process is then performed, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively, and a second dry etching process is performed, to etch partial bottom surface of the recess, wherein after the second dry etching process is performed, a lower portion of the recess has a U-shaped cross section profile.