Abstract: A method for manufacturing a semiconductor device having a low-k carbon-containing dielectric layer includes: depositing a low-k carbon-containing dielectric material, which has a carbon content ranging from 16 atomic % to 23 atomic %, using a precursor mixture to form a carbon-containing dielectric layer having a k value ranging from 2.8 to 3.3 and a porosity ranging from 0.03% to 1.0%; forming the carbon-containing dielectric layer into a patterned carbon-containing dielectric layer having a recess therein by etching, the patterned carbon-containing dielectric layer having a porosity ranging from 1.0% to 2.0%; and filling the recess with an electrically conductive material to form an electrically conductive feature in the patterned carbon-containing dielectric layer.

Abstract: A spin on carbon composition, comprises: a carbon backbone polymer; a first crosslinker; and a second crosslinker. The first crosslinker reacts with the carbon backbone polymer to partially crosslink the carbon backbone polymer at a first temperature, and the second crosslinker reacts with the carbon backbone polymer to further crosslink the carbon backbone polymer at a second temperature higher than the first temperature. The first crosslinker is a monomer, oligomer, or polymer. The second crosslinker is a monomer, oligomer, or polymer. The first and second crosslinkers are different from each other. When either of the first crosslinker or the second crosslinker is a polymer, the polymer is a different polymer than the carbon backbone polymer.

Abstract: A method of manufacturing a semiconductor device includes forming a spin on carbon layer comprising a spin on carbon composition over a semiconductor substrate. The spin on carbon layer is first heated at a first temperature to partially crosslink the spin on carbon layer. The spin on carbon layer is second heated at a second temperature to further crosslink the spin on carbon layer. An overlayer is formed over the spin on carbon layer. The second temperature is higher than the first temperature.

Abstract: The present application relates to a method for preparing a barrier film. The present application can provide a method for preparing a barrier film having excellent barrier characteristics and optical performances. The barrier film produced by the method of the present application can be effectively used not only for packaging material for food or medicine, and the like, but also for various applications, such as LCDs (Liquid Crystal Displays) or a solar cells, substrates for electronic papers or OLEDs (Organic Light Emitting Diodes) or sealing films.

Abstract: The invention provides a composition for forming an organic film, which generates no by-product even under such a film formation condition in an inert gas to prevent substrate corrosion, which is capable of forming an organic film not only excellent in properties of filling and planarizing a pattern formed on a substrate but also favorable for dry etching resistance during substrate processing, and further which causes no fluctuation in film thickness of the film due to thermal decomposition even when a CVD hard mask is formed on the organic film. The composition for forming an organic film includes (A) a polymer having a repeating unit shown by the following general formula (1) and (B) an organic solvent.

Abstract: Modified silica particles are provided. Aspects of the particles include an outer layer that is composed of organically-modified silica comprising a siloxane-linked hydrophilic group, such as a charged functional group or a polar neutral functional group. The modified silica particles can form the basis of a variety of chromatography support materials. Also provided are methods of preparing the subject particles. Aspects of the methods include contacting silica particles with water, an ionic fluoride and an organosilane reagent comprising a hydrophilic moiety to produce modified silica particles wherein the hydrophilic moiety of the organosilane reagent is incorporated into an outer layer of the silica particles. Chromatography supports and kits including the subject particles and methods of using the same are also provided.

Abstract: Methods of forming an interconnect of an IC are disclosed. The methods include forming a first interlayer dielectric (ILD) layer and a second ILD layer with an ILD etch stop layer (ESL) therebetween. The ILD ESL has an etch rate that is at least five times slower than the first and second ILD layers, and may include, for example, aluminum oxynitride. A dual damascene (DD) hard mask is used to form a wire trench opening in the second ILD layer and a via opening in the first ILD layer, creating a via-wire opening. Due to the slower etch rate, the ILD ESL defines the via opening in the first ILD layer as a chamferless via opening. A unitary via-wire conductive structure coupled to the conductive structure in the via-wire opening can be formed from the via-wire opening.

Abstract: The invention generally relates to systems and methods for producing metal clusters; functionalized surfaces; and droplets including solvated metal ions. In certain aspects, the invention provides methods that involve providing a metal and a solvent. The methods additionally involve applying voltage to the solvated metal to thereby produce solvent droplets including ions of the metal containing compound, and directing the solvent droplets including the metal ions to a target. In certain embodiments, once at the target, the metal ions can react directly or catalyze reactions.

Abstract: A coated material contains a substrate and a protective coating in which the protective coating is formed of a plurality of monomer units covalently bonded to a surface of a substrate such that each monomer unit contains a hydrophobic tail group covalently bonded to the surface of the substrate through an organic linking group. The protective coating is formed by a process including the steps of contacting the surface of the substrate with a surface activator containing a fluoride-containing compound and an organic solvent to form an activated surface, contacting the activated surface with a protective reagent to form an initial coated surface, and contacting the initial coated surface with a thinning agent containing a fluoride-containing compound and a surfactant to form the protective coating.

Abstract: A method for following the degassing of a component placed in a vacuum chamber, comprises: measuring partial pressures Pi for a set M of reference atomic masses, by means of a mass spectrometer connected to the vacuum chamber; determining a degassing rate ?, at least as a function of the measured partial pressures Pi; and, calculating a slope of the variation in the degassing rate. The degassing rate ? may advantageously be determined by calculation by means of a relationship of the type: ? = ? i ? M ? ? ? i ? P i ? i = 0 N ? ? ? i ? P i ? where M denotes the set of reference atomic masses, Pi denotes the partial pressures for the atomic masses measured by the mass spectrometer, the coefficients ?i denote preset weighting coefficients associated with each partial pressure Pi, and N denotes a maximum atomic mass for which the partial pressure Pi can be measured by the mass spectrometer.

Abstract: A film formation method is one for forming an organic layer comprising a fluorine-containing resin on an inorganic layer (3) formed on a substrate and comprising an inorganic substance. In the method, for the formation of the inorganic layer, a reactive sputtering procedure using water vapor as a reactive gas is carried out to form the inorganic layer on the substrate. Subsequently, the organic layer is formed on the inorganic layer. A film formation device enables the implementation of the film formation method.

Abstract: A semiconductor device having an electric fuse structure which receives an electric current to permit the electric fuse to be cut without damaging portions around the fuse. The electric fuse can be electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers.

Abstract: The invention generally relates to systems and methods for producing metal clusters; functionalized surfaces; and droplets including solvated metal ions. In certain aspects, the invention provides methods that involve providing a metal and a solvent. The methods additionally involve applying voltage to the solvated metal to thereby produce solvent droplets including ions of the metal containing compound, and directing the solvent droplets including the metal ions to a target. In certain embodiments, once at the target, the metal ions can react directly or catalyze reactions.

Abstract: A method of forming a shallow trench isolation trench in a semiconductor substrate is described. The method includes forming a trench in a region of the substrate, forming a liner in the trench, wherein the liner includes a first dielectric material, adhering a halogen element to the liner, forming a second dielectric material in the trench, annealing the first dielectric material and the second dielectric material, exposing a portion of a surface of the second dielectric material, and isotropically etching the exposed portion of the surface of the second dielectric material to form an air gap in the shallow trench isolation trench.

Abstract: Disclosed is a manufacturing method of a semiconductor device including a step of attaching semiconductor wafers together, in which it is prevented that the bonding strength between the attached semiconductor wafers may be decreased due to a void caused between the two semiconductor wafers. Moisture, etc., adsorbed to the surfaces of the semiconductor wafers is desorbed by performing a heat treatment on the semiconductor wafers after cleaning the surfaces thereof with pure water. Subsequently, after a plasma treatment is performed on the semiconductor wafers, the two semiconductor wafers are attached together. The wafers are firmly bonded together by subjecting to a high-temperature heat treatment.

Abstract: The invention generally relates to systems and methods for producing metal clusters; functionalized surfaces; and droplets including solvated metal ions. In certain aspects, the invention provides methods that involve providing a metal and a solvent. The methods additionally involve applying voltage to the solvated metal to thereby produce solvent droplets including ions of the metal containing compound, and directing the solvent droplets including the metal ions to a target. In certain embodiments, once at the target, the metal ions can react directly or catalyze reactions.

Abstract: Implementations disclosed herein generally relate to methods of forming silicon oxide films. The methods can include performing silylation on the surface of the substrate having terminal hydroxyl groups. The hydroxyl groups on the surface of the substrate are then regenerated using a plasma and H2O soak in order to perform an additional silylation. Further methods include catalyzing the exposed surfaces using a Lewis acid, directionally inactivating the exposed first and second surfaces and deposition of a silicon containing layer on the sidewall surfaces. Multiple plasma treatments may be performed to deposit a layer having a desired thickness.

Abstract: A method for at least partially sealing a porous material is provided, comprising forming a sealing layer onto the porous material by applying a sealing compound comprising oligomers wherein the oligomers are formed by ageing a precursor solution comprising cyclic carbon bridged organosilica and/or bridged organosilanes. The method is especially designed for low k dielectric porous materials to be incorporated into semiconductor devices.

Abstract: Provided is a silica-based film forming material for formation of air gaps, the material being capable of forming air gaps without employing a CVD method. A silica-based film forming material for formation of air gaps including (a) a certain siloxane polymer, (b) an alkanolamine, and (c) an organic solvent is used when a silica-based film is formed with a spin coating method. According to this silica-based film forming material for formation of air gaps, air gaps with a great degree of opening can be formed even when coated with a spin coating method, without filling the recessed parts.

Abstract: To provide a surface coating method, which contains applying a surface coating material to a layered structure so as to cover at least a surface of an insulating film of the layered structure, to form a coating on the surface of the insulating film, wherein the surface coating material contains a water-soluble resin, an organic solvent, and water, and wherein the layered structure contains the insulating film exposed to an outer surface, and a patterned metal wiring exposed to an outer surface.

Abstract: A method for producing a chip (13) in which a die bonding adhesive layer (24) and a wafer (1) are laminated on a close-contact layer (31) of a fixing jig (3), the chip is formed by completely cutting the wafer and the die bonding adhesive layer and then the chip is picked up together with the die bonding adhesive layer from the fixing jig by deforming the close-contact layer of the fixing jig. In the method the fixing jig is provided with the close-contact layer and a jig base (30) that is provided with a plurality of protrusions (36) on one side and a sidewall (35) at the outer circumference section of the one side. The close-contact layer is laminated on the surface of the jig base provided with the protrusions and is bonded on the upper surface of the sidewall. On the surface of the jig base provided with the protrusions, a partitioned space is formed by the close-contact layer, the protrusions, and the sidewall.

Abstract: An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.

Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.

Abstract: New methods of filling gaps with dielectric material are provided. The methods involve plasma-enhanced chemical vapor deposition (PECVD) of a flowable polymerized film in a gap, followed by an in-situ treatment to convert the film to a dielectric material. According to various embodiments, the in-situ treatment may be a purely thermal or plasma treatment process. Unlike conventional PECVD processes of solid material, which deposit film in a conformal process, the deposition results in bottom-up fill of the gap. In certain embodiments, a deposition-in situ treatment-deposition-in situ treatment process is performed to form dielectric layers in the gap. The sequence is repeated as necessary for bottom up fill of the gap. Also in certain embodiments, an ex-situ post-treatment process is performed after gap fill is completed. The processes are applicable to frontend and backend gapfill.

Abstract: In a method for producing a semiconductor device, two or more kinds of organic siloxane compound materials each having a cyclic SiO structure as a main skeleton and having different structures are mixed and thereafter vaporized. Alternatively, those two or more kinds of organic siloxane compound materials are mixed and vaporized simultaneously to produce a vaporized gas. Then, the vaporized gas is transported to a reaction furnace together with a carrier gas. Then, in the reaction furnace, a porous insulating layer is formed by the plasma CVD method or the plasma polymerization method using the vaporized gas.

Abstract: A semiconductor device manufacturing method includes: accommodating a substrate in a processing chamber; and supplying a silicon-based gas and an amine-based gas into the processing chamber that is heated to form a film including silicon and carbon on the substrate. The forming of the film including silicon and carbon includes: supplying the silicon-based gas and the amine-based gas into the processing chamber and confining the silicon-based gas and the amine-based gas in the processing chamber; maintaining a state in which the silicon-based gas and the amine-based gas are confined in the processing chamber, and exhausting an inside of the processing chamber.

Abstract: The present invention relates to a resin composition for optical semiconductor devices, the resin composition including the following ingredients (A) to (D): (A) an epoxy resin; (B) a curing agent; (C) a polyorganosiloxane; and (D) a white pigment.

Abstract: There are provided an etching method and an etching apparatus suitable for etching an antireflection coating layer by using a resist film as a mask. The etching method includes forming the antireflection coating layer (Si-ARC layer) on an etching target layer; forming a patterned resist film (ArF resist film) on the antireflection coating layer; and forming a desired pattern on the antireflection coating layer by introducing an etching gas including a CF4 gas, a COS gas and an O2 gas into a processing chamber and etching the antireflection coating layer by the etching gas while using the resist film as a mask.

Abstract: A backgrinding machine 10 of a semiconductor wafer W includes: a table 13 set on the working plane of a mount 11; a multiple number of holding jigs 20 arranged via check tables 15 on table 13; a grinding machine 30 for performing a grinding process of the rear side of semiconductor wafer W held by holding jig 20; and a washing device 40 for ground semiconductor wafers W. Each holding jig 20 is constructed of a concave 22 depressed on the surface of a base plate 21, a multiple number of supporting projections 23 projectively arrayed on the bottom surface of concave 22, a deformable contact film 24, covering the concave 22, being supported by the multiple supporting projections 23, for detachably holding semiconductor wafer W in close contact with it; and an exhaust path 25 for conducting air from the concave 22 covered by contact film 24 to the outside.

Abstract: (a) A recess is formed through an insulating film formed over a semiconductor substrate. (b) After the recess is formed, a temperature of the substrate is raised to 300° C. or higher at a temperature rising rate of 10° C./s or slower and a first degassing process is executed. (c) After the first degassing process, a conductive film is deposited on the insulating film, the conductive film being embedded in the recess. (d) The deposited conductive film is polished until the insulating film is exposed. It is possible to suppress occurrence of defects during CMP to be performed after a conductive member is deposited on the surface of the insulating film having a recess formed therethrough.

Abstract: The invention provides compounds of, and methods for the preparation of compounds of, the molecular formula, SixGeyHz—aXa; wherein X is halogen, and x, y, z, and a are defined herein, and methods for the deposition of high-Ge content Si films on silicon substrates using compounds of the invention.

Abstract: In a method for producing a semiconductor device, two or more kinds of organic siloxane compound materials each having a cyclic SiO structure as a main skeleton and having different structures are mixed and thereafter vaporized. Alternatively, those two or more kinds of organic siloxane compound materials are mixed and vaporized simultaneously to produce a vaporized gas. Then, the vaporized gas is transported to a reaction furnace together with a carrier gas. Then, in the reaction furnace, a porous insulating layer is formed by the plasma CVD method or the plasma polymerization method using the vaporized gas.

Abstract: A thin film transistor (TFT) array substrate and a method for fabricating the thin film transistor (TFT) array substrate is disclosed, wherein a passivation layer is directly subjected to exposing and patterning processes without using any photoresist, thereby simplifying the fabrication process and ensuring reduced preparation costs.

Abstract: Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.

Abstract: The invention relates to dielectric layers with a low dielectric constant, said layers being used to separate metallic interconnections especially during the production of integrated circuit boards (in the BEOL part of the circuit). According to the invention, the dielectric layer comprises SiC and/or SiOC, and is obtained from at least one precursor comprising at least one —Si—C<SUB>n</SUB>—Si chain where n=1.

Abstract: A method of producing an organic transistor which can form directly an organic semiconductor layer in pattern by simple processes and can produce an organic transistor excellent in transistor characteristics.

Abstract: A method of forming silicon oxide includes depositing a silicon nitride-comprising material over a substrate. The silicon nitride-comprising material has an elevationally outermost silicon nitride-comprising surface. Such surface is treated with a fluid that is at least 99.5% H2O by volume. A polysilazane-comprising spin-on dielectric material is formed onto the H2O-treated silicon nitride-comprising surface. The polysilazane-comprising spin-on dielectric material is oxidized to form silicon oxide. Other implementations are contemplated.

Abstract: In one embodiment, a method for manufacturing a semiconductor device includes following steps. An aperture is formed in an interlayer insulating film formed on a semiconductor wafer apart from an integrated circuit portion by etching process. The interlayer insulating film has a dielectric constant smaller than a silicon oxide film (SiO2), and the width of the aperture is larger than a dicing region. A resin layer is embedded in the aperture. An adhesive layer is formed on the interlayer insulating film and the resin layer. The semiconductor wafer is attached to a glass substrate using the adhesive layer by Face Down method. The semiconductor wafer, the resin layer, and the adhesive layer on a dicing region are cut by blade dicing. The semiconductor wafer and the glass substrate adhered to the semiconductor wafer are cut into pieces by the blade dicing of the glass substrate under the dicing region.

Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.

Abstract: A backgrinding machine 10 of a semiconductor wafer W includes: a table 13 set on the working plane of a mount 11; a multiple number of holding jigs 20 arranged via check tables 15 on table 13; a grinding machine 30 for performing a grinding process of the rear side of semiconductor wafer W held by holding jig 20; and a washing device 40 for ground semiconductor wafers W. Each holding jig 20 is constructed of a concave 22 depressed on the surface of a base plate 21, a multiple number of supporting projections 23 projectively arrayed on the bottom surface of concave 22, a deformable contact film 24, covering the concave 22, being supported by the multiple supporting projections 23, for detachably holding semiconductor wafer W in close contact with it; and an exhaust path 25 for conducting air from the concave 22 covered by contact film 24 to the outside.

Abstract: Embodiments relate to a method for forming reliable interconnects by the use of a device layer that can serve as a barrier or an etch stop layer, among other applications. The device layer is UV resistant in that its dielectric constant and stress remain stable or relatively stable when subjected to UV curing.

Abstract: The invention relates to dielectric layers with a low dielectric constant, said layers being used to separate metallic interconnections especially during the production of integrated circuit boards (in the BEOL part of the circuit). According to the invention, the dielectric layer comprises SiC and/or SiOC, and is obtained from at least one precursor comprising at least one —Si—C<SUB>n</SUB>-Si chain where n=l.

Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.

Abstract: A method for restoring hydrophobicity to the surfaces of organosilicate glass dielectric films which have been subjected to an etchant or ashing treatment. These films are used as insulating materials in the manufacture of integrated circuits to ensure low and stable dielectric properties in these films. The method deters the formation of stress-induced voids in these films. An organosilicate glass dielectric film is patterned to form vias and trenches by subjecting it to an etchant or ashing reagent in such a way as to remove at least a portion of previously existing carbon containing moieties and reduce hydrophobicity of said organosilicate glass dielectric film. The vias and trenches are thereafter filled with a metal and subjected to an annealing treatment.

Abstract: A method of forming an insulating layer of a semiconductor device, the method including preparing a semiconductor substrate having a plurality of structures and gaps between adjacent structures, forming an insulating layer for oxygen supply on the semiconductor substrate, forming an SOG (spin-on-glass) layer on the insulating layer for oxygen supply to fill the gaps, and curing the SOG layer, wherein the insulating layer for oxygen supply supplies oxygen to the SOG layer during curing of the SOG layer.

Abstract: To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating films, and the barrier insulating films contain a component of an organic silica containing unsaturated hydrocarbon and amorphous carbon. The copper-containing wirings are covered by the barrier insulating films that contain a component that is in an organic silica structure containing unsaturated hydrocarbon and amorphous carbon. Accordingly, inter-wiring capacitance is reduced without deteriorating reliability of the copper-containing wiring, thereby realizing a high-speed LSI with low power consumption.

Abstract: A semiconductor device is provided with a semiconductor substrate having circuit elements formed therein, and an insulating protective film formed on the semiconductor substrate. Hydroxyl groups (OH) are attached to a surface of the protective film. As a result, the contact angle between surface of the protective film and a water droplet is less than or equal to 40 degrees.

Abstract: In a method of forming an interlayer insulating film by plasma CVD, an organic siloxane compound including one or more silicon atoms each having at least three or more units each represented by a general formula, —O—Si(R1R2)—OR3 (wherein R1 and R2 are the same as or different from each other and are a methyl group, an ethyl group or a propyl group, and R3 is the same as or different from R1 and R2 and is a methyl group, an ethyl group, a propyl group or a phenyl group) is used as a raw material.

Abstract: A method of forming a porous insulation film uses an organic silica material gas having a 3-membered SiO cyclic structure and a 4-membered SiO cyclic structure, or an organic silica material gas having a 3-membered SiO cyclic structure and a straight-chain organic silica structure, and uses a plasma reaction in the filming process. A porous interlevel dielectric film having a higher strength and a higher adhesive property can be obtained.

Abstract: Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7. Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups.