Abstract: The purpose of the present invention is to provide a coating material that is for a coated metal plate, that has high storage stability, that is less likely to contaminate a heating device, and that can be used to produce a coated metal plate having a surface on which rain streaks are less likely to occur and having high scratch resistance. The coating material contains a silicone resin including 5-50 mol % of a silanol group with respect to the total number of moles of Si atoms.

Abstract: A method of manufacturing a semiconductor device includes forming a mold structure including alternately stacked mold insulating and sacrificial layers on a substrate, forming a vertical structure through the mold structure, forming side openings by removing the sacrificial, forming a preliminary dielectric layer in the side openings, forming a dielectric layer by heat-treating the preliminary dielectric layer, removing a surface layer of the dielectric layer, forming a first conductive layer covering the dielectric layer in the side openings, and forming a second conductive layer covering the first conductive layer and filling the side openings.

Abstract: A production method for an electronic component using an exterior packaging material containing a silicone resin comprises a step of dipping an element into an exterior packaging material containing a silicone resin to which aluminum hydroxide or magnesium hydroxide and a nonpolar solvent are added, an additive amount of the aluminum hydroxide or the magnesium hydroxide being controlled to a range of 60 [wt. %] or more to less than 70 [wt. %], a step of drying the exterior packaging material formed on a surface of the element to evaporate the nonpolar solvent and cause a silicone resin component to appear on a surface of the exterior packaging material, and a curing step of curing the exterior packaging material.

Abstract: In a method of manufacturing a semiconductor device, a preliminary gate insulation layer is formed on a substrate, and at least a portion of the substrate serves as a channel region. A hydrogen plasma treatment is performed on the preliminary gate insulation layer to form a gate insulation layer, and the hydrogen plasma treatment supplying a hydrogen-containing gas and an inert gas supply in a chamber via different gas supply parts to form a hydrogen plasma region and an inert gas plasma region in the chamber, respectively. A gate electrode is formed on the gate insulation layer, and impurity regions are formed at upper portions of the substrate adjacent to the gate electrode.

Abstract: In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor.

Abstract: A distance “a” from a first gate electrode of a first transistor of a high-frequency circuit to a first contact is greater than a distance “b” from a second electrode of a second transistor of a digital circuit to a second contact. The first contact is connected to a drain or source of the first transistor, and the second contact is connected to a drain or source of the second transistor.

Abstract: An ion implantation system and method, providing cooling of dopant gas in the dopant gas feed line, to combat heating and decomposition of the dopant gas by arc chamber heat generation, e.g., using boron source materials such as B2F4 or other alternatives to BF3. Various arc chamber thermal management arrangements are described, as well as modification of plasma properties, specific flow arrangements, cleaning processes, power management, eqillibrium shifting, optimization of extraction optics, detection of deposits in flow passages, and source life optimization, to achieve efficient operation of the ion implantation system.

Abstract: Provided are a novel anthracene derivative and an organic light-emitting device using the same, and more particularly, an anthracene derivative having a core (e.g., an indenoanthracene core) where an anthracene moiety with excellent device characteristics is fused with a fluorene moiety or the like with excellent fluorescent properties, wherein an aryl group is introduced at the core, and an organic light-emitting device using the anthracene derivative, which is enhanced in efficiency, operating voltage, lifetime, etc.

Abstract: A semiconductor power device includes a substrate, a first semiconductor layer on the substrate, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer. At least a recessed epitaxial structure is disposed within a cell region and the recessed epitaxial structure may be formed in a pillar or stripe shape. A first vertical diffusion region is disposed in the third semiconductor layer and the recessed epitaxial structure is surrounded by the first vertical diffusion region. A source conductor is disposed on the recessed epitaxial structure and a trench isolation is disposed within a junction termination region surrounding the cell region. In addition, the trench isolation includes a trench, a first insulating layer on an interior surface of the trench, and a conductive layer filled into the trench, wherein the source conductor connects electrically with the conductive layer.

Abstract: A power semiconductor device which includes a gate contact on one surface thereof connected to a gate bus on another opposing surface thereof using a conductive body extending through a via between the two surfaces of the device.

Abstract: This invention relates to a method of treating a semiconductor wafer and in particular, but not exclusively, to planarisation. The method consists of depositing a liquid short-chain polymer formed from a silicon containing bas or vapour. Subsequently water and OH are removed and the layer is stabilised.

Abstract: A sacrificial coating material includes: at least one inorganic compound, and at least one material modification agent, wherein the sacrificial coating material is dissolvable in an alkaline-based chemistry or a fluorine-based chemistry. A method of producing a sacrificial coating material includes: providing at least one inorganic compound, providing at least one material modification agent, combining the at least one inorganic compound with the at least one material modification agent to form the sacrificial coating material, wherein the sacrificial coating material is dissolvable in an alkaline-based chemistry or a fluorine-based chemistry, but not organic casting solvents commonly used in organic BARC materials.

Abstract: A method of forming an antireflective coating on an electronic device comprising (A) applying to an electronic device an ARC composition comprising (i) a silsesquioxane resin having the formula (PhSiO(3-x)/2(OHx)m HSiO(3-x)/2(OH)x)n, where Ph is a phenyl group, x has a value of 0, 1 or 2; m has a value of 0.05 to 0.95, n has a value of 0.05 to 0.95 and m+n?1; and (ii) a solvent; and (B) removing the solvent and curing the silsesquioxane resin to form an antireflective coating on the electronic device.

Abstract: A diffusion barrier film, a second insulating film, and a cap film are sequentially laminated on a first insulating film over a substrate. A wiring trench portion is formed extending therethrough to the first insulating film, assuming that the ratio of a width of the wiring trench portion in a direction orthogonal to its extending direction to a height of the wiring trench portion is 2.8 times even at a maximum. A barrier metal film is formed to cover the cap film and the wiring trench portion. A wiring film is deposited to cover the barrier metal film. The wiring film and the barrier metal film are chipped away until the surface of the cap film is exposed from the surface of the wiring film, thereby to form a wiring portion which buries the wiring trench portion.

Abstract: A method of forming and a structure of an electronic device. The method including: forming a trench in a single-crystal semiconductor substrate; forming a dopant diffusion barrier layer on sidewalls and a bottom of the trench; and epitaxially growing a single-crystal semiconductor layer in the trench, the single-crystal semiconductor layer filling the trench, the dopant diffusion barrier layer a barrier to diffusion of semiconductor dopants. Also a power transistor formed by the same method.

Abstract: A method for manufacturing a semiconductor device which, on performing a via first Dual Damascene process, inhibits or prevents the formation of a void in a bottom anti-reflective coating filling a via hole. The method typically includes the steps of forming a bottom anti-reflective coating (BARC) in a via hole in an interlayer dielectric on a semiconductor substrate sufficiently to fill the via hole; disposing an acid diffusion material on the BARC; forming a cross-link layer between the BARC and the acid diffusion material; removing the remaining acid diffusion material; and etching the cross-link layer, the BARC and the interlayer dielectric to form a trench extending from an upper portion of the via hole.

Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1?v?0.9, 0?w?0.5, 0.01?x?0.9, 0?y?0.7, 0.01?z?0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1<v<0.8, 0<w<0.8, 0.05<x<0.8, 0<y<0.3, 0.05<z<0.8 for v+w+x+y+z=1 and then converting the polymeric preceramic layer into a ceramic diffusion barrier by thermal methods.

Abstract: An organic field effect transistor (FET) is described with an active dielectric layer comprising a low-temperature cured dielectric film of a liquid-deposited silsesquioxane precursor. The dielectric film comprises a silsesquioxane having a dielectric constant of greater than 2. The silsesquioxane dielectric film is advantageously prepared by curing oligomers having alkyl(methyl) and/or alkyl(methyl) pendant groups. The invention also embraces a process for making an organic FET comprising providing a substrate suitable for an organic FET; applying a liquid-phase solution of silsesquioxane precursors over the surface of the substrate; and curing the solution to form a silsesquioxane active dielectric layer. The organic FET thus produced has a high-dielectric, silsesquioxane film with a dielectric constant of greater than about 2, and advantageously, the substrate comprises an indium-tin oxide coated plastic substrate.

Abstract: Disclosed herein is a method of manufacturing a semiconductor device having a step gate, which can improve the refresh characteristics of the device. The method comprises the steps of: forming on a silicon substrate having active and field regions a first hard mask exposing the field region; etching the exposed field region to form a trench; forming an isolation film by filling an insulating film in the trench; forming a second hard mask exposing both sides of the active region by etching the first hard mask; forming a metal film on the resulting substrate including the second hard mask; forming a metal silicide film on both sides of the active region by annealing the resulting substrate; removing the metal film unreacted in the annealing step and the metal silicide film, thereby recessing both sides of the active region; removing the second hard mask; and forming a step gate on both edges of the central portion of the active region and the recessed portion of the active region, adjacent to each of the edges.