Inorganic Layer Composed Of Nitride (epo) Patents (Class 257/E21.292)
  • Patent number: 9460914
    Abstract: A technique includes forming a film having a borazine ring structure and containing boron and nitrogen on a substrate by intermittently performing an act of simultaneously performing: (a) supplying borazine-based gas including a ligand to the substrate; and (b) supplying a ligand desorption gas which desorbs the ligand to the substrate, wherein the (a) and (b) are performed under a condition where the borazine ring structure in the borazine-based gas is held.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: October 4, 2016
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Katsuyoshi Harada, Yoshiro Hirose, Atsushi Sano
  • Patent number: 9029253
    Abstract: Nitrogen-containing phase-stabilized films, methods of forming phase-stabilized films, and structures and devices including the phase-stabilized films are disclosed. The phase-stabilized films include a matrix material and a phase stabilizer, which provides a morphologically stabilizing effect to a matrix material within the films. The phase-stabilized films may be used as, for example, gate electrodes and similar films in microelectronic devices.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: May 12, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Robert Brennan Milligan, Fred Alokozai
  • Patent number: 8927434
    Abstract: A method of producing a patterned inorganic thin film dielectric stack includes providing a substrate. A first patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the first deposition inhibiting material layer is not present using an atomic layer deposition process. The first deposition inhibiting and first inorganic thin film dielectric material layers are simultaneously treated after deposition of the first inorganic thin film dielectric material layer. A second patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the second deposition inhibiting material layer is not present using an atomic layer deposition process.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: January 6, 2015
    Assignee: Eastman Kodak Company
    Inventors: Carolyn R. Ellinger, David H. Levy, Shelby F. Nelson
  • Patent number: 8889568
    Abstract: Disclosed are: a method for producing a silicon nitride film, wherein generation of blisters at the periphery of a substrate is suppressed when a silicon nitride film is formed through application of a bias power; and an apparatus for producing a silicon nitride film. Specifically disclosed are a method and apparatus for producing a silicon nitride film, wherein a silicon nitride film used for a semiconductor element is formed on a substrate by plasma processing. In the method and apparatus for producing a silicon nitride film, a bias is applied to the substrate at time (b1), and a starting material gas SiH4 for the silicon nitride film is started to be supplied at time (b3) after the application of the bias.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Seiji Nishikawa, Hidetaka Kafuku, Tadashi Shimazu
  • Patent number: 8791023
    Abstract: A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: July 29, 2014
    Assignee: Eastman Kodak Company
    Inventors: Carolyn R. Ellinger, David H. Levy, Shelby F. Nelson
  • Patent number: 8772173
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a gate structure, a source region, and a drain region formed thereon, and the gate structure includes a gate insulating layer and a gate electrode. The method also includes forming a first stress layer on the substrate, removing the first stress layer, and forming a second stress layer on the substrate.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-kwan Yu, Dong-suk Shin, Pan-kwi Park, Ki-eun Kim
  • Patent number: 8723340
    Abstract: The present invention relates to a process for the production of solar cells comprising a selective emitter using an improved etching-paste composition which has significantly improved selectivity for silicon layers.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 13, 2014
    Assignee: Merck Patent GmbH
    Inventors: Werner Stockum, Oliver Doll, Ingo Koehler
  • Publication number: 20130309826
    Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.
    Type: Application
    Filed: July 1, 2012
    Publication date: November 21, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Krishnaswamy RAMKUMAR, Sagy LEVY, Jeong BYUN
  • Patent number: 8546272
    Abstract: An insulating film having features such as a low dielectric constant, a low etching rate and a high insulating property is formed.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: October 1, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Yushin Takasawa, Tsukasa Kamakura, Yoshinobu Nakamura, Ryota Sasajima
  • Patent number: 8536699
    Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: September 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
  • Publication number: 20130109164
    Abstract: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein the semiconductor device has a substrate comprising an oxide layer formed thereon, exposing an exposed surface of the oxide layer to the nitrogen-containing radicals, and incorporating nitrogen in the exposed surface of the oxide layer of the substrate.
    Type: Application
    Filed: October 23, 2012
    Publication date: May 2, 2013
    Applicant: Applied Materials, Inc.
    Inventor: Applied Materials, Inc.
  • Publication number: 20130072028
    Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 21, 2013
    Applicant: United Microelectronics Corp.
    Inventors: CHIEN-LIANG LIN, Te-Lin Sun, Ying-Wei Yen, Yu-Ren Wang
  • Patent number: 8399361
    Abstract: A semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, and a protective insulating film composed of silicon nitride, which is formed over a surface of the compound semiconductor layer and whose film density in an intermediate portion is lower than that in a lower portion.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: March 19, 2013
    Assignee: Fujitsu Limited
    Inventor: Kozo Makiyama
  • Publication number: 20130065404
    Abstract: Provided are processes for the low temperature deposition of silicon-containing films using carbosilane precursors containing a carbon atom bridging at least two silicon atoms. Certain methods comprise providing a substrate; in a PECVD process, exposing the substrate surface to a carbosilane precursor containing at least one carbon atom bridging at least two silicon atoms; exposing the carbosilane precursor to a low-powered energy sourcedirect plasma to provide a carbosilane at the substrate surface; and densifying the carbosilanestripping away at least some of the hydrogen atoms to provide a film comprising SiC. The SiC film may be exposed to the carbosilane surface to a nitrogen source to provide a film comprising SiCN.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 14, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Timothy W. Weidman, Todd Schroeder
  • Patent number: 8357608
    Abstract: An in-situ process is described incorporating plasma enhanced chemical vapor deposition comprising flowing at least one of a Si, Si+C, B, Si+B, Si+B+C, and B+C containing precursor, and a N containing precursors at first times and removing the N precursor at second times and starting the flow of an oxidant gas and a porogen gas into the chamber. A dielectric layer is described comprising a network having inorganic random three dimensional covalent bonding throughout the network which contains at least one SiCN, SiCNH, SiN, SiNH, BN, BNH, CBN, CBNH, BSiN, BSiNH, SiCBN and SiCBNH as a first component and a low k dielectric as a second component adjacent thereto.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: January 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Stephen M Gates, Alfred Grill, Son Van Nguyen, Satyanarayana Venkata Nitta
  • Publication number: 20130012032
    Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes exposing a first layer of a substrate to a plasma formed from a process gas comprising predominantly a mixture of ammonia (NH3) and a noble gas, wherein ammonia is about 0.5 to about 15 percent of the process gas; and maintaining the process chamber at a pressure of about 10 mTorr to about 80 mTorr while exposing the first layer to the plasma to transform at least an upper portion of the first layer into a nitrogen-containing layer.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 10, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: WEI LIU, MALCOLM J. BEVAN, CHRISTOPHER S. OLSEN, JOHANES SWENBERG
  • Publication number: 20120329285
    Abstract: A gate dielectric layer forming method is applied to a fabrication process of a metal-oxide-semiconductor field-effect transistor. The gate dielectric layer forming method includes the following steps. Firstly, a substrate is provided. Then, an interlayer is formed on the substrate. Then, a high-k dielectric layer is formed on the interlayer. A nitridation process is performed to convert the high-k dielectric layer into a nitridated high-k dielectric layer. A first low temperature post-nitridation annealing process is performed to treat the nitridated high-k dielectric layer with a first gas. Afterwards, a second low temperature post-nitridation annealing process is performed to treat the nitridated high-k dielectric layer with a second gas.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shao-Wei WANG, Chien-Liang Lin, Ying-Wei Yen, Yu-Ren Wang
  • Publication number: 20120202354
    Abstract: A method of forming a carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. The dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen.
    Type: Application
    Filed: April 11, 2012
    Publication date: August 9, 2012
    Applicants: Globalfoundries Inc., International Business Machines Corporation
    Inventors: Alfred Grill, Joshua L. Herman, Son Nguyen, E. Todd Ryan, Hosadurga K. Shobha
  • Patent number: 8183165
    Abstract: According to the present invention,when a nitridation process by plasma generated by a microwave is applied to a substrate with an oxide film having been formed thereon to from an oxynitride film, the microwave is intermittently supplied. By the intermittent supply of the microwave, ion bombardment is reduced in accordance with a decrease in electron temperature, and a diffusion velocity of nitride species in the oxide film lowers, which as a result makes it possible to prevent nitrogen from concentrating in a substrate-side interface of an oxynitride film to increase the nitrogen concentration therein. Consequently,it is possible to improve quality of the oxynitride film, resulting in a reduced leadage current, an improved operating speed, and improved NBTI resistance.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: May 22, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Seiji Matsuyama, Toshio Nakanishi, Shigenori Ozaki, Hikaru Adachi, Koichi Takatsuki, Yoshihiro Sato
  • Publication number: 20120122320
    Abstract: Provided are methods for re-incorporating carbon into low-k films after processes which result in depletion of carbon from the films. Additionally, methods for replenished depleted carbon and capping with tantalum nitride are also described.
    Type: Application
    Filed: November 15, 2011
    Publication date: May 17, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Annamalai Lakshmanan, Zhenjiang Cui, Mehul Naik, See-Eng Phan, Jennifer Shan, Paul F. Ma
  • Publication number: 20120108077
    Abstract: Disclosed is a substrate processing apparatus that includes: a substrate supporting member that supports a substrate; a processing chamber capable of housing the substrate supporting member; a rotating mechanism that rotates the substrate supporting member; a carrying mechanism that carries out the substrate supporting member from the processing chamber; a material gas supply system that supplies material gas into the processing chamber; a nitrogen-containing-gas supply system that supplies nitrogen containing gas into the processing chamber; and a controller that controls the material gas supply system, the nitrogen-containing-gas supply system, the carrying mechanism, and the rotating mechanism, after forming a nitride film on the substrate by using the material gas and the nitrogen containing gas, to carry out the substrate supporting member that supports the substrate while being rotated from the processing chamber.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 3, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yukinao KAGA, Tatsuyuki SAITO, Masanori SAKAI, Takashi YOKOGAWA
  • Publication number: 20120009801
    Abstract: In a silicon carbide MOSFET, interface state generated at an interface between a silicon carbide layer and a gate insulating film cannot be reduced sufficiently, and mobility of a carrier is decreased. To solve this problem, a silicon carbide semiconductor device according to this invention includes a substrate introduction step of introducing a substrate, which includes a silicon carbide layer on which a gate insulating film is formed, in a furnace, and a heating step of heating the furnace having the substrate introduced therein while introducing nitrogen monoxide and nitrogen therein, wherein, in the heating step, nitrogen is reacted to nitride an interface between the gate insulating film and the silicon carbide layer.
    Type: Application
    Filed: March 10, 2010
    Publication date: January 12, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Toshikazu Tanioka, Masayuki Furuhashi, Masayuki Imaizumi
  • Patent number: 8071483
    Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: December 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima
  • Publication number: 20110294304
    Abstract: A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine.
    Type: Application
    Filed: August 8, 2011
    Publication date: December 1, 2011
    Inventors: Yoshio Ozawa, Akihito Yamamoto
  • Publication number: 20110281442
    Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method of forming a nitrogen-containing layer may include placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas consisting essentially of ammonia (NH3) and an inert gas while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 17, 2011
    Inventors: Malcolm J. Bevan, Johanes Swenberg, Son T. Nguyen, Wei Liu, Jose Antonio Marin, Jian Li
  • Publication number: 20110263134
    Abstract: In some embodiments, a reducing gas ambient containing a reducing agent is established in a batch process chamber before substrates are subjected to a deposition. The reducing atmosphere is established before and/or during loading of the substrates into the process chamber, and can include flowing reducing gas into the process chamber while the chamber is open. The reducing gas can be a mixture of a reducing agent and an inert gas, with the reducing agent being a minority component of the reducing gas. Using the reducing gas ambient, oxidation of substrate surfaces is reduced.
    Type: Application
    Filed: April 26, 2010
    Publication date: October 27, 2011
    Applicant: ASM INTERNALTIONAL N.V.
    Inventors: Steven R.A. Van Aerde, Rene de Blank
  • Publication number: 20110256733
    Abstract: An insulating film having features such as a low dielectric constant, a low etching rate and a high insulating property is formed.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 20, 2011
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshiro HIROSE, Yushin TAKASAWA, Tsukasa KAMAKURA, Yoshinobu NAKAMURA, Ryota SASAJIMA
  • Publication number: 20110244694
    Abstract: A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride.
    Type: Application
    Filed: March 30, 2010
    Publication date: October 6, 2011
    Inventors: George Andrew Antonelli, Mandyam Sriram, Vishwanathan Rangarajan, Pramod Subramonium
  • Patent number: 7964514
    Abstract: A method for the deposition of a dielectric film including forming silicon nitride on the surface of the substrate, oxidizing the silicon nitride on the surface of the substrate, exposing the surface of the substrate to a hydrogen-free nitrogen source, and annealing the substrate. A method for the deposition of a dielectric film including forming silicon nitride on the surface of the substrate, oxidizing the silicon nitride on the surface of the substrate, including exposing the surface of the substrate to a gas selected from the group of oxygen, nitric oxide, and nitrous oxide, and exposing the surface of the substrate to a hydrogen-free nitrogen source, wherein the hydrogen-free nitrogen source is a gas selected from the group of nitrogen, nitric oxide, and nitrous oxide.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: June 21, 2011
    Assignee: Applied Materials, Inc.
    Inventor: Thai Cheng Chua
  • Patent number: 7955994
    Abstract: An object of the present invention is to provide a semiconductor device including an insulating layer with a high dielectric strength voltage, a low dielectric constant, and low hygroscopicity. Another object of the present invention is to provide an electronic appliance with high performance and high reliability, which uses the semiconductor device. An insulator containing nitrogen, such as silicon oxynitride or silicon nitride oxide, and an insulator containing nitrogen and fluorine, such as silicon oxynitride added with fluorine or silicon nitride oxide added with fluorine, are alternately deposited so that an insulating layer is formed. By sandwiching an insulator containing nitrogen and fluorine between insulators containing nitrogen, the insulator containing nitrogen and fluorine can be prevented from absorbing moisture and thus a dielectric strength voltage can be increased. Further, an insulator contains fluorine so that a dielectric constant can be reduced.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: June 7, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Toriumi, Noriyoshi Suzuki
  • Publication number: 20110124202
    Abstract: According to the present invention, when a nitridation process by plasma generated by a microwave is applied to a substrate with an oxide film having been formed thereon to form an oxynitride film, the microwave is intermittently supplied. By the intermittent supply of the microwave, ion bombardment is reduced in accordance with a decrease in electron temperature, and a diffusion velocity of nitride species in the oxide film lowers, which as a result makes it possible to prevent nitrogen from concentrating in a substrate-side interface of an oxynitride film to increase the nitrogen concentration therein. Consequently, it is possible to improve quality of the oxynitride film, resulting in a reduced leakage current, an improved operating speed, and improved NBTI resistance.
    Type: Application
    Filed: February 1, 2011
    Publication date: May 26, 2011
    Applicant: Tokyo Electron Limited
    Inventors: Seiji MATSUYAMA, Toshio Nakanishi, Shigenori Ozaki, Hikaru Adachi, Koichi Takatsuki, Yoshihiro Sato
  • Patent number: 7948061
    Abstract: A characteristic feature of the invention is to form, in a Group III nitride-based compound semiconductor device, a negative electrode on a surface other than a Ga-polar C-plane. In a Group III nitride-based compound semiconductor light-emitting device, there are formed, on an R-plane sapphire substrate, an n-contact layer, a layer for improving static breakdown voltage, an n-cladding layer made of a multi-layer structure having ten stacked sets of an undoped In0.1Ga0.9N layer, an undoped GaN layer, and a silicon (Si)-doped GaN layer, a multi-quantum well (MQW) light-emitting layer made of a combination of In0.25Ga0.75N well layers and GaN barrier layers stacked alternatingly, a p-cladding layer made of a multi-layer structure including a p-type Al0.3Ga0.7N layer and a p-In0.08Ga0.92N layer, and a p-contact layer (thickness: about 80 nm) made of a stacked structure including two p-GaN layers having different magnesium concentrations.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: May 24, 2011
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshiki Saito, Yasuhisa Ushida
  • Patent number: 7851915
    Abstract: An electronic component comprising several superimposed layers of materials including a TiCN barrier layer. A process for depositing a TiCN layer in order to obtain an electronic component, where a titanium precursor is chosen from among tetrakis(dimethylamido)titanium and/or tetrakis(diethylamido)titanium and is decomposed on a substrate by plasma-enhanced atomic layer deposition (PEALD) where the plasma is obtained with a hydrogen-rich gas which can contain nitrogen with at most 5 atomic % nitrogen and at least 95 atomic % hydrogen.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: December 14, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Caubet, Rym Benaboud
  • Patent number: 7820557
    Abstract: In a substrate nitriding method for nitriding a target substrate by allowing a nitrogen-containing plasma to act on silicon on a surface of the substrate in a processing chamber of a plasma processing apparatus, the nitridation by the nitrogen-containing plasma is performed by controlling a sheath voltage Vdc around the substrate to be less than or equal to about 3.5 eV. The sheath voltage Vdc is a potential difference Vp?Vf between a plasma potential Vp in a plasma generating region and a floating potential Vf of the substrate.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: October 26, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Minoru Honda, Toshio Nakanishi
  • Publication number: 20100255669
    Abstract: A method of forming a transistor gate construction includes forming a gate stack comprising a sacrificial material received over conductive gate material. The gate stack has lateral sidewalls having insulative material received there-against. The sacrificial material is removed from being received over the conductive gate material to form a void space between the insulative material over the conductive gate material. Elemental tungsten is selectively deposited within the void space over the conductive gate material and a transistor gate construction forming there-from is formed there-from, and which has a conductive gate electrode which includes the conductive gate material and the elemental tungsten. The transistor gate might be used in NAND, DRAM, or other integrated circuitry.
    Type: Application
    Filed: April 7, 2009
    Publication date: October 7, 2010
    Inventors: Eric R. Blomiley, Allen McTeer
  • Publication number: 20100210118
    Abstract: A thin film can be formed on a substrate at a low temperature with a practicable film-forming rate. There is provided a semiconductor device manufacturing method for forming an oxide or nitride film on a substrate. The method comprises: exposing the substrate to a source gas; exposing the substrate to a modification gas comprising an oxidizing gas or a nitriding gas, wherein an atom has electronegativity different from that of another atom in molecules of the oxidizing gas or the nitriding gas; and exposing the substrate to a catalyst. The catalyst has acid dissociation constant pKa in a range from 5 to 7, but a pyridine is not used as the catalyst.
    Type: Application
    Filed: February 17, 2010
    Publication date: August 19, 2010
    Applicant: HITACHI-KOKUSAI ELECTRIC, INC.
    Inventor: Norikazu Mizuno
  • Publication number: 20100151668
    Abstract: A method for fabricating an insulation layer includes forming an insulation layer over a nitride layer using a silicon source and a phosphorus source, wherein the insulation layer includes a first insulation layer contacting the nitride layer and a second insulation layer formed on the first insulation layer, wherein the first insulation layer is formed using a higher flow rate of the silicon source and a lower flow rate of the phosphorus source than used with the second insulation layer.
    Type: Application
    Filed: December 30, 2008
    Publication date: June 17, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Yang-Han YOON
  • Patent number: 7691736
    Abstract: Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A method comprises a short (?2 sec) flash activation of an ILD surface followed by flowing a precursor such as silane, DEMS, over the activated ILD surface. The precursor reacts with the activated ILD surface thereby selectively protecting the ILD surface. The protected ILD surface is resistant to plasma processing damage. The protected ILD surface eliminates the requirement of using a hard mask to protect a dielectric from plasma damage.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: April 6, 2010
    Assignee: Infineon Technologies AG
    Inventors: Michael Beck, John A. Fitzsimmons, Karl Hornik, Darryl Restaino
  • Patent number: 7691758
    Abstract: A method of forming an insulating film according to one embodiment of the present invention, which is a method of forming an insulating film for use in a semiconductor device, performs thermal oxidation of a tantalum nitride film at a temperature range of 200 to 400 degrees centigrade by a wet oxidation process, whereby a tantalum oxide film is formed as the insulating film.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: April 6, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Takayuki Iwaki
  • Patent number: 7651950
    Abstract: In a method for forming a fine pattern of a semiconductor device, forming a spacer for double patterning of a cell region is performed separate from forming a mask pattern that defines a dummy pattern for a pad of a peripheral circuit region.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: January 26, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Keun Do Ban
  • Publication number: 20090321733
    Abstract: Methods and compositions for depositing a metal containing film on a substrate are disclosed. A reactor and at least one substrate disposed in the reactor are provided. A metal containing precursor is provided and introduced into the reactor, which is maintained at a temperature of at least 100° C. A metal is deposited on to the substrate through a deposition process to form a thin film on the substrate.
    Type: Application
    Filed: June 25, 2009
    Publication date: December 31, 2009
    Inventors: Julien GATINEAU, Kazutaka Yanagita, Singo Okubo
  • Publication number: 20090269940
    Abstract: In a substrate nitriding method for nitriding a target substrate by allowing a nitrogen-containing plasma to act on silicon on a surface of the substrate in a processing chamber of a plasma processing apparatus, the nitridation by the nitrogen-containing plasma is performed by controlling a sheath voltage Vdc around the substrate to be less than or equal to about 3.5 eV. The sheath voltage Vdc is a potential difference Vp?Vf between a plasma potential Vp in a plasma generating region and a floating potential Vf of the substrate.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 29, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Toshio Nakanishi
  • Patent number: 7598540
    Abstract: The present invention relates to complementary metal-oxide-semiconductor (CMOS) devices having gapped dual stressors with dielectric gap fillers. Specifically, each CMOS device of the present invention includes at least one n-channel field effect transistor (n-FET) and at least one p-channel field effect transistor (p-FET). A tensilely stressed dielectric layer overlays the n-FET, and a compressively stressed dielectric layer overlays the p-FET. A gap is located between the tensilely and compressively stressed dielectric layers and is filled with a dielectric filler material. In one specific embodiment of the present invention, both the tensilely and compressively stressed dielectric layers are covered by a layer of the dielectric filler material, which is essentially free of stress. In an alternatively embodiment of the present invention, the dielectric filler material is only present in the gap between the tensilely and compressively stressed dielectric layers.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: October 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Bruce B. Doris, Thomas W. Dyer, David R. Medeiros, Anna W. Topol
  • Patent number: 7592630
    Abstract: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: September 22, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Kunisato, Ryoji Hiroyama, Masayuki Hata, Kiyoshi Oota
  • Patent number: 7589027
    Abstract: Provided is a method of manufacturing a semiconductor device. A first gate oxide layer is formed on a semiconductor substrate in which a core region and an input/output region are defined. The first gate oxide layer of the core region is selectively removed, and a second gate oxide layer is formed under the first gate oxide layer of the input/output region and on the semiconductor substrate of the core region. Nitrogen annealing is performed to form a nitrogen-rich oxide layer under the second gate oxide layer. An additional thermal process is performed to diffuse nitrogen segregated on an interface between the first gate oxide layer and the second gate oxide layer of the input/output region to a surface of the semiconductor substrate. Impurities generated during the additional thermal process are discharged to the outside.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 15, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Young Seong Lee
  • Patent number: 7550851
    Abstract: A process is described that forms a low resistivity connection between a tungsten layer and a silicon surface with high adherence of the tungsten to the silicon. The silicon surface is plasma-cleaned to remove native oxide. A very thin layer (one or more monolayers) of Si-NH2 is formed on the silicon surface, serving as an adhesion layer. A WNx layer is formed over the Si-NH2 layer, using an atomic layer deposition (ALD) process, to serve as a barrier layer. A thick tungsten layer is formed over the WNx layer by CVD. An additional metal layer (e.g., aluminum) may be formed over the tungsten layer.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: June 23, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: Huong T. Nguyen, Dennis Hausmann
  • Patent number: 7504332
    Abstract: A method and apparatus for depositing a material layer onto a substrate is described. The method includes delivering a mixture of precursors for the material layer into a process chamber and depositing the material layer on the substrate at low temperature. The material layer can be used as an encapsulating layer for various display applications which require low temperature deposition process due to thermal instability of underlying materials used. In one aspect, the encapsulating layer includes one or more material layers (multilayer) having one or more barrier layer materials and one or more low-dielectric constant materials. The encapsulating layer thus deposited provides reduced surface roughness, improved water-barrier performance, reduce thermal stress, good step coverage, and can be applied to many substrate types and many substrate sizes. Accordingly, the encapsulating layer thus deposited provides good device lifetime for various display devices, such as OLED devices.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: March 17, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Tae Kyung Won, Sanjay Yadav
  • Patent number: 7488613
    Abstract: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: February 10, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Kunisato, Ryoji Hiroyama, Masayuki Hata, Kiyoshi Oota
  • Publication number: 20080290417
    Abstract: An electronic component comprising several superimposed layers of materials including a TiCN barrier layer. A process for depositing a TiCN layer in order to obtain an electronic component, where a titanium precursor is chosen from among tetrakis (dimethylamido) titanium and/or tetrakis (diethylamido) titanium and is decomposed on a substrate by plasma-enhanced atomic layer deposition (PEALD) where the plasma is obtained with a hydrogen-rich gas which can contain nitrogen with at most 5 atomic % nitrogen and at least 95 atomic % hydrogen.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 27, 2008
    Applicant: STMicroelectronics SA
    Inventors: Pierre Caubet, Rym Benaboud
  • Publication number: 20080206909
    Abstract: A conventional composition of carbon nitride has a deposition method and properties limited. In the case of using the composition of carbon nitride as a protective film, for example, a material of an object to be coated (goods) is required to satisfy with a condition in disagreement with a temperature during forming the composition of carbon nitride. Besides, in the case of using the composition of carbon nitride as an insulating film in a semiconductor device, low stress relaxation and low coverage for a step are produced since the insulating film has a low hydrogen concentration. Consequently, a composition including carbon nitride according to the present invention is formed at a deposition temperature that enables to include hydrogen in the composition at 30 to 45 atomic %, for example, at temperatures of 100° C. or less, preferably 50° C. or less, more preferably from 20° C. to 30° C., with stability and adhesiveness kept.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shinji Maekawa