Inorganic Layer Composed Of Nitride (epo) Patents (Class 257/E21.292)
  • Patent number: 7488613
    Abstract: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: February 10, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Kunisato, Ryoji Hiroyama, Masayuki Hata, Kiyoshi Oota
  • Publication number: 20080290417
    Abstract: An electronic component comprising several superimposed layers of materials including a TiCN barrier layer. A process for depositing a TiCN layer in order to obtain an electronic component, where a titanium precursor is chosen from among tetrakis (dimethylamido) titanium and/or tetrakis (diethylamido) titanium and is decomposed on a substrate by plasma-enhanced atomic layer deposition (PEALD) where the plasma is obtained with a hydrogen-rich gas which can contain nitrogen with at most 5 atomic % nitrogen and at least 95 atomic % hydrogen.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 27, 2008
    Applicant: STMicroelectronics SA
    Inventors: Pierre Caubet, Rym Benaboud
  • Publication number: 20080206909
    Abstract: A conventional composition of carbon nitride has a deposition method and properties limited. In the case of using the composition of carbon nitride as a protective film, for example, a material of an object to be coated (goods) is required to satisfy with a condition in disagreement with a temperature during forming the composition of carbon nitride. Besides, in the case of using the composition of carbon nitride as an insulating film in a semiconductor device, low stress relaxation and low coverage for a step are produced since the insulating film has a low hydrogen concentration. Consequently, a composition including carbon nitride according to the present invention is formed at a deposition temperature that enables to include hydrogen in the composition at 30 to 45 atomic %, for example, at temperatures of 100° C. or less, preferably 50° C. or less, more preferably from 20° C. to 30° C., with stability and adhesiveness kept.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shinji Maekawa
  • Publication number: 20080070400
    Abstract: When forming a silicon nitride film to protect and insulate a surface on which a silicon substrate has been ground or polishing, by use of a mixed gas containing SiH4, N2, and NH3 as a reaction gas, a film is formed by a single-frequency parallel-plate plasma CVD method. Thereby, even when the film forming temperature is made not more than an allowable temperature limit of an adhesive to adhere a support (for example, approximately 100° C. or less, which is an allowable temperature limit when the adhesive is an ultraviolet curing resin), a high-quality film without exfoliation in a CMP step of the following step and with less leakage can be formed. This high-quality film is, if being prescribed by a refractive index, a film whose refractive index with respect to a wavelength of 633 nm is approximately 1.8 through 1.9.
    Type: Application
    Filed: August 28, 2007
    Publication date: March 20, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tatsuya Usami
  • Patent number: 7341903
    Abstract: A semiconductor structure comprises a transistor element formed in a substrate. A stressed layer is formed over the transistor element. The stressed layer has a predetermined compressive intrinsic stress having an absolute value of about 1 GPa or more. Due to this high intrinsic stress, the stressed layer exerts considerable elastic forces to the channel region of the transistor element. Thus, compressive stress is created in the channel region. The compressive stress leads to an increase of the mobility of holes in the channel region.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: March 11, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joerg Hohage, Hartmut Ruelke, Kai Frohberg
  • Patent number: 7335584
    Abstract: A method is provided for using SACVD deposition to deposit at least one layer of dielectric material inside a deposition reactor during the fabrication of at least one semiconductor integrated circuit. According to the method, a reaction chamber is provided for carrying out SACVD deposition, and a stream of a first reaction gas containing oxygen plasma is supplied into a gas feed conduit connected to the reaction chamber. Microwaves are applied inside the gas feed conduit in order to produce sufficient oxygen radicals from the oxygen plasma, the oxygen radicals being necessary to initiate SACVD deposition. A stream of a second reaction gas is supplied into the reaction chamber, with the second reaction gas being suitable to initiate SACVD deposition when reacting with oxygen radicals.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: February 26, 2008
    Assignee: STMicroelectronics S.r.l.
    Inventor: Michele Vulpio
  • Patent number: 7329591
    Abstract: A method for forming a silicon-containing film is described. A substrate is placed in a reaction chamber, and then a silicon-containing gas is introduced into the reaction chamber to conduct a CVD process and deposit a silicon-containing film on the substrate. During the CVD process, the temperature of at least the top inner surface of the reaction chamber is controlled below 50° C.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 12, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Che-Hung Liu, Po-Lun Cheng, Hwei-Lin Chuang, Chun-An Lin
  • Publication number: 20070298622
    Abstract: Disclosed is a producing method of a semiconductor device comprising a step of forming a tunnel insulating film of a flash device comprising a first nitridation step of forming a first silicon oxynitride film by nitriding a silicon oxide film formed on a semiconductor silicon base by one of plasma nitridation and thermal nitridation, the plasma nitridation carrying out nitridation process by using a gas activated by plasma discharging a first gas including a first compound which has at least a nitrogen atom in a chemical formula thereof, and the thermal nitridation carrying out nitridation process using heat by using a second gas including a second compound which has at least a nitrogen atom in a chemical formula thereof, and a second nitridation step of forming a second silicon oxynitride film by nitriding the first silicon oxynitride film by the other of the plasma nitridation and the thermal nitridation.
    Type: Application
    Filed: October 31, 2005
    Publication date: December 27, 2007
    Applicant: HITACHI KOKUSAI ELECTRIC INC,
    Inventors: Tadashi Terasaki, Akito Hirano, Masanori Nakayama, Unryu Ogawa
  • Patent number: 7306983
    Abstract: The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the silicide layer. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a protective layer to a device, applying a first silicon nitride liner to the device, removing a portion of the first silicon nitride liner, removing a portion of the protective layer, and applying a second silicon nitride liner to the device.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: December 11, 2007
    Assignee: International Business Machines Corporation
    Inventors: Dureseti Chidambarrao, Ying Li, Rajeev Malik, Shreesh Narasimha
  • Patent number: 7279433
    Abstract: A method for forming a dielectric layer is disclosed herein. In accordance with the method, a first material is provided (303) which comprises a suspension of nanoparticles in a liquid medium. A dielectric layer is then formed (305) on the substrate from the suspension through an evaporative process.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: October 9, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Peter L. G. Ventzek, Kurt Junker, Marius Orlowski
  • Patent number: 7259071
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: August 21, 2007
    Assignee: SilTerra Malaysia Sdn.Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue
  • Patent number: 7160802
    Abstract: A process is described that forms a low resistivity connection between a tungsten layer and a silicon surface with high adherence of the tungsten to the silicon. The silicon surface is plasma-cleaned to remove native oxide. A very thin layer (one or more monolayers) of Si—NH2 is formed on the silicon surface, serving as an adhesion layer. A WNx layer is formed over the Si—NH2 layer, using an atomic layer deposition (ALD) process, to serve as a barrier layer. A thick tungsten layer is formed over the WNx layer by CVD. An additional metal layer (e.g., aluminum) may be formed over the tungsten layer.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: January 9, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Huong T. Nguyen, Dennis Hausmann
  • Patent number: 7141500
    Abstract: A method of forming an aluminum containing film on a substrate includes providing a precursor having the chemical structure: Al(NR1R2)(NR3R4)(NR5R6); where each of R1, R2, R3, R4, R5 and R6 is independently selected from the group consisting of hydrogen and an alkyl group including at least two carbon atoms. The precursor is utilized to form a film on the substrate including at least one of aluminum oxide, aluminum nitride and aluminum oxy-nitride. Each of the R1–R6 groups can be the same or different and can by straight or branched chain alkyls. An exemplary precursor that has is useful in forming aluminum containing films is tris diethylamino aluminum.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: November 28, 2006
    Assignee: American Air Liquide, Inc.
    Inventors: Gregory M. Jursich, Ronald S. Inman