Of Silicon Nitride (epo) Patents (Class 257/E21.293)
  • Publication number: 20120295449
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.
    Type: Application
    Filed: August 3, 2012
    Publication date: November 22, 2012
    Applicant: ASM JAPAN K.K.
    Inventor: Atsuki Fukazawa
  • Patent number: 8304327
    Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
  • Patent number: 8294182
    Abstract: A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer over the first electrode, an active layer over the first semiconductor layer, and a second semiconductor layer over the second semiconductor layer; a second electrode over the second semiconductor layer; and a connection member having one end making contact with the first semiconductor layer and the other end making contact with the second semiconductor layer to form a schottky contact with respect to one of the first and second semiconductor layers.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: October 23, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hwan Hee Jeong
  • Publication number: 20120252188
    Abstract: A plasma processing method for use in device isolation by shallow trench isolation in which an insulating film is embedded in a trench formed in silicon and the insulating film is planarized to form a device isolation film, the method includes a plasma nitriding the silicon of an inner wall surface of the trench by using a plasma before embedding the insulating film in the trench. The plasma nitriding is performed by using a plasma of a processing gas containing a nitrogen-containing gas under conditions in which a processing pressure ranges from 1.3 Pa to 187 Pa and a ratio of a volumetric flow rate of the nitrogen-containing gas to a volumetric flow rate of the entire processing gas ranges from 1% to 80% such that a silicon nitride film is formed on the inner wall surface of the trench to have a thickness of 1 to 10 nm.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Ryota YONEZAWA, Kazuyoshi Yamazaki, Masaki Sano
  • Publication number: 20120252209
    Abstract: A plasma nitriding method includes placing, in a processing chamber, a target object having a structure including a first portion containing a metal and a second portion containing silicon to expose surfaces of the first and the second portion; and performing a plasma process on the target object to selectively nitride the surface of the first portion such that a metal nitride film is selectively formed on the surface of the first portion. Further, the first portion contains tungsten, and a nitrogen-containing plasma is generated by supplying a nitrogen-containing gas into the processing chamber and setting an internal pressure of the processing chamber in a range from 133 Pa to 1333 Pa. The surface of the first portion is selectively nitrided without nitriding the surface of the second portion by the nitrogen-containing plasma such that a tungsten nitride film is formed on the surface of the first portion.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 4, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshiro Kabe, Yoshihiro Sato
  • Publication number: 20120252224
    Abstract: A method of depositing a silicon oxide film and a silicon nitride film includes depositing the silicon oxide film and the silicon nitride film on a substrate, and a gas for forming the silicon nitride film further includes boron.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Atsushi ENDO, Masaki KUROKAWA, Hiroki IRIUDA
  • Patent number: 8269318
    Abstract: A method for forming an offset spacer of a MOS device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon; forming a dielectric stack on the substrate and the gate structure, wherein the dielectric stack includes a first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer; and performing an etching process on the dielectric stack to form an offset spacer around the gate structure.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: September 18, 2012
    Assignee: United Microelectronics Corp.
    Inventor: Chun Rong
  • Patent number: 8263489
    Abstract: A method for the deposition of an anti-reflection film on a substrate is disclosed. A substrate including a plurality of solar cell structures is provided and placed in a vacuum chamber with a target including silicon. A flow of a nitrogen-containing reactive gas into the vacuum chamber is set to a first value while a voltage between the target and ground is switched off and then increased to a second value. A voltage is applied between the target and ground, whereby a film of silicon and nitrogen is deposited on the substrate in a flow of the nitrogen-containing reactive gas which is higher than the first value.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: September 11, 2012
    Assignee: OC Oerlikon Balzers AG
    Inventors: Oliver Rattunde, Stephan Voser
  • Publication number: 20120220138
    Abstract: Assembly and method for depositing a thin film including: providing an expanding thermal plasma plume, including at least one chemical component to be deposited; designating a first and a second deposition zone within the plasma plume, such that the first and second deposition zones have a mutually different relative content of the chemical component; providing a substrate, and transporting said substrate through the plasma plume along a substrate transport path having a substrate transport path direction; and providing a mask that is at least partly disposed in the plasma plume and that shields a portion of the substrate transport path from being deposited on, wherein said shielded portion of the substrate transport path extends in the direction of the substrate transport path and bridges at least the first deposition zone, while it starts or terminates in the second deposition zone.
    Type: Application
    Filed: September 17, 2010
    Publication date: August 30, 2012
    Applicant: OTB SILAR B.V.
    Inventors: Björn Van Gerwen, Roland Cornelis Maria Bosch, Franciscus Cornelius Dings
  • Publication number: 20120208376
    Abstract: A method of forming a silicon nitride film by using a plasma CVD method, where the silicon nitride film has abundant traps and is useful as a charge accumulation layer of a nonvolatile semiconductor memory device. A silicon nitride film having a lot of traps is formed by performing plasma CVD by using processing gases including a nitrogen gas and a gas of a compound formed of silicon atoms and chlorine atoms, and by setting a pressure in a processing container within a range between more than or equal to 0.1 Pa and less than or equal to 8 Pa, in a plasma CVD apparatus that performs film-formation by introducing microwaves in the processing container by using a planar antenna having a plurality of holes to generate plasma.
    Type: Application
    Filed: September 28, 2010
    Publication date: August 16, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Masayuki Kohno, Toshio Nakanishi
  • Publication number: 20120196450
    Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 2, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
  • Publication number: 20120196452
    Abstract: High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 2, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Michael S. Cox, Li-Qun Xia, Mei-Yee Shek, Jia Lee, Vladimir Zubkov, Tzu-Fang Huang, Rongping Wang, Isabelita Roflox, Hichem M'Saad
  • Publication number: 20120184111
    Abstract: A selective plasma nitriding method includes mounting an object to be processed on a mounting table in a processing chamber of a plasma processing apparatus, the object having a silicon surface and a silicon compound layer exposed; setting a pressure in the processing chamber within the range of about 66.7 Pa to 667 Pa; and generating a nitrogen-containing plasma while applying a bias voltage to the object by supplying to the mounting table a high frequency power with an output of about 0.1 W/cm2 to 1.2 W/cm2 per unit area of the object. The plasma nitriding method further includes selectively nitriding the silicon surface by the nitrogen-containing plasma to form a silicon nitride film.
    Type: Application
    Filed: September 29, 2010
    Publication date: July 19, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Taichi Monden, Hideo Nakamura, Junichi Kitagawa
  • Patent number: 8222705
    Abstract: Disclosed herein is a solid-state image pickup device including: a trench formed in an insulating film above a light-receiving portion; a first waveguide core portion provided on an inner wall side of the trench; a second waveguide core portion filled in the trench via the first waveguide core portion; and a rectangular lens formed of the same material as that of the second waveguide core portion and provided integrally with the second waveguide core portion.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: July 17, 2012
    Assignee: Sony Corporation
    Inventors: Akiko Ogino, Yukihiro Sayama, Takayuki Shoya, Masaya Shimoji
  • Publication number: 20120178268
    Abstract: A plasma processing apparatus generates plasma by introducing microwaves into a processing chamber by using a planar antenna having a plurality of slots. By using the plasma processing apparatus, a nitrogen containing gas and a silicon containing gas introduced into the processing chamber are brought into the plasma state, and at the time of depositing by using the plasma a silicon nitride film on the surface of the a substrate to be processed, stress to the silicon nitride film to be formed is controlled by the combination of the type and the processing pressure of the nitrogen containing gas.
    Type: Application
    Filed: March 19, 2012
    Publication date: July 12, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masayuki KOHNO, Tatsuo NISHITA, Toshio NAKANISHI
  • Publication number: 20120178267
    Abstract: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.
    Type: Application
    Filed: March 19, 2012
    Publication date: July 12, 2012
    Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.
    Inventors: Ziyun Wang, Chongying Xu, Ravi K. Laxman, Thomas H. Baum, Bryan Hendrix, Jeffrey Roeder
  • Patent number: 8212286
    Abstract: The semiconductor light receiving element 1 includes a semiconductor substrate 101, and a semiconductor layer having a photo-absorption layer 105 disposed on the top of the semiconductor substrate 101. The semiconductor layer of the semiconductor light receiving element 1 containing at least the photo-absorption layer 105 has a mesa structure, and a side wall of the mesa is provided with a protective film 113 covering the side wall. The protective film 113 is a silicon nitride film containing hydrogen, and a hydrogen concentration in one surface of the protective film 113 located at the side of the mesa side wall is lower than a hydrogen concentration in the other surface of the protective film 113 located at the side that is opposite to the side of the mesa side wall.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: July 3, 2012
    Assignee: NEC Corporation
    Inventor: Emiko Fujii
  • Publication number: 20120164848
    Abstract: A plasma-assisted ALD method using a vertical furnace and being performed by repeating a cycle until a desired film thickness is obtained is disclosed. The cycle comprises introducing a source gas containing a source to be nitrided, adsorbing, purging, introducing a nitriding gas and nitriding the source, and then, purging. A flow rate of a second carrier gas during introduction of the nitriding gas is reduced relative to that of a first carrier gas during introduction of the source gas. Particularly, a flow ratio of NH3 gas as the nitriding gas to N2 gas as the second carrier gas is 50:3 or less.
    Type: Application
    Filed: December 28, 2011
    Publication date: June 28, 2012
    Applicants: Tokyo Electron Limited, Elpida Memory, Inc.
    Inventors: Motoki FUJII, Masanobu MATSUNAGA, Kazuya YAMAMOTO, Kota UMEZAWA
  • Publication number: 20120164845
    Abstract: The present invention generally provides apparatus and method for processing a substrate. Particularly, the present invention provides apparatus and methods to obtain a desired distribution of a process gas. One embodiment of the present invention provides an apparatus for processing a substrate comprising an injection nozzle having a first fluid path including a first inlet configured to receive a fluid input, and a plurality of first injection ports connected with the first inlet, wherein the plurality of first injection ports are configured to direct a fluid from the first inlet towards a first region of a process volume, and a second fluid path including a second inlet configured to receive a fluid input, and a plurality of second injection ports connected with the second inlet, wherein the second injection ports are configured to direct a fluid from the second inlet towards a second region of the process volume.
    Type: Application
    Filed: March 8, 2012
    Publication date: June 28, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Wei Liu, Johanes S. Swenberg, Hanh D. Nguyen, Son T. Nguyen, Roger Curtis, Philip A. Bottini
  • Publication number: 20120153442
    Abstract: Provided is a process of forming a silicon nitride film having concentration of hydrogen atoms below or equal to 9.9×1020 atoms/cm3 in the silicon nitride film by using a plasma CVD device, which generates plasma by introducing microwaves into a process chamber by using a planar antenna having a plurality of apertures, by setting the pressure inside a process chamber within a range from 0.1 Pa to 6.7 Pa and by performing a plasma CVD by using a raw material gas for film formation including SiCl4 gas and nitrogen gas.
    Type: Application
    Filed: June 20, 2011
    Publication date: June 21, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Masayuki Kohno
  • Publication number: 20120156894
    Abstract: This invention relates to silicon precursor compositions for forming silicon-containing films by low temperature (e.g., <550° C.) chemical vapor deposition processes for fabrication of ULSI devices and device structures. Such silicon precursor compositions comprise at least a silane or disilane derivative that is substituted with at least one alkylhydrazine functional groups and is free of halogen substitutes.
    Type: Application
    Filed: February 9, 2012
    Publication date: June 21, 2012
    Applicant: Advanced Technology Materials, Inc.
    Inventors: Ziyun Wang, Chongying Xu, Thomas H. Baum
  • Patent number: 8183079
    Abstract: A method of manufacturing a semiconductor device is disclosed. The method comprises: applying a sensing layer with variation in a secondary attribute according to heat, on a handle wafer; patterning the sensing layer, thus forming a cavity; forming a sensing part pattern having a beam structure in the cavity; forming a light-absorbing layer for converting energy of incident photons into heat, along the sensing part pattern; turning the entire structure over, removing the handle wafer, and thus exposing a rear portion of the sensing part pattern; and forming an additional light-absorbing layer on a rear portion of the light-absorbing layer formed on the sensing part pattern, thereby forming a sensing structure part having a beam structure.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: May 22, 2012
    Assignees: Hanvision Co., Ltd., Lumiense Photonics Inc.
    Inventor: Robert Hannebauer
  • Patent number: 8178400
    Abstract: A semiconductor fabrication method includes depositing a dummy gate layer onto a substrate, patterning the dummy gate layer, depositing a hardmask layer over the dummy gate layer, patterning the hardmask layer, etching a recess into the substrate, adjacent the dummy gate layer, depositing a semiconductor material into the recess, removing the hardmask layer, depositing replacement spacers onto the dummy gate layer, performing an oxide deposition over the dummy gate layer and replacement spacers, removing the dummy gate and replacement spacers, thereby forming a gate recess in the oxide and depositing a gate stack into the recess.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: May 15, 2012
    Assignee: International Business Machines Corporation
    Inventors: Josephine B. Chang, Michael A. Guillorn, Isaac Lauer, Amlan Majumdar
  • Patent number: 8178448
    Abstract: Disclosed is a method for using a film formation apparatus to form a silicon nitride film by CVD on target substrates while suppressing particle generation. The apparatus includes a process container and an exciting mechanism attached on the process container. The method includes conducting a pre-coating process by performing pre-cycles and conducting a film formation process by performing main cycles. Each of the pre-cycles and main cycles alternately includes a step of supplying a silicon source gas and a step of supplying a nitriding gas with steps of exhausting gas from inside the process container interposed therebetween. The pre-coating process includes no period of exciting the nitriding gas by the exciting mechanism. The film formation process repeats a first cycle set that excites the nitriding gas by the exciting mechanism and a second cycle that does not excite the nitriding gas by the exciting mechanism.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: May 15, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Nobutake Nodera, Masanobu Matsunaga, Kazuhide Hasebe, Koto Umezawa, Pao-Hwa Chou
  • Patent number: 8173554
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: May 8, 2012
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu, Deakyun Jeong
  • Patent number: 8168543
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: May 1, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim
  • Patent number: 8168549
    Abstract: There are provided a method of manufacturing a semiconductor device and a substrate processing apparatus by which the quality of a silicon nitride film can be improved. The method comprises: (a) supplying a silicon-containing gas into a process chamber accommodating a substrate in a heated state; (b) switching between an exhaust stop state and an exhaust operation state at least two times while a nitrogen-containing gas is supplied into the process chamber so as to vary an inside pressure of the process chamber such that a maximum inside pressure of the process chamber is at least twenty times higher than a minimum inside pressure of the process chamber. The steps (a) and (b) are alternately repeated to form a silicon nitride film on the substrate.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: May 1, 2012
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventor: Masayuki Asai
  • Publication number: 20120098108
    Abstract: Disclosed are a passivation film for an electronic device having a nitride film formed on a substrate by a plasma-enhanced chemical vapor deposition (PECVD) method using a silicon-containing gas and a nitrogen-containing gas and a plasma-processed film formed by plasma processing a surface of the nitride film by a PECVD method using an NH3 gas, an N2 gas, and a H2 gas, and a method of manufacturing the passivation film.
    Type: Application
    Filed: June 9, 2011
    Publication date: April 26, 2012
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Yong-Tak KIM, Yoon-Hyeung CHO, Min-Ho OH, Byoung-Duk LEE, So-Young LEE, Seung-Yong SONG, Jong-Hyuk LEE
  • Publication number: 20120094496
    Abstract: A process for treating a semiconductor-on-insulator type structure that includes, successively, a support substrate, an oxide layer and a thin semiconductor layer. The process includes formation of a silicon nitride or silicon oxynitride mask on the thin semiconductor layer to define exposed areas at the surface of the layer which are not covered by the mask, and which are arranged in a desired pattern; and application of a heat treatment in a neutral or controlled reducing atmosphere and under controlled conditions of temperature and time to induce at least a portion of the oxygen of the oxide layer to diffuse through the thin semiconductor layer, thereby resulting in the controlled reduction in the oxide thickness in the areas of the oxide layer corresponding to the desired pattern. The mask is formed so as to be at least partially buried in the thickness of the thin semiconductor layer.
    Type: Application
    Filed: September 21, 2009
    Publication date: April 19, 2012
    Inventors: Christelle Veytizou, Fabrice Gritti, Eric Guiot, Oleg Kononchuk, Didier Landru
  • Patent number: 8154059
    Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: April 10, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
  • Publication number: 20120068689
    Abstract: An EEPROM memory cell that includes a dual-gate MOS transistor in which the two gates are separated by an insulation layer, wherein the insulation layer includes a first portion and a second portion having lower insulation properties than the first one, the second portion being located at least partially above a channel area of the transistor.
    Type: Application
    Filed: December 31, 2008
    Publication date: March 22, 2012
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Pascal Fornara
  • Publication number: 20120070919
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Application
    Filed: November 23, 2011
    Publication date: March 22, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toru TAKAYAMA, Yuugo GOTO, Yumiko FUKUMOTO, Junya MARUYAMA, Takuya TSURUME
  • Patent number: 8138070
    Abstract: A method of forming a multi-doped junction is disclosed. The method includes providing a first substrate and a second substrate. The method also includes depositing a first ink on a first surface of each of the first substrate and the second substrate, the first ink containing a first set of nanoparticles and a first set of solvents, the first set of nanoparticles containing a first concentration of a first dopant. The method further includes depositing a second ink on a second surface of each of the first substrate and the second substrate, the second ink containing a second set of nanoparticles and a second set of solvents, the second set of nanoparticles containing a second concentration of a second dopant. The method also includes placing the first substrate and the second substrate in a back to back configuration; and heating the first substrate and the second substrate in a first drive-in ambient to a first temperature and for a first time period.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: March 20, 2012
    Assignee: Innovalight, Inc.
    Inventors: Maxim Kelman, Michael Burrows, Dmitry Poplavskyy, Giuseppe Scardera, Daniel Kray, Elena Rogojina
  • Patent number: 8138103
    Abstract: A plasma processing apparatus generates plasma by introducing microwaves into a processing chamber by using a planar antenna having a plurality of slots. By using the plasma processing apparatus, a nitrogen containing gas and a silicon containing gas introduced into the processing chamber are brought into the plasma state, and at the time of depositing by using the plasma a silicon nitride film on the surface of the a substrate to be processed, stress to the silicon nitride film to be formed is controlled by the combination of the type and the processing pressure of the nitrogen containing gas.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: March 20, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi
  • Patent number: 8138104
    Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: March 20, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
  • Patent number: 8129290
    Abstract: High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High tensile stress may be achieved by forming a silicon-containing layer on a surface by exposing the surface to a silicon-containing precursor gas in the absence of a plasma, forming silicon nitride by exposing said silicon-containing layer to a nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride created thereby. High tensile stress may also be achieved by exposing a surface to a silicon-containing precursor gas in a first nitrogen-containing plasma, treating the material with a second nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride formed thereby. In another embodiment, tensile film stress is enhanced by deposition with porogens that are liberated upon subsequent exposure to UV radiation or plasma treatment.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: March 6, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Michael S. Cox, Li-Qun Xia, Mei-Yee Shek, Jia Lee, Vladimir Zubkov, Tzu-Fang Huang, Rongping Wang, Isabelita Roflox, Hichem M'Saad
  • Patent number: 8129291
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: March 6, 2012
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu, Deakyun Jeong
  • Publication number: 20120052693
    Abstract: When alternately performing a film deposition step where a silicon-containing gas and O3 gas are alternately supplied to a substrate on a susceptor by rotating the susceptor thereby to forma thin film of the reaction product, and an alteration step where the reaction product is altered by irradiating plasma to the substrate, plasma intensity of the plasma is changed during film deposition. Specifically, the plasma intensity is lower when a thickness of the thin film is small (or at an initial stage of the film deposition—alteration step), and is increased as the thin film becomes thicker (or as the number of the film deposition steps is increased). Alternatively, the plasma intensity is higher when the thin film is relatively thin and then reduced.
    Type: Application
    Filed: August 24, 2011
    Publication date: March 1, 2012
    Applicant: Tokyo Electron Limited
    Inventors: Shigenori OZAKI, Hitoshi Kato, Takeshi Kumagai
  • Publication number: 20120045904
    Abstract: Embodiments of the disclosure generally provide methods of forming a hydrogen free silicon containing layer in TFT devices. The hydrogen free silicon containing layer may be used as a passivation layer, a gate dielectric layer, an etch stop layer, or other suitable layers in TFT devices, photodiodes, semiconductor diode, light-emitting diode (LED), or organic light-emitting diode (OLED), or other suitable display applications. In one embodiment, a method for forming a hydrogen free silicon containing layer in a thin film transistor includes supplying a gas mixture comprising a hydrogen free silicon containing gas and a reacting gas into a plasma enhanced chemical vapor deposition chamber, wherein the hydrogen free silicon containing gas is selected from a group consisting of SiF4, SiCl4, Si2Cl6, and forming a hydrogen free silicon containing layer on the substrate in the presence of the gas mixture.
    Type: Application
    Filed: August 20, 2011
    Publication date: February 23, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventor: Soo Young Choi
  • Publication number: 20120045905
    Abstract: Provided is a method of manufacturing a semiconductor device. The method includes: loading a substrate into a process vessel; performing a process to form an film on the substrate by alternately repeating: (a) forming a layer containing an element on the substrate by supplying at least two types of source gases into the process vessel, each of the at least two types of source gases containing the element, and (b) changing the layer containing the element by supplying reaction gas into the process vessel, the reaction gas being different from the at least two types of source gases; and unloading the processed substrate from the process vessel.
    Type: Application
    Filed: November 1, 2011
    Publication date: February 23, 2012
    Inventors: Naonori AKAE, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota, Ryota Sasajima
  • Patent number: 8120124
    Abstract: A method for forming silicon nitride films on semiconductor devices is provided. In one embodiment of the method, a silicon-comprising substrate is first exposed to a mixture of dichlorosilane (DCS) and a nitrogen-comprising gas to deposit a thin silicon nitride seeding layer on the surface, and then exposed to a mixture of silicon tetrachloride (TCS) and a nitrogen comprising gas to deposit a TCS silicon nitride layer on the DCS seeding layer. In another embodiment, the method involves first nitridizing the surface of the silicon-comprising substrate prior to forming the DCS nitride seeding layer and the TCS nitride layer. The method achieves a TCS nitride layer having a sufficient thickness to eliminate bubbling and punch-through problems and provide high electrical performance regardless of the substrate type. Also provided are methods of forming a capacitor, and the resulting capacitor structures.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: February 21, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Lingyi A. Zheng, Er-Xuan Ping
  • Patent number: 8119545
    Abstract: Provided is a plasma CVD device. In the plasma CVD device, in producing a silicon nitride film while controlling the size of a band gap by CVD, microwaves are introduced into a treatment vessel by a flat antenna having a plurality of holes. The plasma CVD is carried out under a given treatment pressure selected from a pressure range of not less than 0.1 Pa and not more than 1333 Pa at a flow ratio between a silicon-containing compound gas and a nitrogen gas (silicon-containing compound gas flow rate/nitrogen gas flow rate) selected from a range of not less than 0.005 and not more than 0.2, whereby the Si/N ratio in the film is controlled to form a silicon nitride film having a band gap size of not less than 2.5 eV and not more than 7 eV.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: February 21, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Minoru Honda, Toshio Nakanishi, Masayuki Kohno, Tatsuo Nishita, Junya Miyahara
  • Publication number: 20120040536
    Abstract: Embodiments of the present invention provide methods for depositing a nitrogen-containing material on large-sized substrates disposed in a processing chamber. In one embodiment, a method includes processing a batch of substrates within a processing chamber to deposit a nitrogen-containing material on a substrate from the batch of substrates, and performing a seasoning process at predetermined intervals during processing the batch of substrates to deposit a conductive seasoning layer over a surface of a chamber component disposed in the processing chamber. The chamber component may include a gas distribution plate fabricated from a bare aluminum without anodizing. In one example, the conductive seasoning layer may include amorphous silicon, doped amorphous silicon, doped silicon, doped polysilicon, doped silicon carbide, or the like.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 16, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Gaku Furuta, Soo Young Choi, Beom Soo Park, Young-jin Choi, Omori Kenji
  • Patent number: 8101492
    Abstract: One or more embodiments relate to a method of forming a semiconductor device, including: providing a substrate; forming a gate stack over the substrate, the gate stack including a control gate over a charge storage layer; forming a conductive layer over the gate stack; etching the conductive layer to remove a portion of the conductive layer; and forming a select gate, the forming the select gate comprising etching a remaining portion of the conductive layer.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: January 24, 2012
    Assignee: Infineon Technologies AG
    Inventors: John Power, Danny Pak-Chum Shum
  • Patent number: 8101529
    Abstract: A process for producing a carbon nanotube resistor that is capable of providing a highly reliable resistor or fuse. The process comprises the step of introducing a carbon nanotube in a volatile solvent to a first concentration and conducting ultrasonic treatment thereof to thereby obtain an initial solution; the dilution step of stepwise diluting the initial solution with a volatile solvent under ultrasonication so as to adjust the same to a second concentration, thereby obtaining a coating solution; and the step of applying the coating solution between a first electrode and a second electrode, wherein the first concentration is 1(E10?4 g/ml or higher and the second concentration lower than 1(E10?5 g/ml.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: January 24, 2012
    Assignee: NEC Corporation
    Inventor: Kaoru Narita
  • Patent number: 8101476
    Abstract: A method for forming a tensile SiN stress layer for stress memorization enhancement of NMOS transistors with a high Si—H/N—H bond ratio that does not degrade PMOS transistors. A CMOS integrated circuit is processed through a NMOS source and drain implant but not through NMOS source and drain anneal. A SiN dielectric layer is deposited such that an area ratio of a Si—H peak to a N—H peak in a FTIR spectrum is greater than 7 and a tensile stress of the SiN dielectric is greater than 150 MPa. The CMOS integrated circuit is annealed after deposition of the SiN dielectric layer and the SiN dielectric layer is removed from at least a part of the integrated circuit.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: January 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Kanan Garg, Haowen Bu, Mahalingam Nandakumar, Song Zhao
  • Publication number: 20120009803
    Abstract: A dual channel gas distributor can simultaneously distribute plasma species of an first process gas and a non-plasma second process gas into a process zone of a substrate processing chamber. The gas distributor has a localized plasma box with a first inlet to receive a first process gas, and opposing top and bottom plates that are capable of being electrically biased relative to one another to define a localized plasma zone in which a plasma of the first process gas can be formed. The top plate has a plurality of spaced apart gas spreading holes to spread the first process gas across the localized plasma zone, and the bottom plate has a plurality of first outlets to distribute plasma species of the plasma of the first process gas into the process zone. A plasma isolated gas feed has a second inlet to receive the second process gas and a plurality of second outlets to pass the second process gas into the process zone.
    Type: Application
    Filed: August 17, 2011
    Publication date: January 12, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Kee Bum Jung, Dale R. Du Bois, Lun Tsuei, Lihua Li Huang, Martin Jay Seamons, Soovo Sen, Reza Arghavani, Michael Chiu Kwan
  • Publication number: 20110318940
    Abstract: A method of manufacturing a semiconductor device includes forming a layer containing a predetermined element on a substrate by supplying a source gas containing the predetermined element into a process vessel and exhausting the source gas from the process vessel to cause a chemical vapor deposition (CVD) reaction. A nitrogen-containing gas is supplied into the process vessel and then exhausted, changing the layer containing the predetermined element into a nitride layer. This process is repeated to form a nitride film on the substrate. The process vessel is purged by supplying an inert gas into the process vessel and exhausting the inert gas from the process vessel between forming the layer containing the predetermined element and changing the layer containing the predetermined element into the nitride layer.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 29, 2011
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yosuke OTA, Yoshiro HIROSE, Naonori AKAE, Yushin TAKASAWA
  • Patent number: 8084312
    Abstract: A transistor is fabricated upon a semiconductor substrate, where the yield strength or elasticity of the substrate is enhanced or otherwise adapted. A strain inducing layer is formed over the transistor to apply a strain thereto to alter transistor operating characteristics, and more particularly to enhance the mobility of carriers within the transistor. Enhancing carrier mobility allows transistor dimensions to be reduced while also allowing the transistor to operate as desired. However, high strain and temperature associated with fabricating the transistor result in deleterious plastic deformation. The yield strength of the silicon substrate is therefore adapted by incorporating nitrogen into the substrate, and more particularly into source/drain extension regions and/or source/drain regions of the transistor. The nitrogen can be readily incorporated during transistor fabrication by adding it as part of source/drain extension region formation and/or source/drain region formation.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: December 27, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Srinivasan Chakravarthi, P R Chidambaram, Rajesh Khamankar, Haowen Bu, Douglas T. Grider
  • Patent number: 8076248
    Abstract: The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Cl2 to remove the exposed silicon nitride, while not removing at least the majority of the metal nitride from the containers. In subsequent processing, the containers can be incorporated into capacitors.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: December 13, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Kevin R. Shea, Thomas M. Graettinger