Abstract: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.

Abstract: A novel etching agent for etching II-VI semiconductors is provided. The etching agent includes an aqueous solution of potassium permanganate and phosphoric acid. This etching solution can etch II-VI semiconductors at a rapid rate but tend to be much less reactive with III-V semiconductors. The provided agent can be used in a method for etching II-VI semiconductors.

Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.

Abstract: Embodiments of a parallel system for epitaxial deposition are disclosed herein. In some embodiments, a parallel system for epitaxial deposition includes a first body having a first process chamber and a second process chamber disposed within the first body; a shared gas injection system coupled to each of the first and the second process chambers; and a shared exhaust system coupled to each of the first and second process chambers, the exhaust system having independent control of an exhaust pressure from each chamber. In some embodiments, the gas injection system provides independent control of flow rate of a gas entering each chamber.

Abstract: Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and spaced apart from the linear conveyor and configured to deposit material on the surface of the substrate as the substrate moves along the linear conveyor; wherein the substrate is coated by the multiplicity of HWCVD sources without breaking vacuum. In some embodiments, methods of coating substrates may include depositing a first material from an HWCVD source on a substrate moving through a first deposition chamber; moving the substrate from the first deposition chamber to a second deposition chamber; and depositing a second material from a second HWCVD source on the substrate moving through the second deposition chamber.

Abstract: A hot edge ring with extended lifetime comprises an annular body having a sloped upper surface. The hot edge ring includes a step underlying an outer edge of a semiconductor substrate supported in a plasma processing chamber wherein plasma is used to process the substrate. The step includes a vertical surface which surrounds the outer edge of the substrate and the sloped upper surface extends upwardly and outwardly from the upper periphery of the vertical surface.

Abstract: A particle monitoring apparatus includes a housing disposed on a gas exhaust line, a laser beam source for emitting a laser beam to particles in the gas exhaust line, a window member disposed at the housing for monitoring the particles in the gas exhaust line. The window member has a transparent base which is formed of a transparent resin or glass containing silicon and has a gas contact surface which faces a gas within the gas exhaust line, and a surface treatment layer formed on the gas contact surface of the transparent base, wherein the surface treatment layer contains one material selected from the group consisting of yttrium and calcium fluoride.

Abstract: Embodiments of dual mode inductively coupled plasma reactors and methods of use of same are provided herein. In some embodiments, a dual mode inductively coupled plasma processing system may include a process chamber having a dielectric lid and a plasma source assembly disposed above the dielectric lid. The plasma source assembly includes a plurality of coils configured to inductively couple RF energy into the process chamber to form and maintain a plasma therein, a phase controller for adjusting the relative phase of the RF current applied to each coil in the plurality of coils, and an RF generator coupled to the phase controller and the plurality of coils.

Abstract: An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The manganese silicate and manganese silicon nitride also promote strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use. The strong adhesion at the copper-manganese silicate and manganese silicon nitride interfaces also protect against failure by electromigration of the copper during use of the devices. The manganese-containing sheath also protects the copper from corrosion by oxygen or water from its surroundings.

Abstract: A plasma processing apparatus includes: a processing container capable of maintaining an atmosphere having a pressure lower than atmospheric pressure; an evacuation unit reducing a pressure of an interior of the processing container; a gas introduction unit introducing a process gas to the interior of the processing container; a microwave introduction unit introducing a microwave to the interior of the processing container; and a lifter pin ascendably and descendably inserted through a placement platform provided in the interior of the processing container, an end surface of the lifter pin supporting an object to be processed, the object to be processed being supported by the lifter pin at a first position proximal to an upper surface of the placement platform when the microwave is introduced and plasma is ignited, the object to be processed being supported by the lifter pin at a second position after the plasma ignition, the second position being more distal to the placement platform than the first position.

Abstract: A method of fabricating a multilayer substrate may include bonding a front face of a donor substrate to a front face of a receiver substrate by molecular adhesion to form a stack and applying a heat treatment to the stack to consolidate a bond interface between the donor substrate and the receiver substrate. The method may further include thinning a back face of the donor substrate, trimming a periphery of the donor substrate and at least a portion of a periphery of the receiver substrate, and etching the back face of the donor substrate, the periphery of the donor substrate, and the at least a portion of the periphery of the receiver substrate subsequent to thinning the back face of the donor substrate and trimming the periphery of the donor substrate and the at least a portion of the periphery of the receiver substrate.

Abstract: A method of processing a workpiece in a plasma reactor having an electrostatic chuck for supporting the workpiece within a reactor chamber, the method including circulating a coolant through a refrigeration loop that includes an evaporator inside the electrostatic chuck, while pressurizing a workpiece-to-chuck interface with a thermally conductive gas, sensing conditions in the chamber including temperature near the workpiece and simulating heat flow through the electrostatic chuck in a thermal model of the chuck based upon the conditions.

Abstract: Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.

Abstract: In a plasma processing apparatus for processing a substrate by plasmatizing a process gas introduced into a processing container, an introducing unit which introduces the process gas is formed on a ceiling surface of the processing container; a gas retention portion which gathers the process gas supplied from the outside of the processing container through a supply passage, and a plurality of gas ejection holes which allow communication between the gas retention portion and the inside of the processing container are formed in the introducing unit; a gas ejection hole is not formed in a location of the gas retention portion that faces an opening of the supply passage; and a cross section of each of the gas ejection holes has a flat shape.

Abstract: Disclosed is a method for modifying an insulating film with plasma using a plasma processing apparatus which introduces a microwave into a processing chamber through a plane antenna having a plurality of holes. Processing gas containing a noble gas and oxygen is introduced into the processing chamber and microwave is introduced into the processing chamber through the plane antenna. Plasma composed mainly of O2+ ions and O(1D2) radicals is generated in a pressure condition within a range of 6.7 Pa to 267 Pa to modify the insulating film with the plasma.

Abstract: A fin-semiconductor region (13) is formed on a substrate (11). A first impurity which produces a donor level or an acceptor level in a semiconductor is introduced in an upper portion and side portions of the fin-semiconductor region (13), and oxygen or nitrogen is further introduced as a second impurity in the upper portion and side portions of the fin-semiconductor region (13).

Abstract: A composition for polishing surfaces comprises the following components: a) at least one inorganic abrasive component (S) comprising a lanthanide oxide, b) at least one organic dispersing-agent component based on polymer (P), c) at least one organic gelling agent (G) such as gellan gum, d) water as solution or dispersing medium, and e) if appropriate further auxiliary and additive materials and has high stability.

Abstract: A manufacturing method of a semiconductor device using a semiconductor manufacturing unit comprising a reaction chamber, a substrate mounting stage, and a high frequency power supply coupled to the substrate mounting stage, a blocking capacitor interposed between the substrate mounting stage and the high-frequency power supply to continuously perform a plurality of dry etching processing with respect to the same substrate in the same reaction chamber, the method includes: disposing a substrate on a substrate mounting stage, and applying high-frequency powers to the substrate mounting stage while introducing a fluorocarbon-based first gas to perform a first dry etching processing with respect to the substrate, the substrate including an organic material film and a silicon compound film sequentially deposited on a surface thereof and a resist film patterned on the silicon compound film, the first dry etching processing including processing the silicon compound film with the resist film being used as a mask; and

Abstract: A dielectric board (20) is arranged on a ceiling surface, which is of a processing container (2) and faces a susceptor (3), a slot antenna (30) having a plurality of slots (33) which pass through microwaves is arranged on an upper surface of the dielectric board (20), and a protruding member (21), which is composed of a member different from the dielectric board (20) and eliminates abnormal discharge, is provided on a lower peripheral section of the dielectric board (20). A field strength at the peripheral section of the dielectric board (20) is controlled by adjusting a space between an outer circumference surface (22) of a cylindrical section of the protruding member (21) and a side wall inner circumference surface (5a) of the processing container (2) or adjusting the thickness of the cylindrical section of the protruding member (21).

Abstract: The present invention provides a method for etching a substrate in the manufacture of a semiconductor device, the method comprising contacting a surface of the substrate with ions extracted from a plasma formed from a gas comprising one or more of an oxygen-containing species, a nitrogen-containing species and an inert gas, and separately contacting the surface of the substrate with a plasma formed from a gas comprising a fluorine-containing species.

Abstract: A method of etching a material that includes comprising germanium, antimony, and tellurium encompasses exposing said material to a plasma-enhanced etching chemistry comprising Cl2 and CH2F2. A method of forming a variable resistance memory cell includes forming a conductive inner electrode material over a substrate. A variable resistance chalcogenide material comprising germanium, antimony, and tellurium is formed over the conductive inner electrode material. A conductive outer electrode material is formed over the chalcogenide material. The germanium, antimony, and tellurium-comprising material is plasma etched using a chemistry comprising Cl2 and CH2F2.

Abstract: A method of treating a nanoporous low-k dielectric material formed on a semiconductor substrate is provided. The low-k dielectric material has etched openings with an etch damaged region containing silanol groups on exterior surfaces of the etched openings and on interior surfaces of interconnected pores. First, the low-k dielectric material is contacted with a vapor phase catalyst in an amount effective to form hydrogen bonds between the catalyst and the silanol groups in the etch damaged region, forming a catalytic intermediary.

Abstract: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

Abstract: To provide a polishing composition which has a high removal rate and enables to suppress occurrence of dishing and erosion, in polishing of a surface to be polished in the production of a semiconductor integrated circuit device. A chemical mechanical polishing composition for polishing a surface to be polished of a semiconductor integrated circuit device comprises (A) fine oxide particles, (B) pullulan, and (C) water. The polishing composition further contains (D) an oxidizing agent, and (E) a compound represented by the formula 1: wherein R is a hydrogen atom, a C1-4 alkyl group, a C1-4 alkoxy group or a carboxylic acid group.

Abstract: A method is disclosed for adjusting the composition of plasmas used in plasma doping, plasma deposition and plasma etching techniques. The disclosed method enables the plasma composition to be controlled by modifying the energy distribution of the electrons present in the plasma. Energetic electrons are produced in the plasma by accelerating electrons in the plasma using very fast voltage pulses. The pulses are long enough to influence the electrons, but too fast to affect the ions significantly. Collisions between the energetic electrons and the constituents of the plasma result in changes in the plasma composition. The plasma composition can then be optimized to meet the requirements of the specific process being used. This can entail changing the ratio of ion species in the plasma, changing the ratio of ionization to dissociation, or changing the excited state population of the plasma.

Abstract: An improved method of forming a via hole is provided. This method makes it possible to form a via hole having a highly accurate processed shape in an insulating body. The insulating body has a multi-layer structure made of different kinds of insulating layers. The insulating body has, for example, a first insulating layer and a second insulating layer on the first insulating layer. The first insulating layer is provided on a lower wiring layer. The method includes a step of forming a first through hole in the second insulating layer by dry etching. The first through hole reaches the first insulating layer. The side wall of the first through hole defines an exposed portion of the second insulating layer. The bottom of the first through hole defines an exposed portion of the first insulating layer.

Abstract: A plasma processing system for plasma processing of substrates such as semiconductor wafers. The system includes a plasma processing chamber, a substrate support for supporting a substrate within the processing chamber, a dielectric member having an interior surface facing the substrate support, the dielectric member forming a wall of the processing chamber, a gas injector fixed to, part of or removably mounted in an opening in the dielectric window, the gas injector including a plurality of gas outlets supplying process gas into the chamber, and an RF energy source such as a planar or non-planar spiral coil which inductively couples RF energy through the dielectric member and into the chamber to energize the process gas into a plasma state. The arrangement permits modification of gas delivery arrangements to meet the needs of a particular processing regime. In addition, compared to consumable showerhead arrangements, the use of a removably mounted gas injector can be replaced more easily and economically.

Abstract: A platinum-comprising material is plasma etched by being exposed to a plasma etching chemistry that includes CHCl3, CO2 and O2. In one embodiment, a method of processing a semiconductor substrate in the fabrication of integrated circuitry includes forming metallic platinum-comprising nanoparticles over a material. A portion of the nanoparticles is masked and another portion of the nanoparticles is unmasked. The unmasked portion of the metallic platinum-comprising nanoparticles is plasma etched using a plasma etching chemistry comprising CHCl3, CO2 and O2. Other embodiments are disclosed.

Abstract: Provided is an etching solution composition for selectively etching a metal film, which is composed of Al, Al alloy or the like and is arranged on an amorphous oxide film, from a laminated film including the metal film and an amorphous oxide film of various types. The etching solution composition is used for selectively etching the metal film from the laminated film which includes the amorphous oxide film and the metal film composed of Al, Al alloy, Cu, Cu alloy, Ag or Ag alloy, and is composed of an aqueous solution containing an alkali.

Abstract: Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, and a remote plasma source configured to provide a remote plasma to the load lock.

Abstract: The present invention relates to new storage-stable solutions which can be used in semiconductor technology to effect specific etching of copper metallization layers and also Cu/Ni layers. With the new etch solutions it is possible to carry out etching and patterning of all-copper metallizations, layers of copper/nickel alloys, and also successive copper and nickel layers.

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method of processing a substrate may include providing a substrate having at least one of a defect or a contaminant disposed on or near a surface of the substrate; and selectively annealing a portion of the substrate with a laser beam in the presence of a process gas comprising hydrogen. The laser beam may be moved over the substrate or continuously, or in a stepwise fashion. The laser beam may be applied in a continuous wave or pulsed mode. The process gas may further comprise an inert gas, such as, at least one of helium, argon, or nitrogen. A layer of material may be subsequently deposited atop the annealed substrate.

Abstract: A disclosed top plate that is configured as a solid part and provided in an opening in a ceiling portion of a plasma process chamber whose inside is evacuatable to vacuum includes plural gas conduits formed in a horizontal direction of the top plate; and gas ejection holes that are open in a first surface of the top plate, the first surface facing the inside of the plasma process chamber and in gaseous communication with the plural gas conduits.

Abstract: A diameter of a mounting unit of the stage of an asking processing apparatus is less than a diameter of a mounting unit of the stage of an etching processing apparatus, and the diameter of the mounting unit of the stage of the etching processing apparatus is less than a diameter of an objective item.

Abstract: Provided are a wafer through silicon via (TSV) forming method and equipment therefor. The wafer TSV forming method includes the operations of arranging a wafer having a front surface having a circuit area patterned thereon; recognizing locations of bond pads in the circuit area of the front surface of the wafer by using an image recognition camera, and converting the recognition of the locations into bond pad location information with respect to a back surface of the wafer; flipping the wafer; forming etching holes with middle depth in the back surface of the wafer by using a laser in a manner to match the locations of the bond pads by using the bond pad location information from the image recognition camera; and performing a plasma isotropic etching on the back surface having formed therein the etching holes with middle depth, thereby forming TSVs penetrating the bond pads.

Abstract: A planar component for interfacing an atmospheric pressure ionizer to a vacuum system is described. The component combines electrostatic optics and skimmers with an internal chamber that can be filled with a gas at a prescribed pressure and is fabricated by lithography, etching and bonding of silicon.

Abstract: A plasma processing apparatus includes an antenna unit for generating plasma by using microwaves as a plasma source in such a way that a first region having a relatively high electron temperature of plasma, and a second region having a lower electron temperature of plasma than the first region are formed in a chamber, a first arranging means for arranging a semiconductor substrate W in the first region, a second arranging means for arranging the semiconductor substrate in the second region, and a plasma generation stopping means for stopping the generation of plasma of a plasma generating means, while the semiconductor substrate is arranged in the second region.

Abstract: A plasma processing apparatus includes a processing chamber, a sample stage for mounting an object to be processed, a power supply, and at least one induction coil connected to the power supply. The induction coil is formed by connecting at least two identical coil elements in a parallel circuit-like arrangement so that current flows in each of the plurality of identical coil elements in a same direction when viewed from the sample stage. The induction coil is positioned so that a center thereof corresponds to a center of the object, and input ends of the coil elements are displaced circumferentially at equal angular intervals calculated by dividing 360° by the number of identical coil elements.

Abstract: An apparatus includes: a process chamber for treating a substrate; a susceptor in the process chamber; a supporting frame over the susceptor; and at least one wire connected to the supporting frame.

Abstract: A method for controlling the flatness of a wafer between lithography pattern levels. A first lithography step is performed on a topside semiconductor surface of the wafer. Reference curvature information is obtained for the wafer. The reference curvature is other than planar. At least one process step is performed that results in a changed curvature relative to the reference curvature. The changed curvature information is obtained for the wafer. Stress on a bottomside surface of the wafer is modified that reduces a difference between the changed curvature and the reference curvature. A second lithography step is performed on the topside semiconductor surface while the modified stress distribution is present.

Abstract: In a plasma processing apparatus in which a radio-frequency power from a radio-frequency power source is supplied to an electrode disposed in a process vessel, to thereby generate, in the process vessel, plasma with which a substrate is processed, a chemical component emitting member which is caused to emit a chemical component necessary for processing the substrate into the process vessel by entrance of ions in the plasma generated in the process vessel is provided in the process vessel in an exposed state, and an impedance varying circuit varying impedance on the chemical component emitting member side of the plasma generated in the process vessel to frequency of the radio-frequency power source is connected to the chemical component emitting member.

Abstract: It was found out that when radicals generated by plasma are fed to a treatment chamber via a plurality of holes (111) formed on a partition plate which separates a plasma-forming chamber (108) from the treatment chamber, and the radicals are mixed with a treatment gas which is separately fed to the treatment chamber, the excitation energy of the radicals is suppressed and thereby the substrate surface treatment at high Si-selectivity becomes possible, which makes it possible to conduct the surface treatment of removing native oxide film and organic matter without deteriorating the flatness of the substrate surface. The radicals in the plasma are fed to the treatment chamber via radical-passing holes (111) of a plasma-confinement electrode plate (110) for plasma separation, the treatment gas is fed to the treatment chamber (121) to be mixed with the radicals in the treatment chamber, and then the substrate surface is cleaned by the mixed atmosphere of the radicals and the treatment gas.

Abstract: A method of forming an information storage pattern, includes placing a semiconductor substrate in a process chamber, injecting first, second and third process gases into the process chamber during a first process to form a lower layer on the substrate based on a first injection time and/or a first pause time, injecting the second process gas into the process chamber during a second process, wherein the second process gas is injected into the process chamber during a first elimination time, injecting a fourth process gas together with the second and third process gases into the process chamber during a third process in accordance with a second injection time and/or a second pause time to form an upper layer on the lower layer, and injecting the second process gas into the process chamber during a fourth process, wherein the second process gas is injected into the process chamber during a second elimination.

Abstract: A substrate processing apparatus includes: a depressurizable processing chamber 11; a shaft 26 supporting a facing electrode 24 provided within the processing chamber 11 while allowing the facing electrode 24 to be movable with respect to a mounting electrode 12; a first ring-shaped bellows 31 concentrically installed at an outer peripheral portion of the shaft 26; and a second bellows 32 concentrically installed at an outer peripheral portion of the first bellows 31. The first bellows 31 absorbs a displacement of the facing electrode 24 with respect to a wall surface 13 at a penetration portion where the shaft 26 penetrates the wall surface 13 of the processing chamber 11, and seals the inside of the processing chamber 11 against the ambient atmosphere around the shaft 26. A ring-shaped gas flow path 35 is formed by the first bellows 31 and the second bellows 32.

Abstract: A substrate processing apparatus includes: a cylindrical shaped chamber configured to accommodate a substrate; a movable electrode capable of moving along a central axis of the cylindrical shaped chamber within the cylindrical shaped chamber; a facing electrode facing the movable electrode within the cylindrical shaped chamber; and an expansible/contractible partition wall connecting the movable electrode with an end wall on one side of the cylindrical shaped chamber. In the substrate processing apparatus, a high frequency power is applied to a first space between the movable electrode and the facing electrode, a processing gas is introduced thereto, and the movable electrode is not in contact with a sidewall of the cylindrical shaped chamber. At least one low dielectric member is provided in a second space between the movable electrode and the end wall on one side of the cylindrical shaped chamber.

Abstract: A CMP composition containing a rheology agent, e.g., in combination with oxidizing agent, chelating agent, inhibiting agent, abrasive and solvent. Such CMP composition advantageously increases the materials selectivity in the CMP process and is useful for polishing surfaces of copper elements on semiconductor substrates, without the occurrence of dishing or other adverse planarization deficiencies in the polished copper.

Abstract: A method of cleaning semiconductor wafers using an acid cleaner followed by an alkaline cleaner to clean contaminants from the materials is provided. The acid cleaner removes substantially all of the metal contaminants while the alkaline cleaner removes substantially all of the non-metal contaminants, such as organics and particulate material.

Abstract: Provided is a temperature control device for controlling a temperature of a member to be exposed to plasma in a substrate processing apparatus. The substrate processing apparatus includes a mounting electrode for mounting a target substrate and a facing electrode positioned to face the mounting electrode, excites a processing gas supplied between the mounting electrode and the facing electrode into plasma, and performs a plasma process on the target substrate with the plasma. The temperature control device includes a heating layer configured to heat a heating target member, a heat insulating layer positioned in contact with an opposite surface to a heating layer's surface facing the heating target member, and a cooling layer positioned in contact with an opposite surface to a heat insulating layer's surface facing the heating layer.

Abstract: The invention provides a plasma processing apparatus for subjecting a sample to plasma processing by generating plasma within a vacuum processing chamber 1, wherein multiple sets (7, 7?) of high frequency induction antennas are disposed for forming an induction electric field that rotates in the right direction on an ECR plane of the magnetic field formed within the vacuum processing chamber 1, and plasma is generated via an electron cyclotron resonance (ECR) phenomenon. A Faraday shield 9 for blocking capacitive coupling and realizing inductive coupling between the high frequency induction antenna and plasma receives power supply via a matching box 46 from an output from a Faraday shield high frequency power supply 45 subjected to control of a phase controller 44 based on the monitoring of a phase detector 47-2.

Abstract: Embodiments of the present invention generally provide an inductively coupled plasma (ICP) reactor having a substrate RF bias that is capable of control of the RF phase difference between the ICP source (a first RF source) and the substrate bias (a second RF source) for plasma processing reactors used in the semiconductor industry. Control of the RF phase difference provides a powerful knob for fine process tuning. For example, control of the RF phase difference may be used to control one or more of average etch rate, etch rate uniformity, etch rate skew, critical dimension (CD) uniformity, and CD skew, CD range, self DC bias control, and chamber matching.