Assembling To Base An Electrical Component, E.g., Capacitor, Etc. Patents (Class 29/832)
  • Publication number: 20140029220
    Abstract: The invention relates to an electronic module, a support plate (2) having a base area (20) and at least one connection element (21). Said connection element (21) is a part of the base area (20) and is arranged at an angle (a) to the base area (20), in addition to at least one electronic component (3), in particular a sensor, which is arranged in the connection element (21).
    Type: Application
    Filed: February 29, 2012
    Publication date: January 30, 2014
    Applicant: ROBERT BOSCH GMBH
    Inventors: Holger Braun, Helmut Bubeck, Matthias Lausmann, Ralf Schinzel, Klaus Voigtlaender, Thomas Mueller, Benjamin Bertsch
  • Publication number: 20140029201
    Abstract: There is provided a power package module, including: a lead frame; at least one first electronic component mounted on the lead frame; and an insulating member disposed on a first surface of the first electronic component and having a via electrode connected to the first electronic component.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 30, 2014
    Inventors: Si Joong YANG, Do Jae Yoo, Joon Seok Chae
  • Publication number: 20140026410
    Abstract: A component mounting system and apparatus are provided that include a component mounting apparatus with a substrate holding device, a component supplying device, a head support portion, a mounting head and a forcing means. The mounting head is detachably attached to the head support portion. The mounting head of the system has a recording medium in which information relating to the mounting head is recorded. The system has an external storage portion that stores a plurality of batches of information relating to a plurality of mounting heads. The system further includes a recognizing portion that obtains and recognizes information from the external storage corresponding to the mounting head that is attached to the support portion.
    Type: Application
    Filed: October 1, 2013
    Publication date: January 30, 2014
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Seigo KODAMA, Shinsuke SUHARA
  • Publication number: 20140029206
    Abstract: Electronic devices are provided with ejectable component assemblies. Each ejectable component assembly may include a tray that can be loaded with one or more types of removable module, such as a mini-SIM card and a micro-SIM card, and inserted into the device. Each assembly may also include a cover coupled to a circuit board. The tray may be inserted through an opening in the electronic device and into a space between the cover and the circuit board. A portion of the space is contained within the pocket. A portion of the tray may be contained within the pocket when the tray is inserted into the device for holding the module at a functional insertion position within the device.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 30, 2014
    Applicant: APPLE INC.
    Inventors: Michael B. Wittenberg, Miguel C. Christophy, Shayan Malek
  • Publication number: 20140022745
    Abstract: A component includes a substrate having at least one flexible substrate area which has at least one area reinforced by forming a material composite. The material composite includes at least a portion of the flexible substrate area. The component also includes a first microstructured or nanostructured element and a connecting mechanism configured to attach the first microstructured or nanostructured element to the flexible substrate area. A damping mass is configured to cover at least the first microstructured or nanostructured element and a portion of the substrate protruding over the material composite. The component is configured to provide a secure receptacle for the electronic element and to offer good vibration decoupling of the electronic element from vibrations of the component.
    Type: Application
    Filed: November 28, 2011
    Publication date: January 23, 2014
    Applicant: Robert Bosch GmbH
    Inventor: Ricardo Ehrenpfordt
  • Publication number: 20140020940
    Abstract: A printed wiring board includes a core substrate, a first buildup layer formed on a first surface of the core substrate and including an insulation layer and a conductive layer, a second buildup layer formed on a second surface of the core substrate on the opposite side with respect to the first buildup layer and including an insulation layer and a conductive layer, and an inductor device positioned in the second buildup layer and including a resin insulation layer and a coil layer formed on the resin insulation layer. The second buildup layer has a cavity in which the inductor device is accommodated.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 23, 2014
    Inventors: Yasuhiko MANO, Kazuhiro YOSHIKAWA, Takashi KARIYA
  • Patent number: 8633398
    Abstract: The present disclosure provides a circuit board with a first via and a second via, the first and second vias providing an electrical path from a top surface of the circuit board to a bottom surface of the circuit board. The circuit board also includes a first contact pad electrically coupled to the first via and a second contact pad electrically coupled to the second via. The first contact pad is disposed at an angle with respect to a reference line crossing through the center of the first and second vias, and the second contact pad is disposed on an opposite side of the reference line at the angle with respect to the reference line, such that a footprint that encompasses an area between the first and second contact pads does not cover the first and second vias.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: January 21, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David G. Carpenter, Patrick A. Raymond, Jaime E. Llinas, Richard A. Barnett, John Hua
  • Patent number: 8631565
    Abstract: A method for manufacturing a solar concentrator cell module assembly within an integrated circuit process, which solar concentrator cell module assembly includes at least one solar device and which solar device includes one printed circuit board and one Fresnel lens. A printed circuit board is assembled according to a pre-defined circuit board base design layout that allows pick and place of a single solar concentrator cell chip onto a circuit board base. Connections are provided for the solar concentrator cell chip in a serialized or a parallelized arrangement on the circuit board base, and a plurality of openings are formed in the circuit board base below a backside of the solar concentrator chip to enable attachment of cooling fingers.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: January 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christian Becker, Hans-Juergen Eickelmann, Michael Haag, Rainer Klaus Krause, Thorsten Muehge, Markus Schmidt
  • Patent number: 8631566
    Abstract: A method for manufacturing a circuit board structure comprising at least one electrical component. The method comprises the steps of fabricating a conductive pattern on the surface of an essentially plane-like layer on the back side of the plane-like layer, and forming an electrical contact between the at least one electrical component and the conductive pattern.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: January 21, 2014
    Assignee: Imbera Electronics Oy
    Inventors: Petteri Palm, Tuomas Waris
  • Publication number: 20140016284
    Abstract: Systems and methods for the design and fabrication of flexible devices, including high-performance large-area OLEDs, narrow border display panels and lighting panels are provided. Various described fabrication- and design-processes may be used to provide the necessary electrical drive to lighting and display panels. Electrical drive may be provided to one or more row- and column-signals by patterning conductive elements near the panel edge. The electrical elements may further be folded over a region near the panel edge back on itself, such that electrical traces may route around the display edge. This may allow the display active area to be substantially the same area as its viewing area, and furthermore may allow pixels go substantially all the way to the edge of the viewing area.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Applicant: Universal Display Corporation (027166)
    Inventors: Michael Hack, Emory Krall, Ruiqing Ma
  • Patent number: 8627566
    Abstract: A ceramic header configured to form a portion of an electronic device package includes a mounting portion configured to provide a mounting surface for an electronic device. In addition, the ceramic header includes one or more conductive input-output connectors operable to provide electrical connections from a first surface of the ceramic header to a second surface of the ceramic header. The ceramic header also includes one or more thermally polished surfaces.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: January 14, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Moody K. Forgey, Mark A. Kressley
  • Patent number: 8627563
    Abstract: A process relating to a one step low pressure injection molding method of encapsulating high voltage circuitry while incorporating a unique recessed high voltage connector contact means within the injection molding material, greatly reducing the component size, while increasing the capabilities of this type of circuitry. The process reduces the manufacturing time and maintains a clean sealed contact point for repeated usage by the means of a conductive rubber slug. An additional advantage is by creating cavities through the circuit board; axially leaded high voltage components may be conveniently mounted without additional assembly components while being fully encapsulated.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: January 14, 2014
    Assignee: LHV Power, Inc.
    Inventors: Kenneth E. Wing, Scott T. Carroll
  • Publication number: 20140009995
    Abstract: An integrated circuit device (20, 60) includes a plurality of memory cells (22), which are configured to store data. Multiple P-N junctions (24) are arranged so that a single, respective P-N junction is disposed in proximity to each memory cell and is configured to emit optical radiation during readout from the memory cell with a wavelength matching an emission wavelength of the memory cell.
    Type: Application
    Filed: February 19, 2012
    Publication date: January 9, 2014
    Applicant: Cisco Technology Inc.
    Inventors: Lior Amarilio, Uri Bear, Reuven Elbaum, Yigal Shapiro, Chain D. Shen-Orr, Yonatan Shlomovich, Zvi Shkedy
  • Patent number: 8621748
    Abstract: A manufacturing method of a printed wiring board, including forming a plurality of electrodes on a conductive layer formed on a substrate by a plating method, forming an insulation layer on the electrodes and the conductive layer, removing the substrate from the conductive layer, patterning the conductive layer except for a resistor forming region reserved for forming a resistor, thereby forming an external connection conductive pattern, and forming a resistor in the resistor forming region such that the resistor is separated by a space from the external connection conductive pattern.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: January 7, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Michimasa Takahashi, Yukinobu Mikado, Hiroyuki Yanagisawa
  • Publication number: 20140003004
    Abstract: A method for producing a base substrate includes preparing an insulator substrate; forming a first film containing, as a main component, a metal that contains at least one of tungsten and molybdenum and has a melting point of 1000° C. or higher on the insulator substrate; forming a second film containing nickel as a main component and also containing boron on the first film; forming a first metal layer by performing a sintering treatment of the first film and the second film; and forming a second metal layer containing palladium as a main component on the first metal layer.
    Type: Application
    Filed: June 20, 2013
    Publication date: January 2, 2014
    Inventor: Tomoyuki KAMAKURA
  • Publication number: 20140002979
    Abstract: Embodiments provide a multi-chip socket including multiple cavities. The multiple cavities include support surfaces. The support surfaces may be disposed at different heights relative to a reference plane. The different heights may be determined in response to a height of a first component to be disposed in the first cavity and a height of a second component to be disposed in a second cavity.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Kevin B. Leigh, George D. Megason
  • Publication number: 20140002124
    Abstract: A wire probe assembly and forming process is described.
    Type: Application
    Filed: June 30, 2012
    Publication date: January 2, 2014
    Inventors: Todd P. Albertson, Michael T. Crocker, David Shia, Lothar R. Kress
  • Publication number: 20140002934
    Abstract: An ESD module is presented. The ESD module includes an ESD circuit and a latch-up (LU) control circuit. The ESD circuit has a pad terminal and a low power source terminal. The LU control circuit includes a first LU terminal coupled to a high power source and an LU output terminal coupled to the ESD circuit. The ESD module has first and second operating modes. In the first operating mode, the LU control circuit is deactivated and the ESD circuit has a first triggering current It1 which is less than 100 mA. In the second operating mode, the LU control circuit is activated and the ESD circuit has a second triggering current It2 which is greater than 100 mA.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Applicant: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Da-Wei LAI, Mahadeva Iyer NATARAJAN
  • Publication number: 20140002370
    Abstract: An apparatus including a substrate; at least one conductive path extending over the substrate and including a first portion of indium tin oxide connected in electrical series to a second portion of a different conductor.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventors: Aaron B. Konvisser, Mohammad Ali Mockarram-Dorri, Pasi Laine
  • Publication number: 20140002776
    Abstract: A stereoscopic image display device, includes an array substrate having a thin film transistor; a color filter substrate opposing the array substrate and having black matrixes disposed in first and second directions; a plurality of black stripes formed on the color filter substrate and corresponding to the black matrix in the first direction; a patterned retarder film formed on the plurality of black stripes; and wherein line widths of the plurality of black stripes increase towards first and second ends in the second direction. Due to the invention, the cross-talk problem can be improved.
    Type: Application
    Filed: November 30, 2012
    Publication date: January 2, 2014
    Applicant: Lg Display Co., Ltd.
    Inventors: Jin-Yeong Kim, Hee-Young Chae
  • Publication number: 20140003011
    Abstract: An electric element-embedded multilayer substrate, which is a multilayer substrate including an electric element embedded therein and a plurality of base material layers having flexibility, the electric element including a main surface and being embedded in the multilayer substrate to be sandwiched between the base material layers, and a slide member provided between the main surface of the electric element and the base material layer.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 2, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Noboru KATO, Masahiro OZAWA
  • Publication number: 20140002176
    Abstract: In one embodiment, an apparatus includes a cover panel. An adhesive layer is coupled to the cover panel. A perimeter of the adhesive layer forms at least a portion of a gasket seal extending substantially perpendicular to an inner surface of the cover panel. An inner surface of the gasket seal defines an edge of a channel. The apparatus also includes a substrate coupled to the adhesive layer. The substrate includes an outer surface having disposed thereon a connection pad region and drive or sense electrodes. The drive or sense electrodes are disposed between the substrate and the cover panel. At least a portion of the channel is disposed between the gasket seal and the connection pad region. The apparatus further includes a flexible printed circuit (FPC) electrically coupled by the connection pad region to the drive or sense electrodes. A first portion of the FPC extends through the channel.
    Type: Application
    Filed: December 31, 2012
    Publication date: January 2, 2014
    Inventor: David Brent Guard
  • Publication number: 20140002111
    Abstract: A sensing system includes an inductor-capacitor-resistor (LCR) resonator sensor having a substrate, a plurality of first sensing elements mutually spaced apart and disposed on the substrate, and a sensing material film being disposed on a first sensing region of the corresponding first sensing element.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Radislav Alexandrovich Potyrailo, Cheryl Margaret Surman, Steven Yuehin Go, Yongjae Lee
  • Patent number: 8615871
    Abstract: A chip mounted circuit substrate (COF) 4 to be installed on a liquid crystal display panel 1 comprises an arrangement wiring electrodes 42 formed on a base film 41 at a first pitch P1 in a first direction (A-direction) and two of first positioning marks 43 formed at both sides of the arrangement of the wiring electrodes 43 in the first direction. Before installing the COF 4 on the liquid crystal display panel 1 by thermo-compression bonding, the first pitch P1 of the wiring electrodes 42 is selected to be narrower than a second pitch P2 after performing the thermo-compression bonding in consideration with expansion of the base film 41 in the first direction. In addition, a part of each the first positioning mark 43 overlaps a second positioning mark 12 formed on the liquid crystal display panel 1 and protrudes outward from the second positioning mark 12 in the first direction.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 31, 2013
    Assignee: Funai Electric Co., Ltd.
    Inventor: Isao Eto
  • Patent number: 8615872
    Abstract: A flow measurement device and a method of manufacturing a flow measurement device having a measurement tube made from plastic or at least a plastic liner are provided. According to an exemplary embodiment, the measurement tube can be fabricated from plastic in an injection molding apparatus. Thereafter, electrical components of the measurement tube, such as electrodes and a coil holder, for example, can be concomitantly injection molded in a common, separate injection molding process. The electrical components can there be installed easier and more reliably in position.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: December 31, 2013
    Assignee: ABB Technology AG
    Inventors: Karl-Heinz Rackebrandt, Klaus Schäfer, Marco Ehrenberg
  • Publication number: 20130342992
    Abstract: Methods and systems may provide for a computing system including an electrical component, a heat exchanger coupled to the electrical component, and a fan having a rotor with a plurality of blades, one or more inlet sides and one or more outlet sides disposed adjacent to the heat exchanger. The computing system may also include an obstruction disposed adjacent to at least one of the one or more inlet sides of the fan, wherein a tone to be generated by the obstruction reduces a tonal noise associated with the fan during operation.
    Type: Application
    Filed: March 14, 2012
    Publication date: December 26, 2013
    Inventors: Mark MacDonald, Anthony Gerard
  • Publication number: 20130341078
    Abstract: A Z-directed component for mounting in a mounting hole in a printed circuit board according to one example embodiment includes a main body portion and a tapered end portion that facilitates insertion of the Z-directed component into the mounting hole in the printed circuit board. The tapered end portion is removably attached to the main body portion such that the tapered end portion may be removed after the Z-directed component is inserted into the mounting hole in the printed circuit board. A method for installing a Z-directed component having a removable tapered lead-in into the mounting hole according to one example embodiment includes inserting the Z-directed component into the mounting hole in the printed circuit board with the removable tapered lead-in leading the insertion and after the Z-directed component is inserted into the mounting hole, removing the removable lead-in from the rest of the Z-directed component.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 26, 2013
    Inventors: KEITH BRYAN HARDIN, Paul Kevin Hall, Zachary Charles Nathan Kratzer, Qing Zhang, John Thomas Fessler
  • Publication number: 20130343008
    Abstract: A circuit board system including mechanical protection of electrical components includes a circuit board (101) furnished with electrical components (103-111) and a protection element (102) attached to areas of the circuit board which are free from the electrical components. The protection element has thickness in the direction perpendicular to the circuit board and it is shaped to leave the electrical components unscreened in the direction perpendicular to the circuit board. Thus, the protection element constitutes barriers protecting the electrical components but still allows the electrical components to be accessed from the direction perpendicular to the circuit board for example in a flying probe testing. The body of the protection element can be made of same material as the electrically insulating body of the circuit board. Thus, the thermal expansion co-efficient of the protection element can be substantially the same as that of the circuit board.
    Type: Application
    Filed: June 12, 2013
    Publication date: December 26, 2013
    Inventors: Antti HOLMA, Peter KOKKO
  • Publication number: 20130342231
    Abstract: Various interposers and methods of manufacturing related thereto are disclosed. In one aspect, a method of manufacturing is provided that includes fabricating a first test structure onboard an interposer that has a first side and second side opposite the first side. Additional test structures may be fabricated.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Michael Alfano, Joel Siegel, Michael Z. Su, Bryan Black, Neil McLellan
  • Publication number: 20130343022
    Abstract: In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.
    Type: Application
    Filed: June 25, 2012
    Publication date: December 26, 2013
    Inventors: Chuan Hu, Vijay Nair
  • Publication number: 20130344716
    Abstract: A method for manufacturing a circuit board system includes attaching (501), to a circuit board, electrical components that constitute together with the circuit board a first functional entity and a second functional entity that are disconnected from each other so that operations of the first and second functional entities are substantially free from mutual interactions. The method includes directing (502) electrical activity, for example testing and/or data loading, to the first functional entity and/or to the second functional entity. Subsequently, the method includes providing (503) at least one galvanic connection between the first and second functional entities by pushing one or more press-fit pins in holes of the circuit board in order to enable the first and second functional entities to co-operate with each other. The method allows functional entity-specific testing, data loading, and other electrical activity after e.g. a soldering process and prior to possible functionality testing (504).
    Type: Application
    Filed: June 17, 2013
    Publication date: December 26, 2013
    Inventors: Alf BJORKLOF, Antti HOLMA
  • Patent number: 8613136
    Abstract: A printed wiring board is manufactured by a method in which a laminate body having a first insulation layer and a conductive film is provided. An alignment mark is formed in the laminate body by removing at least a portion of the conductive film. An electronic component is placed on an adhesive layer provided on the first insulation layer at a position determined based on the alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: December 24, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hironori Tanaka, Kazuhiro Yoshikawa, Naoaki Fujii, Atsunari Yamashita
  • Patent number: 8613135
    Abstract: Methods and apparatuses for assembly of a non-planar device based on curved chips are described. Slots may be created as longitudinal openings in the chips to reduce bending stresses to increase allowable degrees of deformation of the chips. The chips may be deformed to a desired deformation within the allowable degrees of deformation via the slots. Holding constraints may be provided on at least a portion of the chips to allow the chips to remain curved according the desired deformation.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 24, 2013
    Assignee: National Tsing Hua University
    Inventor: Long-Sheng Fan
  • Patent number: 8613134
    Abstract: Disclosed herein is method of operating a piece of surface mount technology manufacturing equipment. The method comprises providing a piece of surface mount technology manufacturing equipment having a first substrate transport track disposed in a first position and a second substrate transport track disposed in a second position, moving the first substrate transport track from the first position to a third position, and moving the second substrate transport track from the second position to the first position.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 24, 2013
    Assignee: Illinois Tool Works Inc.
    Inventor: Dennis G. Doyle
  • Publication number: 20130335808
    Abstract: This disclosure provides systems, methods and apparatus related to an electromechanical display device. In one aspect, an analog interferometric modulator (AIMOD) includes a reflective display pixel having a movable element disposed between first and second electrodes. The movable element includes a third electrode embedded within a deformable layer and a reflector. The movable element is moved to different positions between first and second electrodes, with different positions corresponding to different reflected colors from the AIMOD. In another aspect, the reflector is coupled to, but spaced apart from, the deformable layer, thereby decoupling the mechanical and optical properties of the movable element. In another aspect, the need for a bending region in the reflector is eliminated, providing for increased fill factor. In another aspect, the reflector may include a dielectric layer having substantially identical metal layers above and below, so as to provide increased rigidity to the reflector.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 19, 2013
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventor: Teruo Sasagawa
  • Publication number: 20130336511
    Abstract: A micro-sensor package is provided that includes a micro-sensor and printed circuit board (PCB), or that includes an array of micro-sensors and PCB. The micro-sensor includes a first substrate having opposing front and back surfaces, a sensing element on the front surface of the first substrate, and a through-chip via disposed within the first substrate and electrically connected to the sensing element. The PCB includes a second substrate to which the back surface of the first substrate is bonded. The second substrate defines a recess within which a bond pad is disposed, and the through-chip via of the micro-sensor is electrically connected to the bond pad of the PCB. The micro-sensor package may further include a shim bonded to the PCB, and that may surround an outer boundary of the micro-sensor and have approximately the same thickness as the micro-sensor.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 19, 2013
    Applicant: The Boeing Company
    Inventors: James Robert Underbrink, Mark Sheplak, Dylan Paul Alexander, Tiffany Nichole Reagan, Jessica Caitlin Meloy
  • Publication number: 20130333932
    Abstract: A printed circuit board is provided. The printed circuit board includes a base having a top and a bottom. The top has a first circuit area, a second circuit area and a slotted area disposed between the first circuit area and the second circuit area. The slotted area includes a first row of a plurality of first slots, each first slot of the plurality of first slots has a first length and is separated from an adjacent first slot by a first space. The slotted area includes a second row of a plurality of second slots that is positioned parallel with respect to the first row. Each second slot of the plurality of second slots has a second length that is different than the first length and is separated from an adjacent second slot by a second space. The second space includes a different length than the first space.
    Type: Application
    Filed: June 18, 2012
    Publication date: December 19, 2013
    Inventor: Philip W. Johnson
  • Publication number: 20130337666
    Abstract: Electronic assemblies and methods including the formation of interconnect assemblies are described. An electrical interconnection assembly may include a contact structure and a printed circuit board electrically coupled to the contact structure, the printed circuit board including an opening therein. The contact structure is positioned to extend within the opening in the printed circuit board and is movable in relation to the printed circuit board when a sufficient force is applied to the contact structure. Other embodiments are described and claimed.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 19, 2013
    Inventors: Joe F. Walczyk, Weida Qian
  • Patent number: 8607445
    Abstract: A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: December 17, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Frank D. Egitto, John M. Lauffer, How T. Lin
  • Publication number: 20130330942
    Abstract: An electrical interconnect providing an interconnect between contacts on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a resilient substrate with a plurality of through holes extending from a first surface to a second surface. A resilient material is located in the through holes. The resilient material includes an opening extending from the first surface to the second surface. A plurality of discrete, free-flowing conductive nano-particles are located in the openings of the resilient material. The conductive particles are substantially free of non-conductive materials. A plurality of first contact members are located in the through holes adjacent the first surface and a plurality of second contact members are located in the through holes adjacent the second surface. The first and second contact members are electrically coupled to the nano-particles.
    Type: Application
    Filed: August 19, 2013
    Publication date: December 12, 2013
    Inventor: James RATHBURN
  • Publication number: 20130329427
    Abstract: Methods and apparatus related to a circuit board having a dielectric layer (140A/B, 240A/B, 340, 440, 340B, 440B) on the top and/or bottom thereof. A circuit board is provided having a core layer (110, 210, 310, 410) and at least one conductive layer (130A/B,132A/B, 230A/B, 232A/B, 330, 430) positioned on a first side of the core layer (110, 210, 310, 410). An outer dielectric layer (140A/B, 240A/B, 340, 440, 340B, 440B) is provided atop an outermost of the at least one conductive layer (130A/B, 132A/B, 230A/B, 232A/B, 330, 430). The dielectric layer (140A/B, 240A/B, 340, 440, 340B, 440B) includes a plurality of openings (334A, 336A, 445A) that provide access to at least one of connection pads and vias that are in electrical contact with one or more of the conductive layer(s) (130A/B, 132A/B, 230A/B, 232A/B, 330, 430).
    Type: Application
    Filed: February 28, 2012
    Publication date: December 12, 2013
    Applicant: KONINKLIJKE PHILIPS N.V.
    Inventor: Pascal Pavao
  • Publication number: 20130329370
    Abstract: An electronic device comprising an electrically conductive core layer with a first layer composed of electrically conductive material, the first layer being applied on both sides and with at least one electronic component arranged in a cutout of the first layer, wherein the first layer is covered in each case with an electrically insulating, thermally conductive layer and a further layer composed of electrically conductive material is provided in each case on the thermally conductive layer, the further layer being coated in each case with a covering layer composed of electrically conductive material, and furthermore having plated-through boles composed of the material of the covering layer, which extend through the electrically insulating, thermally conductive layer covering the electronic component and the further layer composed of electrically and thermally conductive material for the purpose of making contact with the electronic component.
    Type: Application
    Filed: November 24, 2011
    Publication date: December 12, 2013
    Applicant: Schweizer Electronic AG
    Inventors: Thomas Gottwald, Christian Rossle
  • Publication number: 20130326872
    Abstract: A medical measurement device, such as an electronic thermometer, having a probe. The probe includes a molded plastic substrate having a conductive circuit pattern formed directly on its surface. The circuit pattern extends at least from a first end margin of the molded plastic substrate to a second end margin opposite the first. The device also includes a sensor mounted on the molded plastic substrate for detecting a physiological parameter, such as temperature. The sensor is positioned on the molded plastic substrate at the first end margin by at least one positioning element integrally formed in the substrate. The conductive circuit pattern provides an electrical connection between the sensor and a processor.
    Type: Application
    Filed: July 1, 2013
    Publication date: December 12, 2013
    Inventors: James Harr, Joseph T. Gierer
  • Publication number: 20130329388
    Abstract: A mounting structure includes a first ceramic electronic component including a ceramic body including internal electrodes and outer electrodes. When a voltage is applied to the outer electrodes, the ceramic body is strained with a first strain amount, and a second ceramic electronic component including a ceramic body including internal electrodes and outer electrodes. When a voltage is applied to the outer electrodes, the ceramic body is strained with a second strain amount greater than the first strain amount. The second ceramic electronic component is arranged above the first ceramic electronic component, and the first and second ceramic electronic components are connected to each other via each other's outer electrodes. The first ceramic electronic component to which the second ceramic electronic component is connected is connected to a land on a circuit substrate via the outer electrodes of at least the first ceramic electronic component.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 12, 2013
    Inventor: Kazuo DOGAUCHI
  • Publication number: 20130326871
    Abstract: Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.
    Type: Application
    Filed: August 13, 2013
    Publication date: December 12, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Houfei Chen, Shiyou Zhao
  • Publication number: 20130329365
    Abstract: A system and method for manufacturing an electric device package are disclosed. An embodiment comprises a carrier, a component disposed on the carrier, the component having a first component contact pad, and a first electrical connection between the first component contact pad and a first carrier contact pad, wherein the first electrical connection comprises a first hollow space, the first hollow space comprising a first liquid.
    Type: Application
    Filed: June 8, 2012
    Publication date: December 12, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Khalil Hosseini, Joachim Mahler
  • Publication number: 20130328732
    Abstract: A touchscreen includes a substrate including a conductive layer on a part of its surface, and an antenna being situated in a region where the conductive layer is not provided.
    Type: Application
    Filed: March 18, 2013
    Publication date: December 12, 2013
    Applicant: FUJITSU COMPONENT LIMITED
    Inventor: Kousuke SHIMIZU
  • Patent number: 8601681
    Abstract: Disclosed is an optical element to be subjected to a reflow process at high temperatures, wherein cracks or wrinkles can be prevented from occurring in an antireflection film. A method for producing the optical element, and a method for manufacturing an electronic device using the optical element are also disclosed. Specifically disclosed is a method for producing an optical element comprising a base, wherein at least one optical surface is composed of a resin material, and a coating formed on the optical surface of the base and composed of an inorganic material, the optical element being mounted on a substrate together with an electronic component by a reflow process at a temperature Ta. The method is characterized in that the coating is formed at a film-forming temperature Tb of not less than (Ta?60° C.), and a material having a glass transition temperature of not less than 290° C. or a glass transition temperature of not less than (Tb?50° C.) is used as the resin material.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: December 10, 2013
    Assignee: Konica Minolta Opto, Inc.
    Inventors: Akiko Hara, Setsuo Tokuhiro
  • Patent number: 8604609
    Abstract: A semiconductor package includes a curved body and a plurality of semiconductor die. The curved body includes first and second opposing end regions and an intermediate center region. The curved body has a first inflection point at the center region, a second inflection point at the first end region and a third inflection point at the second end region. The center region has a convex curvature with a minimal extremum at the first inflection point, the first end region has a concave curvature with a maximal extremum at the second inflection point and the second end region has a concave curvature with a maximal extremum at the third inflection point. The plurality of semiconductor die are attached to an upper surface of the curved body between the maximal extrema.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: December 10, 2013
    Assignee: Infineon Technologies AG
    Inventors: Anwar A. Mohammed, Soon Ing Chew, Donald Fowlkes, Alexander Komposch, Benjamin Pain-Fong Law, Michael Opiz Real
  • Patent number: RE44629
    Abstract: The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 10, 2013
    Assignee: Intel Corporation
    Inventors: Suresh Ramalingam, Nagesh Vodrahalli, Michael J. Costello, Mun Leong Loke, Ravi V. Mahajan