For Multilayer Capacitor Patents (Class 361/306.3)
  • Publication number: 20100039750
    Abstract: A multilayer capacitor comprises a capacitor element body constituted by a plurality of laminated dielectric layers; first and second signal terminal electrodes and a ground terminal electrode which are arranged on an outer surface of the capacitor element body; and a ground electrode, first and second signal electrodes, and an intermediate internal electrode which are arranged within the capacitor element body. The first signal electrode is connected to the first signal terminal electrode, while the second signal electrode is connected to the second signal terminal electrode. The ground electrode is connected to the ground terminal electrode and has a first region overlapping the first signal electrode in a first direction in which the plurality of dielectric layers are laminated and a second region overlapping the second signal electrode in the first direction.
    Type: Application
    Filed: July 10, 2009
    Publication date: February 18, 2010
    Applicant: TDK CORPORATION
    Inventors: Masaaki TOGASHI, Takeru YOSHIDA
  • Patent number: 7663861
    Abstract: An MIM capacitance element (capacitance lower electrode, capacitance insulation film and capacitance upper electrode) is provided on a first insulation film on a semiconductor substrate. An interlayer insulation film is provided so as to cover the MIM capacitance element and flattened. The interlayer insulation film is provided with a first connection plug connected to the capacitance upper electrode, a first wiring layer, and a second wiring layer. A second insulation film is provided on the interlayer insulation film. The second insulation film is provided with first and second openings. A wiring pull-out portion which connects the first connection plug and the second wiring layer to each other is provided on the second insulation film.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: February 16, 2010
    Assignee: Panasonic Corporation
    Inventor: Shinji Nishiura
  • Patent number: 7663862
    Abstract: A first internal electrode includes a main electrode portion whose longer-side direction agrees with a longer-side direction of first and second principal faces, and a lead portion extending from an end of the main electrode portion on the first end face side toward a first side face and connected to a first terminal electrode. A second internal electrode includes a main electrode portion whose longer-side direction agrees with the longer-side direction of the first and second principal faces, and a lead portion extending from an end of the main electrode portion on the first end face side toward a second side face and connected to a second terminal electrode. A third internal electrode includes a main electrode portion whose longer-side direction agrees with the longer-side direction of the first and second principal faces, and a lead portion extending from an end of the main electrode portion on the second end face side toward the first side face and connected to the first terminal electrode.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: February 16, 2010
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Publication number: 20100033894
    Abstract: A multilayer ceramic capacitor component includes a ceramic capacitor body having opposite ends and comprised of a plurality of electrode layers and dielectric layers, first and second external terminals attached to the ceramic capacitor body. The plurality of electrode layers include a plurality of alternating layers of active electrodes extending inwardly from alternating ends of the ceramic capacitor body. The capacitor may include a plurality of side shields disposed within the plurality of alternating layers of active electrodes to provide shielding with the alternating layers of active electrodes having a pattern to increase overlap area to provide higher capacitance without decreasing separation between the alternative layers of active electrodes. The capacitor may have a voltage breakdown of 3500 volts DC or more in air. The capacitor may have a coating. The capacitor provides improved resistance to arc-over, high voltage breakdown in air, and allows for small case size.
    Type: Application
    Filed: August 11, 2008
    Publication date: February 11, 2010
    Applicant: VISHAY SPRAGUE, INC.
    Inventors: JOHN BULTITUDE, JOHN JIANG, JOHN ROGERS
  • Patent number: 7660100
    Abstract: A through-type multilayer capacitor array comprises a capacitor body, and two first signal terminal electrodes, two second signal terminal electrodes, two grounding terminal electrodes, a first outer connecting conductor, and a second outer connecting conductor. The capacitor body includes a grounding inner electrode, and first to fourth signal inner electrodes. The grounding inner electrode is arranged to oppose the first or second signal inner electrode with an insulator layer in between and oppose the third or fourth signal inner electrode with an insulator layer in between while being connected to the grounding terminal electrodes. The first signal inner electrode is connected to the first signal terminal electrodes and first outer connecting conductor. The third signal inner electrode is connected to the second signal terminal electrodes and the second outer connecting conductor. The second and fourth signal inner electrodes are respectively connected to the first and second outer connecting conductor.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: February 9, 2010
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Publication number: 20100027190
    Abstract: A multilayer capacitor operable to allow adjustment of its equivalent series resistance substantially independent of its equivalent series inductance is disclosed. The multilayer capacitor can be used in decoupling circuits such as power supply decoupling circuits. The equivalent series resistance of the multilayer capacitor can be increased while suppressing an increase in the equivalent series inductance resulting in improved noise grounding.
    Type: Application
    Filed: July 24, 2009
    Publication date: February 4, 2010
    Applicant: KYOCERA CORPORATION
    Inventor: Hisashi Satou
  • Publication number: 20100027189
    Abstract: An element body has a major capacitance forming portion to form a first capacitance, and a minor capacitance forming portion to form a plurality of second capacitances smaller than the first capacitance. The major capacitance forming portion includes a first internal electrode connected to a first terminal electrode, and a second internal electrode opposed to the first internal electrode and connected to a second terminal electrode.
    Type: Application
    Filed: April 24, 2009
    Publication date: February 4, 2010
    Applicant: TDK Corporation
    Inventors: Masaaki TOGASHI, Hiroshi OKUYAMA, Yutaro KOTANI
  • Patent number: 7655530
    Abstract: An exemplary embodiment providing one or more improvements includes a capacitor with a segmented end electrode and methods for segmenting an end electrode of a capacitor for reducing or eliminating instances of thermally induced damage of the capacitor.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: February 2, 2010
    Assignee: SB Electronics, Inc.
    Inventor: Terry Hosking
  • Patent number: 7656644
    Abstract: A method including depositing a suspension of a colloid having an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device having a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate having at least one capacitor structure formed on a surface, the capacitor structure having a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material has columnar grains.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: February 2, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Dustin P. Wood
  • Patent number: 7653360
    Abstract: A high-frequency composite component for selectively switching a GSM-system signal path and a DCS-system signal path for a signal transmitted to or received from an antenna terminal by a diplexer. Transmission-side input terminals and reception-side balanced output terminals to be switched by high-frequency switches are included in the GSM and the DCS systems. Matching elements include inductors and capacitors that are inserted between the reception-side balanced output terminals and the output side of surface acoustic wave filters.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: January 26, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takanori Uejima, Naoki Nakayama, Tetsuro Harada, Kunihiro Koyama
  • Patent number: 7652869
    Abstract: A multilayer capacitor comprises a multilayer body and a plurality of terminal electrodes formed on a side face of the multilayer body. The multilayer body includes an inner layer portion in which a plurality of dielectric layers and a plurality of inner electrodes are alternately laminated, and an outer layer portion in which a plurality of dielectric layers are laminated. In the outer layer portion, a conduction path electrically connecting a plurality of different positions in at least one of the plurality of terminal electrodes to each other is arranged. A current flowing through the terminal electrode electrically connected to the conduction path is shunted into the conduction path. This lowers the equivalent series inductance of the multilayer capacitor.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: January 26, 2010
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Patent number: 7646585
    Abstract: A first internal electrode includes a first lead portion and a second lead portion. A second internal electrode includes a third lead portion and a fourth lead portion. A third internal electrode includes a main electrode portion and a fifth lead portion. A fourth internal electrode includes a main electrode portion and a sixth lead portion. A joint portion between the main electrode portion and the fifth lead portion of the third internal electrode is located between an edge on the first side face side and an edge on the second side face side in a capacitance forming region when viewed from an opposing direction of the third and fourth side faces. A joint portion between the main electrode portion and the sixth lead portion of the fourth internal electrode is located between an edge on the first side face side and an edge on the second side face side in a capacitance forming region when viewed from the opposing direction of the third and fourth side faces.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: January 12, 2010
    Assignee: NGK Insulators, Ltd.
    Inventor: Takashi Aoki
  • Patent number: 7646586
    Abstract: A multilayer capacitor comprises a multilayer body in which a plurality of dielectric layers and a plurality of first and second inner electrodes are laminated alternately, and first and second terminal electrodes arranged on the multilayer body. The first terminal electrode is electrically connected to the first inner electrodes. The first terminal electrode includes one or a plurality of resistance layers having a resistivity greater than that of the first inner electrode. The one or a plurality of resistance layers cover end portions of lead portions of the first inner electrodes exposed at the side face. Each resistance layer has a width wider than the lead portion of the first inner electrode but narrower than the width of the side face formed with the first terminal electrode.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: January 12, 2010
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Patent number: 7643268
    Abstract: Disclosed are embodiments of a capacitor with inter-digitated vertical plates and a method of forming the capacitor such that the effective gap distance between plates is reduced. This gap width reduction significantly increases the capacitance density of the capacitor. Gap width reduction is accomplished during back end of the line processing by masking connecting points with nodes, by etching the dielectric material from between the vertical plates and by etching a sacrificial material from below the vertical plates. Etching of the dielectric material from between the plates forms air gaps and various techniques can be used to cause the plates to collapse in on these air gaps, once the sacrificial material is removed. Any remaining air gaps can be filled by depositing a second dielectric material (e.g., a high k dielectric), which will further increase the capacitance density and will encapsulate the capacitor in order to make the reduced distance between the vertical plates permanent.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: January 5, 2010
    Assignee: International Business Machines Corporation
    Inventor: Anil K. Chinthakindi
  • Publication number: 20090316330
    Abstract: A multilayer ceramic electronic component includes dummy conductor patterns on a ceramic green sheet laminated in an earlier stage of the lamination and sheet-by-sheet crimping process that have widths that are less than the widths of dummy conductor patterns on a ceramic green sheet laminated in a later stage of the lamination and sheet-by-sheet crimping process.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 24, 2009
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Takumi TANIGUCHI, Hiroyuki MATSUMOTO
  • Patent number: 7636230
    Abstract: A multilayer capacitor array comprises a capacitor body having rectangular first and second main faces opposing each other. In the capacitor body having a dielectric characteristic, a first electrode group including first and second inner electrodes and a second electrode group including third and fourth inner electrodes are arranged in a row. The first and third inner electrodes are arranged in contact with a reference plane parallel to the opposing direction of the first and second main faces between the first electrode group and second electrode group. The second and fourth inner electrodes are arranged such as to be separated from the reference plane by a predetermined distance.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: December 22, 2009
    Assignee: TDK Corporation
    Inventor: Takashi Aoki
  • Publication number: 20090310276
    Abstract: A multilayer ceramic electronic component includes external terminal electrodes that are formed by direct plating on the first and second side surfaces of a ceramic body including stacked ceramic layers and inner conductors. The external terminal electrodes include base plating films formed so as to cover the exposed portions of inner conductors. Voids are provided that are open to the side surfaces of the ceramic body so as to be adjacent to the ends in the width direction of the exposed portions of the inner conductors. A plating metal defining the base plating films enters the voids and is electrically connected to the inner conductors in the ceramic body.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 17, 2009
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Takeshi TASHIMA, Hiroyuki MATSUMOTO
  • Publication number: 20090310277
    Abstract: A multilayer ceramic electronic component includes a ceramic body including a plurality of ceramic layers, the ceramic body having a first main surface and a second main surface and a plurality of side surfaces that connect the first main surface to the second main surface, an internal conductor including nickel, the internal conductor being disposed in the ceramic body and having an exposed portion exposed at least one of the side surfaces, and an external terminal electrode disposed on at least one of the side surfaces of the ceramic body, the external terminal electrode being electrically connected to the internal conductor. The external terminal electrode includes a first conductive layer including a Sn—Cu—Ni intermetallic compound, the first conductive layer covering the exposed portion of the internal conductor at least one of the side surfaces of the ceramic body.
    Type: Application
    Filed: May 21, 2009
    Publication date: December 17, 2009
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Takayuki Kayatani, Akihiro Motoki
  • Publication number: 20090310278
    Abstract: A multilayer electronic component includes a ceramic body including ceramic layers that are laminated to one another and internal conductors having exposed portions at side surfaces of the ceramic body. Substantially linear connection portions extend in the lamination direction of the ceramic layers so as to connect the exposed portions to one another. External terminal electrodes cover the exposed portions of the internal conductors and the connection portions and include base plating films directly disposed on the side surfaces by plating. The connection portions are formed by polishing the side surfaces in which the internal conductors are exposed using, for example, a brush so as to elongate the exposed portions of the internal conductors.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 17, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Masaki TANI
  • Patent number: 7633739
    Abstract: A capacitor device, which is mountable on a substrate, has an electrically conductive bottom lead frame with a bottom plate mountable substantially parallel to, and in contact with, the substrate and an electrically conductive top lead frame having a top plate spaced apart from the bottom plate and a first transition portion having a first end connected to the top plate and a second end, opposite the first end, electrically connectable to the substrate. Multilayer capacitors are mounted between the top plate and the bottom plate. The capacitors have opposed end terminations electrically connected to the top and bottom plates, such that internal electrode plates are substantially nonparallel to the substrate.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: December 15, 2009
    Inventor: Daniel Devoe
  • Patent number: 7630208
    Abstract: Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: December 8, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Hwa Lee, Sung Kwon Wi, Hae Suk Chung, Dong Seok Park, Sang Soo Park, Min Cheol Park
  • Publication number: 20090296312
    Abstract: A chip-type electronic component has: a ceramic element body; a plurality of first and second internal electrodes arranged in the ceramic element body so as to be opposed at least in part to each other; a first external connection conductor to which the plurality of first internal electrodes are connected; a second external connection conductor to which the plurality of second internal electrodes are connected; first and second terminal electrodes; a first internal connection conductor arranged in the ceramic element body and connecting the first external connection conductor and the first terminal electrode; and a second internal connection conductor arranged in the ceramic element body and connecting the second external connection conductor and the second terminal electrode.
    Type: Application
    Filed: May 21, 2009
    Publication date: December 3, 2009
    Applicant: TDK CORPORATION
    Inventors: Kaname Ueda, Dai Matsuoka, Naoki Chida, Izuru Soma, Hisayoshi Saito, Katsunari Moriai
  • Publication number: 20090296311
    Abstract: A ceramic electronic component has a ceramic element assembly, external electrodes, and metal terminals. The external electrodes are arranged on the surface of the ceramic element assembly. The external electrodes contain a sintered metal. The metal terminals are electrically connected to the external electrodes, respectively. The external electrode and the metal terminal are directly diffusion-bonded by diffusion of metal in the metal terminals into the external electrodes. The above arrangement provides a ceramic electronic component having highly reliable metal particle bonding and a method for manufacturing the same.
    Type: Application
    Filed: April 28, 2009
    Publication date: December 3, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideki OTSUKA, Kazuhiro YOSHIDA, Jun SONOYAMA, Yoji ITAGAKI, Akihiko NAKATA
  • Patent number: 7623336
    Abstract: The self-resonance insertion loss dip of a feedthrough capacitor is reduced or eliminated by raising the equivalent series resistance of the capacitor, thus minimizing the capacitor Q. The equivalent series resistance of the capacitor can be raised by forming voids in the active and/or ground electrode plates of the capacitor. The electrode plates may be formed so as to have a relatively reduced thickness, or a relatively increased thickness. A conductive material having a relatively high resistivity may be used to form the active and/or ground electrode plates of the capacitor. Alternatively, the conductive material forming the electrode plates may have a dielectric material added thereto.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: November 24, 2009
    Assignee: Greatbatch Ltd.
    Inventors: Robert A. Stevenson, Warren S. Dabney, Christine A. Frysz
  • Patent number: 7623338
    Abstract: In a device including multiple metal-insulator-metal (MIM) capacitors and a method of fabricating the same, the multiple MIM capacitors comprise a lower interconnect in a substrate; a first dielectric layer on the lower interconnect; a first intermediate electrode pattern on the first dielectric layer overlapping with the lower interconnect; a second intermediate electrode pattern on the first dielectric layer and spaced apart from the first intermediate electrode pattern in a same plane of the device as the first intermediate electrode pattern; a second dielectric pattern on the second intermediate electrode pattern; and an upper electrode pattern on the second dielectric pattern.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: November 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-jun Won
  • Publication number: 20090284896
    Abstract: A laminated ceramic electronic component includes a ceramic element and two external electrodes on both end surfaces of the ceramic element. The ceramic element includes a function part and lead parts thinner than the function part. Internal electrode layers are provided facing each other via a ceramic layer therebetween in the function part. The internal electrode layers are drawn out of the function part in the lead part. The external electrode includes an extended part and a curled part. The extended part is formed from the lead part through the function part on the main face. On the main face, the part of the extended part in the lead part is lower than the part of the function part. The curled part is formed from the end face of the ceramic element through the surface of the part of the extended part in the lead part on the main face.
    Type: Application
    Filed: April 1, 2009
    Publication date: November 19, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Tomoya Sakaguchi, Yukihito Yamashita
  • Patent number: 7619873
    Abstract: A feedthrough multilayer capacitor has a capacitor body, at least two signal terminal electrodes, at least one grounding terminal electrode, and at least one connecting conductor. The capacitor body includes a plurality of insulator layers laminated, a signal inner electrode and a first grounding inner electrode which are arranged so as to oppose each other with at least one insulator layer in between, and a second grounding inner electrode arranged so as to oppose the signal inner electrode or first grounding inner electrode with at least one insulator layer in between. The signal inner electrode is connected to the signal terminal electrodes. The first grounding inner electrode is connected to the connecting conductor. The second grounding inner electrode is connected to the grounding terminal electrode and connecting conductor.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: November 17, 2009
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Patent number: 7619872
    Abstract: Apparatuses, methods, and systems associated with and/or having capacitors are disclosed herein. In various embodiments, a capacitor may be formed within a substrate having an interwoven-fiber material. In various ones of these embodiments, a capacitor may have a first electrode including an activation material disposed on a surface of an interwoven-fiber material, a second electrode including an electrolytic solution, and an insulating material disposed between the first electrode and the second electrode.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: November 17, 2009
    Assignee: Intel Corporation
    Inventors: Xing Jin, Lei Hua, Yaling Zhao
  • Patent number: 7616427
    Abstract: A monolithic ceramic capacitor includes a first same-polarity-electrode-connecting conductor and a second same-polarity-electrode-connecting conductor that are provided inside a ceramic laminate. The first same-polarity-electrode-connecting conductor is electrically connected to all of the first outer electrodes, and the second same-polarity-electrode-connecting conductor is electrically connected to all of the second outer electrodes. Preferably, a plurality of first same-polarity-electrode-connecting conductors and a plurality of second same-polarity-electrode-connecting conductors are successively disposed in the laminating direction inside the ceramic laminate.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: November 10, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hirokazu Takashima, Hiroshi Ueoka, Yoshikazu Takagi
  • Publication number: 20090268372
    Abstract: When external electrodes of a multilayer ceramic capacitor are formed by performing direct plating on surfaces at which internal electrodes are exposed without forming paste electrode layers, bonding forces of plating layers are relatively weak, and in addition, when glass particles are included in the plating layers, blisters are often generated. To overcome these problems, a multilayer ceramic capacitor is formed by performing electrolytic plating using a plating bath including glass particles, electrolytic plating layers including glass particles dispersed therein are formed as the external electrodes.
    Type: Application
    Filed: January 21, 2009
    Publication date: October 29, 2009
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Makoto OGAWA, Akihiro MOTOKI, Ichiro NAKAMURA, Norihiro YOSHIKAWA, Toshiyuki IWANAGA, Kenichi KAWASAKI, Shunsuke TAKEUCHI
  • Publication number: 20090268373
    Abstract: A capacitor comprising: a plurality of laminated dielectric layers; a plurality of inner electrode layers each disposed between mutually adjacent ones of the dielectric layers; and dummy electrode layers respectively disposed between the dielectric layers, disposed on sides closer to outer peripheral sides of the dielectric layers than to the inner electrode layers and disposed apart from the inner electrode layers.
    Type: Application
    Filed: July 2, 2009
    Publication date: October 29, 2009
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Motohiko SATO, Kazuhiro HAYASHI, Akifumi TOSA, Kenji MURAKAMI, Tomohide YAMADA, Motonobu KURAHASHI
  • Patent number: 7605048
    Abstract: High capacitance value capacitors are formed using bimetal foils of an aluminum layer attached to a copper layer. The copper side of a bimetallic copper/aluminum foil or a monometallic aluminum foil is temporarily protected using aluminum or other materials, to form a sandwich. The exposed aluminum is treated to increase the surface area of the aluminum by at least one order of magnitude, while not attacking any portion of the protected metal. When the sandwich is separated, the treated bimetal foil is formed into a capacitor, where the copper layer is one electrode of the capacitor and the treated aluminum layer is in intimate contact with a dielectric layer of the capacitor.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: October 20, 2009
    Assignees: Kemet Electronics Corporation, Motorola, Inc.
    Inventors: Gregory J. Dunn, Jovica Savic, Philip M. Lessner, Albert K. Harrington
  • Patent number: 7602599
    Abstract: A method of making a metal-metal capacitor is disclosed, in which a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, and a third metal layer are formed in the order over a substrate; an upper capacitor is defined by etching using a first mask, wherein the stop of the etching can be controlled; a lower capacitor is defined by etching using a second mask; and an anti-reflective third mask is formed to cover the surface, and the capacitor border and metal interconnect conductive wire are defined, so as to make a metal-metal capacitor with a stable structure in a wide process window.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: October 13, 2009
    Assignee: United Microelectronics Corp.
    Inventor: Chien-En Hsu
  • Patent number: 7602601
    Abstract: A multilayer capacitor is provided that includes a dielectric body, an internal layer portion, an external layer portion and a first terminal electrode and a second terminal electrode to be set at different electric potentials from each other and formed at least on a side face parallel to stacking direction Z of side faces of the dielectric body. Each of the first terminal electrodes are connected with at least one of the first internal conductor layer and a plurality of the first external conductor layers and each of the second terminal electrodes are connected with at least one of the second internal conductor layer and a plurality of the second external conductor layers. The dielectric layer positioned at the external layer portions comprises a plurality of pin hole conducting portions.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: October 13, 2009
    Assignee: TDK Corporation
    Inventor: Masaaki Togashi
  • Patent number: 7599166
    Abstract: A multilayer chip capacitor includes a capacitor body having dielectric layers, and internal electrode layers separated from each other in the capacitor body by the dielectric layers. Each internal electrode layer has one or two leads and includes at least one coplanar electrode plate. External electrodes are electrically connected to the internal electrode layers via the leads. The internal electrode layers constitute a plurality of blocks stacked repeatedly. Each block includes a plurality of the internal electrode layers stacked successively. The leads extending to a face of the capacitor body are arranged in a zigzag shape along a stacking direction. The leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: October 6, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Hwa Lee, Hae Suk Chung, Dong Seok Park, Min Cheol Park, Sang Soo Park, Sung Kwon Wi
  • Patent number: 7599165
    Abstract: Provided are palladium-containing powders and a method and apparatus for manufacturing the palladium-containing particles of high quality, of a small size and narrow size distribution. An aerosol is generated from liquid feed and sent to a furnace, where liquid in droplets in the aerosol is vaporized to permit formation of the desired particles, which are then collected in a particle collector. The aerosol generation involves preparation of a high quality aerosol, with a narrow droplet size distribution, with close control over droplet size and with a high droplet loading suitable for commercial applications. Powders may have high resistance to oxidation of palladium. Multi-phase particles are provided including a palladium-containing metallic phase and a second phase that is dielectric. Electronic components are provided manufacturable using the powders.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: October 6, 2009
    Assignee: Cabot Corporation
    Inventors: Mark J. Hampden-Smith, Toivo T. Kodas, Quint H. Powell, Daniel J. Skamser, James Caruso, Clive D. Chandler
  • Patent number: 7595973
    Abstract: There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units disposed in a laminated direction; first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively; and at least one connecting conductor line connecting the first and third outer electrodes having identical polarity to each other and the second and fourth outer electrodes having identical polarity to each other, wherein the first capacitor body includes first and second inner electrodes, the second capacitor unit includes a plurality of third and fourth inner electrodes, the first to fourth outer electrodes are connected to the first to fourth inner electrodes, respectively, and an equivalent series resistance (R1) of the first capacitor unit and a combined equivalent series resistance (R2?) of the second capacitor and the connecting conductor line satisfy the Equation 0.7(R1)?R2??1.3(R1).
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: September 29, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Hwa Lee, Sung Kwon Wi, Hae Suk Chung, Dong Seok Park, Sang Soo Park, Min Cheol Park
  • Patent number: 7593215
    Abstract: The present invention relates to a multi-layer ceramic capacitor printed simultaneously with internal electrode and external electrode by employing an inkjet printing. A method for manufacturing the multi-layer ceramic capacitor comprising first external electrode, dielectric, internal electrode and second external electrode prints simultaneously the first external electrode; the internal electrode which is connected with the first external electrode and formed at an invaginated portion of the dielectric invaginated to allow one side to be opened at one portion; and the second external electrode which is formed integrally with the internal electrode by employing an inkjet printing. According to the present invention, a method for manufacturing the multi-layer ceramic capacitor resolves contact problems by printing integrally the internal electrode and the external electrode and reduces the manufacturing process.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: September 22, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kwi-Jong Lee, Young-Soo Oh, Jin-Yong Kim
  • Publication number: 20090231779
    Abstract: In a multilayer capacitor, widths of lead conductors of internal electrode and widths of lead conductors of internal electrode in an ESR control section are smaller than any one of widths of internal electrode and widths of internal electrode in a capacitance section. This narrows cross sections of the conductor portions connecting between the internal electrodes and the external electrodes, so as to her increase ESR. The widths of the respective lead conductors in the ESR control section are wider than widths of respective lead conductors in the capacitance section. This effectively prevents open failure and improves a yield of products.
    Type: Application
    Filed: January 29, 2009
    Publication date: September 17, 2009
    Applicant: TDK CORPORATION
    Inventor: Takashi AOKI
  • Publication number: 20090230446
    Abstract: A semiconductor device includes an Si substrate having a first surface provided with semiconductor elements, such as a CMOS transistor and a diode, and a second surface opposite to the first surface. On one of the first and the second surfaces, a bypass capacitor is formed. The bypass capacitor includes a Vcc power supply layer and a GND layer which serve to supply a power supply voltage to the semiconductor element, and a high dielectric constant layer sandwiched between the Vcc power supply layer and the GND layer.
    Type: Application
    Filed: March 17, 2008
    Publication date: September 17, 2009
    Inventor: Seisei Oyamada
  • Patent number: 7589952
    Abstract: A multilayer electronic device includes a laminate and an external electrode that is formed on an end surface of the laminate after a plurality of conductive particles having a particle diameter of about 1 ?m or more is adhered to the end surface of the laminate, for example, by a sandblast method or a brush polishing method. The external electrode is defined by a plating film that is formed by electroplating or electroless plating.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: September 15, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiro Motoki, Kenichi Kawasaki, Makoto Ogawa, Shigeyuki Kuroda, Tatsuo Kunishi
  • Patent number: 7589954
    Abstract: Provided is a multilayer ceramic capacitor including external electrodes which also functions as a resistive element, and the external electrodes achieve strong bonding with internal electrodes containing Ni or a Ni alloy. The external electrodes include a resistive electrode layers contacting a ceramic laminate and internal electrodes. The resistive electrode layers contains a complex oxide which reacts with Ni or a Ni alloy contained in the internal electrodes in a proportion of 26 to 79% by weight, a glass component in a proportion of 20 to 56% by weight, and metal which reacts with Ni or a Ni alloy in a proportion of 1 to 18% by weight.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: September 15, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsuhiro Kusano, Toshiki Nagamoto
  • Patent number: 7589951
    Abstract: A laminated body is prepared, in which at an end surface at which internal electrodes are exposed, the internal electrodes disposed adjacently are electrically isolated from each other, and a distance between the internal electrodes disposed adjacently is about 20 ?m or less when measured along the thickness direction of an insulator layer, and a withdrawn-depth of the internal electrodes is about 1 ?m or less when measured from the end surface. In a step of electroless plating, plating deposits formed at the end portions of the plurality of internal electrodes are increased in size so as to be connected to each other.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: September 15, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuo Kunishi, Makoto Ogawa, Akihiro Motoki
  • Patent number: 7589953
    Abstract: A multilayer capacitor has a first inner electrode connected to a first terminal electrode, a second inner electrode connected to a second terminal electrode, and third and fourth inner electrodes connected to third and fourth terminal electrodes. The first and second inner electrodes have no overlapping area therebetween when seen in the opposing direction of the first and second main faces and are arranged at respective positions different from each other in the opposing direction of the first and second main faces and in the opposing direction of the first and second side faces. The third and fourth inner electrodes have no overlapping area therebetween when seen in the opposing direction of the first and second main faces and are arranged at respective positions different from each other in the opposing direction of the first and second main faces and in the opposing direction of the first and second side faces.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: September 15, 2009
    Assignee: TDK Corporation
    Inventors: Masaaki Togashi, Takashi Aoki, Hiroshi Abe, Hiroshi Okuyama
  • Publication number: 20090219669
    Abstract: A capacitor includes a first terminal having a first polarity, a second terminal having a second polarity opposed to the first polarity, and a plurality of columnar portions for connecting the first terminal to the second terminal. Each of the plurality of columnar portions includes a first conductor bar electrically connected to the first terminal, a second conductor bar electrically connected to the second terminal, and a dielectric layer between the first and second conductor bars.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 3, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Chee Hong Lai
  • Publication number: 20090212883
    Abstract: A feedthrough filter includes a base plate having a first contact surface and a second contact surface. The first contact surface and the second contact surface are galvanically connected. The first contact surface is on an upper side of the base plate and the second contact surface is on an underside of the base plate. The base plate has an opening. An electrical feedthrough passes through the opening, is soldered to the second contact surface, and is not soldered to the first contact surface. A least one electrical component includes an external contact that is soldered to first contact surface.
    Type: Application
    Filed: March 14, 2006
    Publication date: August 27, 2009
    Inventors: Markus Albrecher, Günter Engel, Markus Ortner
  • Patent number: 7580269
    Abstract: A power shunt for use within a semiconductor device of a type having a motherboard and an integrated circuit package electrically coupled to the motherboard and of a type having a spaced portion located between the motherboard and the package. The power shunt comprises a capacitor within the spaced portion between the motherboard and the package of the semiconductor device. The capacitor includes a conductive layer of a first type, a conductive layer of a second type, and a dielectric layer that electrically isolates the first type conductive layer from the second type conductive layer, wherein said first type conductive layer and second type conductive layer form a conductive bridge between the motherboard and the package. The arrangement of the capacitor fulfills the dual function of providing decoupling capacitance with the capability of supplying an additional path of current between the motherboard and package to the die load.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: August 25, 2009
    Assignee: Intel Corporation
    Inventor: Yuan-Liang Li
  • Publication number: 20090207553
    Abstract: A first internal conductor has a first portion. A second internal conductor has a lead portion and a main electrode portion. The second internal conductor is arranged in the same layer as the first internal conductor. A third internal conductor has a lead portion and a main electrode portion. The third internal conductor is arranged so as to be adjacent to the second internal conductor in a laminate direction. A fourth internal conductor has a lead portion and a main electrode portion. The fourth internal conductor is arranged so as to be adjacent to the third internal conductor in the laminate direction. When the laminate body is viewed from the laminate direction, the main electrode portion of the third internal conductor overlaps with the main electrode portions of the second and fourth internal conductors.
    Type: Application
    Filed: January 8, 2009
    Publication date: August 20, 2009
    Applicant: TDK CORPORATION
    Inventor: Masaaki TOGASHI
  • Patent number: 7576995
    Abstract: An apparatus and a method for adding capacitance while conserving circuit board surface area. An apparatus for adding capacitance while conserving circuit board surface area includes a flex capacitor circuit with an upper surface and a lower surface and a plurality of conductive layers and an integrated-circuit (IC) device mounted on to the upper surface of the flex capacitor circuit and electrically connected to the flex capacitor circuit. The flex capacitor circuit is configured to provide bypass capacitance and, therefore, adds capacitance to the IC device when the IC device is mounted on the flex capacitor circuit.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: August 18, 2009
    Assignee: Entorian Technologies, LP
    Inventors: John Thomas, Russell Rapport, Robert Washburn
  • Patent number: 7576968
    Abstract: A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrodes. Internal and/or external anchor tabs may also be selectively interleaved with the dielectric layers. Portions of the internal electrodes and anchor tabs are exposed along the periphery of the electronic component in respective groups. Each exposed portion is within a predetermined distance from other exposed portions in a given group such that termination structures may be formed by deposition and controlled bridging of a thin-film plated material among selected of the exposed internal conductive elements. Electrolytic plating may be employed in conjunction with optional cleaning and annealing steps to form directly plated portions of copper, nickel or other conductive material. Once an initial thin-film metal is directly plated to a component periphery, additional portions of different materials may be plated thereon.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: August 18, 2009
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, John M. Hulik, Raymond T. Galasco