Plural Dielectrics Patents (Class 361/312)
  • Patent number: 6630234
    Abstract: By using a polymeric film having a dielectric loss tangent of 0.002 or less measured at a frequency in the range of 1 kHz to 1 GHz at a temperature of 25 ° C., heat generation of dielectric loss of capacitors can be reduced and rising of temperature can be inhibited, and, can highly stand the rise of temperature, whereby further miniaturization and increase in capacity of capacitors become possible. Furthermore, the problems in handling that the films are apt to cut or become entangled at the rewinding step can be greatly improved by using polymeric films which are 1 or less in friction coefficient between the films of the same material. Accordingly, the polymeric films are excellent in performance of insulator film, namely, small in dielectric loss tangent, and, moreover, are free from the problems in handling that the films are apt to cut or become entangled at the rewinding step. Furthermore, the polymeric films are suitable for film capacitors.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: October 7, 2003
    Assignee: Nippo Zeon Co., Ltd.
    Inventors: Hajime Tanisho, Yuichiro Konishi, Teiji Kohara
  • Publication number: 20030184953
    Abstract: An interleaving striped capacitor substrate structure for pressing-type print circuit boards are disclosed. To achieve the high-frequency, high-speed, and high-density trend in modern electronic systems, the interleaving striped capacitor substrate structure uses several dielectric materials of different dielectric coefficients to make a dielectric layer. According to the practical needs, one or both sides of the dielectric layer is adhered with a conductive metal layer to form a capacitor substrate so that a single capacitor substrate can provide the lower dielectric coefficient substrate required for high-speed signal transmissions and the high dielectric coefficient substrate required by the decoupling capacitor to suppress the high-frequency noise signals. This simultaneously achieves the effects of lowering the high-frequency transmission time and suppressing high-frequency noises.
    Type: Application
    Filed: March 5, 2003
    Publication date: October 2, 2003
    Inventors: Min-Lin Lee, Chin-Sun Shyu, Shur-Fen Liu, Jing-Pin Pan, Jinn-Shing King
  • Patent number: 6627120
    Abstract: In order to achieve miniaturization and an increase in the capacitance of a monolithic ceramic capacitor, a conductive paste suitable for forming an internal conductor film is provided, the layer thickness of the internal conductor film being decreased with a decrease in the layer thickness of a dielectric ceramic layer. The conductive paste contains a conductive powder, such as a nickel powder, an organic vehicle, an organic acid barium salt and an organic zirconium compound. Each of the organic acid barium salt in terms of barium atom and the organic zirconium compound in terms of zirconium atom is about 0.05 to 1.00 mol per mol of the conductive powder, and the content of the organic zirconium compound in terms of zirconium atom is about 0.98 to 1.02 mol per mol of the organic acid barium salt in terms of barium atom.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: September 30, 2003
    Assignee: Murata Manufacturing Co. Ltd.
    Inventor: Motohiro Shimizu
  • Patent number: 6614644
    Abstract: A multilayer ceramic capacitor includes sintered laminated bodies having a plurality of dielectric layers alternately stacked with a multiplicity of internal electrodes, and a pair of external electrodes electrically coupled to the internal electrodes. The dielectric layer is of sintered ceramic grains. The ceramic grains include a core portion surrounded by a shell portion or a solid solution. The ceramic grains contain additive elements such as acceptor elements and/or rare earth elements. The additive elements are non-uniformly distributed in the core and/or shell portion of the ceramic grain or in the solid solution. Such non-uniform distribution of the additive elements in ceramic grains promotes or facilitates the re-oxidation process of the ceramic grains and also increases electrical resistance thereof. Accordingly, the operating life characteristics of the multilayer ceramic capacitors, especially those incorporating therein thin dielectric layers, can be improved.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: September 2, 2003
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Hirokazu Chazono, Hisamitsu Shizuno, Hiroshi Kishi
  • Patent number: 6600645
    Abstract: The invention allows the fabrication of small, dense beads of dielectric materials with selected compositions, which are incorporated into a polymeric matrix for use in capacitors, filters, and the like. A porous, generally spherical bead of hydrous metal oxide containing titanium or zirconium is made by a sol-gel process to form a substantially rigid bead having a generally fine crystallite size and correspondingly finely distributed internal porosity. The resulting gel bead may be washed and hydrothermally reacted with a soluble alkaline earth salt (typically Ba or Sr) at elevated temperature and pressure to convert the bead into a mixed hydrous titanium- or zirconium-alkaline earth oxide while retaining the generally spherical shape. Alternatively, the gel bead may be made by coprecipitation. This mixed oxide bead is then washed, dried and calcined to produce the desired (BaTiO3, PbTiO3, SrZrO3) structure. The sintered beads are incorporated into a selected polymer matrix.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: July 29, 2003
    Assignees: UT-Battelle, LLC, E. I. Dupont de Nemours and Company
    Inventors: Robert J. Lauf, Kimberly K. Anderson, Frederick C. Montgomery, Jack L. Collins, John J. Felten
  • Patent number: 6597563
    Abstract: An irreversible circuit element includes a planar ferrite member, a plurality of dielectrics which are formed on the ferrite member in a laminated manner and are made of an insulation material, and the first, the second and the third center conductors which are formed on surfaces different in a vertical direction while sandwiching the dielectrics therebetween and have portions thereof to cross each other in the vertical direction. Accordingly, it is possible to reduce the thickness in the vertical direction so that a thin irreversible circuit element can be provided.
    Type: Grant
    Filed: December 6, 2002
    Date of Patent: July 22, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Shigetoshi Matsuta, Eiichi Komai
  • Patent number: 6594137
    Abstract: A capacitor element for a power capacitor having a plurality of films of dielectric material forming two adjacent dielectric layers, and also a plurality of electrodes of metal material, two of which are situated between the two adjacent dielectric layers spaced from and beside each other to produce and area which is free from metal material. According to the invention a permanent connection of a dielectric material is arranged in the area and unites the dielectric layers with each other. The invention also relates to a method for producing such a capacitor element, and a power capacitor having such a capacitor element.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: July 15, 2003
    Assignee: ABB AB
    Inventor: Esbjorn Eriksson
  • Publication number: 20030128497
    Abstract: Multilayer dielectric structures particularly suitable for use in capacitors and having a plating dopant in an amount sufficient to promote plating of a conductive layer are provided, together with methods of forming such structures. Such dielectric structures show increased adhesion of subsequently applied conductive layers.
    Type: Application
    Filed: October 10, 2002
    Publication date: July 10, 2003
    Applicant: Shipley Company, L.L.C.
    Inventors: Craig S. Allen, Maria Anna Rzeznik, S. Matthew Cairns
  • Publication number: 20030103319
    Abstract: The invention relates to a thin film capacitor containing (a) a substrate, (b) a first polymeric film comprising an electrically conductive polymer located on the substrate, (c) a pentoxide layer selected from the group consisting of tantalum pentoxide, or niobium pentoxide, and mixtures thereof, (d) a second polymeric film comprising an electrically conductive polymer located on the pentoxide layer.
    Type: Application
    Filed: November 1, 2002
    Publication date: June 5, 2003
    Inventors: Prabhat Kumar, Henning Uhlenhut
  • Patent number: 6574090
    Abstract: A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus, the single dielectric sheet does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporatiion
    Inventors: Bernd K. Appelt, John M. Lauffer
  • Patent number: 6574089
    Abstract: In a terminal member, a protuberance is formed so as to protrude toward an external electrode, and thereby, a bonding portion where the terminal member is bonded to the external electrode, the bonding portion being formed with solder, is extended substantially linearly across a part of the external electrode. Preferably, the direction in which the bonding portion is elongated linearly is in parallel to that in which internal electrodes are extended. Further, it is preferable that the bonding portion is as wide as possible, and the center of the bonding portion in the width direction is as near to the center of the end-face of the capacitor body as possible.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: June 3, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Nobushige Moriwaki, Yasuhiko Kubota, Kazuhiro Yoshida, Kenichi Watanabe, Shigeki Nishiyama
  • Patent number: 6563690
    Abstract: A multilayer ceramic capacitor includes a multilayer ceramic body having alternately stacked ceramic layers and internal electrodes, the ceramic layers containing therein an acceptor representing one or more metallic elements for facilitating a reoxidation process of the multilayer ceramic body, and a pair of external electrodes installed at two opposite sides of the multilayer ceramic body, wherein the acceptor concentration in the ceramic layers stacked at a central portion of the multilayer ceramic body is higher than that in the remaining ceramic layers of the multilayer ceramic body.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: May 13, 2003
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Hiroshi Kishi, Hirokazu Chazono, Hisamitsu Shizuno
  • Patent number: 6560095
    Abstract: Collapsible structures are provided with enhancements and other features that impart additional utility or amusement value to the basic underlying structure. The collapsible structure has at least one panel, with each panel having a foldable frame member having a folded and an unfolded orientation, and with a fabric material covering portions of the frame member to form the panel when the frame member is in the unfolded orientation. An electrical component can attached to the fabric material, and an electrical coupling connected to the electrical component. Alternatively, a two-dimensional or three-dimensional object can be attached to the fabric material.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: May 6, 2003
    Assignee: Patent Category Corp.
    Inventor: Yu Zheng
  • Patent number: 6525922
    Abstract: A capacitor structure is formed on a substrate member having one or more via holes therein. Metallization portions within the via holes of the substrate member form part of the plates of the capacitor.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: February 25, 2003
    Assignee: Intel Corporation
    Inventors: Paul Winer, Richard H. Livengood, Suresh Ramalingam
  • Publication number: 20030035261
    Abstract: A method for storing energy in a capacitor includes connecting a first conductor to a first electrode. A second conductor is connected to a second electrode. The second electrode is separated from the first electrode by a dielectric layer. The dielectric layer includes a layer of boron nitride, BN. The conductivity of the dielectric layer is lower than the conductivity of the first electrode or the second electrode. A voltage of at least 5 volts is applied between the first electrode and the second electrode. The voltage is applied be means of the first and second conductors.
    Type: Application
    Filed: May 25, 2001
    Publication date: February 20, 2003
    Inventors: Abdelhak Bensaoula, Nacer Badi
  • Patent number: 6521976
    Abstract: A multilayer LC composite component is constructed for allowing for free and easy setting of an attenuation pole formed at a frequency higher than the central frequency to adjust the frequency characteristics of the LC composite component. In the multilayer LC composite component, inductor via-holes are connected in the direction in which insulation layers are stacked to constitute first to third pillar inductors. In the axial directions of the first and third inductors, input and output lead patterns are electrically connected to midpoints of the first and third inductors. A distance between a ground pattern and each of positions at which the input and output lead patterns are electrically connected to the first and third inductors is shorter than the length of each of the first and third inductors.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: February 18, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Naoto Yamaguchi
  • Publication number: 20030011961
    Abstract: Stabilized capacitors and DRAM cells using high dielectric constant oxide dielectric materials such as Ta2O5 and BaxSr(1−x)TiO3, and methods of making such capacitors and DRAM cells are provided. A preferred method includes providing a conductive oxide electrode, depositing a first layer of a high dielectric constant oxide dielectric material on the conductive oxide electrode, oxidizing the conductive oxide electrode and the first layer of the high dielectric constant oxide dielectric material under oxidizing conditions, depositing a second layer of the high dielectric constant oxide dielectric material on the first layer of the dielectric, and depositing an upper layer electrode on the second layer of the high dielectric constant oxide dielectric material.
    Type: Application
    Filed: July 11, 2001
    Publication date: January 16, 2003
    Inventors: Cem Basceri, Gurtej S. Sandhu, Mark Visokay
  • Patent number: 6498715
    Abstract: Stack up type low capacitance overvoltage protective device is composed of a substrate; a conductive low electrode layer formed on the substrate; a voltage sensitive material layer formed on the conductive lower electrode layer; and a conductive upper electrode layer formed on the voltage sensitive material layer.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: December 24, 2002
    Assignee: Inpaq Technology Co., Ltd.
    Inventors: Chun-Yuan Lee, Kang-Neng Hsu
  • Patent number: 6487064
    Abstract: A bypass circuit includes a planar electrode layer which is mounted between a pair of dielectric layers. The electrode layer generally is centered inwardly with respect to the dielectric layers leaving an outward margin of dielectric material. One of the dielectric layers has two spaced apart contact members, each having a different polarity from the other. A resistive layer is centered on the other dielectric layer. The contact members extend onto end portions of the dielectric layers and electrically connect to opposite ends of the resistive layer. The electrode layer is isolated from electrical contact with any conductor and is buried within the dielectric layers. The electrode layer, in combination with the dielectric layer on which the contact members are mounted and the contact members, allow development of a selected value of capacitance between the contact members.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: November 26, 2002
    Assignee: American Technical Ceramics Corporation
    Inventor: Richard V. Monsorno
  • Patent number: 6477036
    Abstract: The present invention provides a thin-film capacitor which can easily meet requirements of reduction in size, thickness, and weight and which can perform temperature compensation. In addition to the features described above, the present invention provides a thin-film capacitor having a superior Q factor in a high frequency band. The thin-film capacitor of the present invention has at least one first dielectric thin-film and at least one second dielectric thin-film having a dielectric constant different from that of the first dielectric thin-film, wherein these thin-films are provided between a pair of electrodes. In addition, in the present invention, the absolute value of the temperature coefficient of capacitance of the first dielectric thin-film is 50 ppm/° C. or less, and the temperature coefficient of capacitance of the second dielectric thin-film is a negative value and has an absolute value of 500 ppm/° C. or more.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: November 5, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventors: Hitoshi Kitagawa, Makoto Sasaki
  • Patent number: 6473292
    Abstract: Both of the longitudinal dimension L and the widthwise dimension W of a capacitor body are at least four times the thickness-wise dimension T, respectively. Preferably, the widthwise dimension W of the capacitor body 2 is greater than the longitudinal dimension L.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: October 29, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuhiro Yoshida, Shigeki Nishiyama, Nobushige Moriwaki, Takeshi Azumi, Yasuhiko Kubota, Yoshihiro Omura, Kazuyuki Kubota
  • Patent number: 6469887
    Abstract: A capacitor for a semiconductor configuration and a method for producing a dielectric layer for the capacitor. The dielectric layer consists of cerium oxide, zirconium oxide, hafnium oxide or various films of the materials.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: October 22, 2002
    Assignee: Infineon Technologies AG
    Inventors: Harald Bachhofer, Thomas Haneder, Reinhard Stengl, Wolfgang Hönlein, Hans Reisinger
  • Patent number: 6459562
    Abstract: An improved thin-film capacitor and methods for forming the same on a surface of a substrate are disclosed. The capacitor includes a bottom conducting plate formed by depositing conductive material within a trench of an insulating layer and planarizing the conducting and insulating layers. A dielectric film is then deposited on the substrate surface, such that at least a portion of the dielectric material remains over the bottom conducting plate. The dielectric film is formed by depositing a first layer of dielectric and then immersing the top of the first layer of dielectric in gaseous plasmas in a single or a series of steps to change the composition of the first layer of deposited dielectric stack. The additional steps of immersion in a plasma is used to improve the desired performance of the dielectric for capacitor applications such as improved reliability, reduced leakage currents and for tuning voltage coefficients of the capacitor.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: October 1, 2002
    Assignee: Conexant Systems, Inc.
    Inventors: Arjun KarRoy, Klaus Schuegraf
  • Patent number: 6456482
    Abstract: Within both a method for forming a capacitor and a capacitor formed employing the method, there is employed for forming at least part of at least one of a first capacitor plate and a second capacitor plate a tungsten rich tungsten oxide material having a tungsten:oxygen atomic ratio of from about 5:1 to about 1:1. By forming the at least part of the at least one of the first capacitor plate and the second capacitor plate of the foregoing tungsten rich tungsten oxide material, the capacitor is formed with attenuated leakage current density.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: September 24, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Wong-Cheng Shih, Tai Bor Wu, Chich Shang Chang
  • Patent number: 6452778
    Abstract: A parasitic insensitive capacitor in a D/A converter. A semiconductor substrate is provided having a first face upon which the semiconductor integrated circuit is formed with a first conductive layer disposed over a portion of the first face of the semiconductor substrate and separated therefrom by a first insulating layer to form the lower plate of the capacitor. A second conductive layer is disposed over a portion and less than all of the first conductive layer and separated therefrom by a second insulating layer to form the upper plate of the capacitor. A third conductive layer disposed above the first and second conductive layers and separated from the first conductive layer by a third insulating layer, the third conductive layer having an opening therein of substantially the same shape as the second conductive layer and wherein the peripheral edges of the opening are substantially aligned with the peripheral edges of the second conductive layer.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: September 17, 2002
    Assignee: Cygnal Integrated Products, Inc.
    Inventors: Ka Y. Leung, Michael S. Enoch
  • Patent number: 6452792
    Abstract: A drive bracket (10) includes a support base (20), a side plate (30) extending from one edge of the support base, and a retaining plate (40) extending from one edge of the side plate to be opposite to the support base. The support base has a flange (27) extending from another side thereof, a pair of spring tabs (24), recesses (22) each including an opening (23), and a pair of through holes (28) opposite to the spring tabs. The side plate has a pair of posts (32) formed inwardly at opposite ends thereof. The retaining plate has four spring fingers (42) extending inwardly. A hard disk drive engages with the drive bracket and the drive bracket is then engaged to a base panelwithin a computer enclosure.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: September 17, 2002
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventor: Chia-Hua Chen
  • Patent number: 6440591
    Abstract: A ferroelectric thin film coated substrate is obtained by a producing method of forming a metal oxide buffer layer on a substrate, forming a first crystalline ferroelectric thin film thereon by means of a MOCVD method and forming a second ferroelectric thin film with a film thickness thicker than that of the first ferroelectric thin film thereon by means of the MOCVD method at a temperature lower than that of the first ferroelectric thin film. This producing method makes it possible to produce a ferroelectric thin film, where its surface is dense and even, a leakage current properties are excellent and sufficiently large remanent spontaneous polarization is shown, at a lower temperature.
    Type: Grant
    Filed: May 8, 1996
    Date of Patent: August 27, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hironori Matsunaga, Takeshi Kijima, Sakiko Satoh, Masayoshi Koba
  • Patent number: 6430030
    Abstract: A multi-layer ceramic capacitor and method of manufacturing the capacitor, the capacitor having signal vias surrounded by an area containing a material having a low dielectric constant, the via and surrounding area of low dielectric constant material inserted in a material having a high dielectric constant.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: August 6, 2002
    Assignee: International Business Machines Corporation
    Inventors: Mukta S. Farooq, Harvey C. Hamel, Robert A. Rita, Herbert I. Stoller
  • Patent number: 6426551
    Abstract: A composite monolithic electronic component has a laminate including a base layer having a relative dielectric coefficient of about 10 or less and a functional layer which is at least one of a high-dielectric-coefficient layer having a relative dielectric coefficient of about 15 or more and a magnetic layer. The base layer contains a crystallized glass containing SiO2, MgO, Al2O3 and B2O3, and a ceramic oxide having a thermal expansion coefficient of about 6.0 ppm/°C. or more. The functional layer contains an amorphous glass having a softening point of about 800° C. or less.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: July 30, 2002
    Assignee: Murata Manufacturing Co. Ltd
    Inventors: Hiromichi Kawakami, Hirofumi Sunahara
  • Patent number: 6426861
    Abstract: A film capacitor includes a novel hybrid polymeric film dielectric in which at least one non-polar dielectric homopolymer resin is blended homogeneously in solid-solution with at least one other dielectric polymer resin. The properties of at least one of the dielectric polymer resin constituents of the hybrid polymeric film dielectric are selected to produce a tailored property or properties of the solid-solution blend thereof. The non-polar homopolymer serves to stabilize the hybrid polymeric film. In the film capacitor configuration, the hybrid polymeric film is tightly sandwiched between conformable metal plates.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 30, 2002
    Assignee: Lithium Power Technologies, Inc.
    Inventor: M. Zafar A. Munshi
  • Publication number: 20020093781
    Abstract: A capacitor for a semiconductor configuration and a method for producing a dielectric layer for the capacitor. The dielectric layer consists of cerium oxide, zirconium oxide, hafnium oxide or various films of the materials.
    Type: Application
    Filed: November 13, 2001
    Publication date: July 18, 2002
    Inventors: Harald Bachhofer, Thomas Haneder, Reinhard Stengl, Wolfgang Honlein, Hans Reisinger
  • Patent number: 6418009
    Abstract: The invention relates to a hybrid capacitor which combines the functionality of a multi-layer capacitor and a single layer capacitor in one component. The multi-layer capacitor component is comprised of a series of interleaved plates alternatively connected to two terminations and spaced apart by a dielectric material. The single layer capacitor component is comprised of the outer of the series of interleaved plates and an additional plate connected to the opposite termination as the outer interleaved plate and separated from that plate by a second dielectric material. This combination of an SLC and an MLC into a single hybrid capacitor facilitates easy assembly and improves electrical performance over using a separate multi-layer capacitor and a single layer capacitor.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: July 9, 2002
    Assignee: Nortel Networks Limited
    Inventor: Gilbert P. Brunette
  • Patent number: 6404615
    Abstract: A thin film capacitor and methods for forming the same are described. The capacitor has dielectric layer with a first face, a second face, and at least one edge. The first terminal of the capacitor covers at least a portion of the first face of the dielectric layer, covers at least a portion of one edge of the dielectric layer, and covers a portion of the second face of the dielectric layer. The second terminal of the capacitor covers a portion of the second face of the dielectric layer and does not contact the first terminal. A method for forming the thin film capacitor includes hard baking photoresist at an elevated temperature and anodizing an exposed metal area using the photoresist as a mask.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: June 11, 2002
    Assignee: Intarsia Corporation
    Inventors: Sunil D. Wijeyesekera, Jing Jing, Donald C. Benson, Teruo Sasagawa
  • Patent number: 6396680
    Abstract: A monolithic capacitor including a sintered body formed from a TiO2-containing reduction-resistant dielectric ceramic material; a plurality of internal electrodes which are formed inside the sintered body, the electrodes being formed of a base metal; and first and second external electrodes which are formed on the sintered body, the internal electrodes being electrically connected to the external electrodes; wherein the amount of Ti contained in a secondary phase of the sintered body is about 2 wt. % or less as TiO2. A process for producing the monolithic capacitor of the present invention is also disclosed.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: May 28, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Toshiki Nishiyama, Takayuki Nishino, Yasunobu Yoneda
  • Patent number: 6388864
    Abstract: A ceramic electronic component includes a ceramic electronic component body having two end faces opposing each other, side faces connecting the two end faces, and terminal electrodes formed on each end face; and terminal members, each including a metal being soldered to one of the terminal electrodes. Each of the terminal electrodes includes a metal layer formed only on the end face, a conductive resin layer formed on the metal layer, the conductive resin layer including metal powder and resin, and a plating film on the conductive resin layer.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: May 14, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takuji Nakagawa, Yoshikazu Takagi, Yasunobu Yoneda
  • Patent number: 6377440
    Abstract: A varactor comprising a substrate, a first conductor positioned on a surface of the substrate, a second conductor positioned on the surface of the substrate forming a gap between the first and second conductors, a tunable dielectric material positioned on the surface of the substrate and within the gap, the tunable dielectric material having a top surface, with at least a portion of said top surface being positioned above the gap opposite the surface of the substrate, and a first portion of the second conductor extending along at least a portion of the top surface of the tunable dielectric material. The second conductor can overlap or not overlap a portion of the first conductor.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: April 23, 2002
    Assignee: Paratek Microwave, Inc.
    Inventors: Yongfei Zhu, Louise C. Sengupta, Xubai Zhang
  • Patent number: 6351376
    Abstract: A mounting apparatus for mounting a data storage device in a computer housing includes a bracket, a securing means and a flexible plate. The bracket has a first face for supporting a data storage device, a second face opposite the first face and locking holes in its front portion. The securing means is mounted to a bottom of the data storage device and is moveable with the data storage device to be slid into the corresponding locking hole of the bracket. The flexible plate has a rear end securely fixed to the second face and a front end that has an operating portion extending out of the housing for being operable to move the front end away from the front portion of the bracket. The flexible plate further defines through holes for engaging with the locking holes to releasably block the sliding movement of the data storage device.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: February 26, 2002
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Pouch Liang, Hsuan-Tsung Chen
  • Patent number: 6341056
    Abstract: A capacitor has a pair of plates separated by a capacitor dielectric material which is formed of multiple separate layers of different dielectric materials having different electrical characteristics. The different electrical characteristics are represented by linearity curves that curve relatively oppositely with respect to one another. Combining the different dielectric materials and separate layers achieves selected electrical characteristics from the overall capacitor dielectric material. The capacitor dielectric material may be formed with a top layer, a middle layer and a bottom layer. The middle layer may be formed of relatively high leakage dielectric and/or relatively high dielectric constant material, and the top and bottom layers may be formed of barrier material which is substantially resistant to leakage current and which exhibits a relatively lower dielectric constant.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: January 22, 2002
    Assignee: LSI Logic Corporation
    Inventors: Derryl D. J. Allman, Brian Bystedt
  • Patent number: 6300267
    Abstract: Various mixtures of lead magnesium niobate and lead titanate are made, each mixture having a different Curie temperature, wherein these mixtures are mixed together to form capacitor inks that can be used to make capacitors embedded in multilayer ceramic circuit boards. These capacitors have extended temperature ranges of operation as well as low loss tangents and high dielectric constants.
    Type: Grant
    Filed: November 4, 1999
    Date of Patent: October 9, 2001
    Assignee: Sarnoff Corporation
    Inventors: Hung-tse Daniel Chen, Barry Jay Thaler
  • Patent number: 6285542
    Abstract: A very small electronic device adapted for inverted mounting to a circuit board includes a multiplicity of capacitors and resistors built on a substrate. The capacitors and resistors are interconnected so as to provide multiple RC circuits in various circuit arrangements. The multiple layers of the device are covered by an encapsulate having openings to expose terminal pads of the RC circuits. The openings are filled with solder to produce the individual terminations of the device in a ball grid array (BGA). The device saves cost and/or board space in the manufacture of larger electronic equipment through the elimination of multiple discrete components. In addition, very low inductance is achieved due to the close proximity of the device to a circuit board on which it is mounted.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: September 4, 2001
    Assignee: AVX Corporation
    Inventors: Robert M. Kennedy, III, Gheorghe Korony, Donghang Liu, Jeffrey P. Mevissen, Robert H. Heistand, II
  • Patent number: 6274899
    Abstract: A dielectric film (110) is formed overlying a semiconductor device substrate (10). A dielectric post (204) having an outer peripheral boundary having sidewalls is formed over the dielectric film (110). A first conductive film (402) is deposited at least along the sidewalls of the dielectric post (204) to form a lower electrode. A capacitor dielectric film (1801) is deposited on the first conductive film, and a upper electrode (1802) is formed on the capacitor dielectric film (1801).
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: August 14, 2001
    Assignee: Motorola, Inc.
    Inventors: Bradley M. Melnick, Bruce E. White, Jr., Douglas R. Roberts, Bo Jiang
  • Patent number: 6266230
    Abstract: The present invention provides a multilayer ceramic capacitor in which electrode metal layers and dielectric ceramic layers are laminated alternately and its dielectric constant peak is present at a temperature below −50° C. The multilayer ceramic capacitor is at least one selected from a multilayer ceramic capacitor to be incorporated into an electric circuit in which an electric field of at least 200 V/mm is applied to dielectric layers as a DC bias electric field and an alternating current at a frequency of at least 20 kHz is superimposed and a multilayer ceramic capacitor to be incorporated into an electric circuit in which an electric field of at least 200 V/mm is applied to dielectric layers as an AC electric field. As the dielectric ceramic, a ceramic containing lead atoms whose amount is indicated by being measured in the form of PbO, which is at least 30 mol %, particularly a compound with a perovskite structure represented by ABO3 is used.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: July 24, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junichi Kato, Takuya Ishii, Koji Yoshida, Tsutomu Nishimura, Yoshimasa Yabu
  • Patent number: 6265058
    Abstract: The present invention is a dielectric film, and method for making the film, suitable for use in the construction of capacitor devices, including wound capacitors. In order to overcome strength limitations associated with polymers having desirable dielectric properties, the invention includes a dielectric film featuring a polymer impregnated upon a strengthening substrate. The polymer is deposited directly upon the substrate, which substrate provides required physical strength for film processing and capacitor fabrication, without compromising dielectric performance. The inventive film is based on siloxane polymers modified with polar pendant groups to provide a significant increase in dielectric constant and dielectric strength. During film production, the polymer infiltrates the porous paper to provide an interfacial composite layer between the two materials, the interfacial layer consisting of polymer and paper.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: July 24, 2001
    Assignee: TPL, Inc.
    Inventors: Kirk M. Slenes, Kristen J. Law, William F. Hartman
  • Publication number: 20010005304
    Abstract: A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus the single dielectric sheets does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness.
    Type: Application
    Filed: February 1, 2001
    Publication date: June 28, 2001
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bernd K. Appelt, John M. Lauffer
  • Patent number: 6215649
    Abstract: A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus the single dielectric sheets does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: April 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bernd K. Appelt, John M. Lauffer
  • Patent number: 6205014
    Abstract: The multilayer ceramic capacitor has a plurality of dielectric layers and inner layers laminated alternately laminated on one another. In each of the dielectric layers, the rate of ceramic grain which form the dielectric layers and present singly in one dielectric layer over its entire longitudinal thickness is set to amount to 20% or more. The multilayer ceramic capacitor can prevent a decrease in a CR product to a value lower than a desired level even if the dielectric layer becomes as thin as 5 &mgr;m or less. This can comply with demands for a multilayer ceramic capacitor that the number of the dielectric layers to be laminated on the inner electrodes should be increased yet the thickness of the dielectric layers should be made thinner in order to meet requirements for making electronic circuit more compact in size and higher in density.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: March 20, 2001
    Assignee: Taiyo Yudan Co., Ltd.
    Inventors: Yasuyuki Inomata, Yoshikazu Okino
  • Patent number: 6198617
    Abstract: A structure of a capacitor includes an electromigration layer, which is located on a dielectric layer and serves as a lower electrode of the capacitor. A pattered capacitor dielectric layer is located on the electromigration layer, and a patterned metallic layer is located on the capacitor dielectric layer and serves as an upper electrode of the capacitor.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: March 6, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Shih-Wei Sun
  • Patent number: 6128177
    Abstract: A capacitor comprises a number of ceramic layers on the basis of barium titanate as well as a number of electrode layers of palladium or a silver-palladium alloy, the ceramic layers and the electrode layers being alternately stacked to form a multilayer, which is also provided with two external electric connections which are in contact with a number of said electrode layers. In accordance with the invention, the electrode layers contain copper oxide, preferably 0.5-15 wt. %, calculated with respect to the overall quantity of palladium, silver and copper oxide. It has been found that the presence of a relatively small, yet effective quantity of copper oxide in the electrode material of Pd or Pd--Ag leads to a considerable increase of the internal mechanical strength and of the service life of CMCs. By employing the method in accordance with the invention, the percentage of rejects in the production of the capacitors can be reduced considerably.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: October 3, 2000
    Assignee: U.S. Philips Corporation
    Inventors: Hermanus G. M. Titulaer, Henricus H. M. Wagemans
  • Patent number: 6115234
    Abstract: The multilayer microelectronic circuit comprises a main capacitor dielectric layer, a main capacitor first electrode disposed on one of opposite sides of the main capacitor dielectric layer, a main capacitor second electrode disposed on the other of the opposite sides of the main capacitor dielectric layer in a way as to oppose the main capacitor first electrode through the main capacitor dielectric layer, a first trimming capacitor dielectric layer disposed on a side of the main capacitor first electrode opposite to the main capacitor dielectric layer, a first trimming capacitor electrode disposed on a side of the first trimming capacitor dielectric layer opposite to the main capacitor first electrode in a way as to oppose the main capacitor first electrode through the first trimming capacitor dielectric layer, a second trimming capacitor dielectric layer disposed on a side of the first trimming capacitor electrode opposite to the first trimming capacitor dielectric layer, and a second trimming capacitor ele
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: September 5, 2000
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Tetsuya Ishii, Hiroshi Katagiri, Tadashi Shingaki, Tatsuya Takemura
  • Patent number: 6108191
    Abstract: A thin-film technology multi-layer capacitor with enhanced capacitance and/or reduced space requirement. The dielectric layers of which are alternately disposed between electrode layers on a substrate. Through alternate electrode layer connections, parallel interconnection of the individual capacitor layers is obtained. The result is that the individual capacitances are additive, while the temperature response can be optimized by a suitable choice or combination of different dielectric layers.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: August 22, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Bruchhaus, Dana Pitzer, Robert Primig, Wolfram Wersing, Wolfgang Honlein