Abstract: A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.

Abstract: A power module is proposed to package an electronic system having flip chip power MOSFET devices. The power module includes a front surface cover board and a multi-layer printed circuit laminate bonded thereto. Notably, the front surface of the printed circuit laminate includes recessed pockets each having printed circuit traces atop its floor. Inside the recessed pockets are power MOSFET and other circuit components bonded to the printed circuit traces. As the circuit components are encased inside the power module, it features a low profile, an increased mechanical robustness and EMI/RFI immunity. Additionally, some circuit components can be provided with a front-side bonding layer that is also bonded to the front surface cover board to realize a double-side bonding to the interior of the power module. Methods for making the low profile power module are also described.

Abstract: Disclosed herein is a printed circuit board having electronic components embedded therein. The printed circuit board having electronic components embedded therein includes: a metal core layer connected to a ground terminal of an external power supply to be grounded and having a cavity or a groove part formed thereon; an electronic component accommodated in the cavity and having a plurality of terminals, a ground terminal included in the plurality of terminals being connected to the metal core layer; an internal insulating layer stacked on both sides of the metal core layer; and circuit patterns formed on an external surface of the internal insulating layer.

Abstract: In a circuit board disposed in parallel to a fixing plane, a guard spacer (abutting member) is disposed on a multi-layer printed circuit board on the side of the fixing plane to suppress deformation of the multi-layer printed circuit board to prevent short circuit if an impact is applied to the circuit board. The guard spacer may be a dummy electronic component or a plate member. An image display using the circuit board is also disclosed.

Abstract: The present disclosure relates to reducing unwanted RF noise in a printed circuit board (PCB) containing an RF device. An isolation filter is embedded in a PCB containing an RDF device. By placing the isolation filter as close as possible to the RF device in order to dramatically reduce unwanted RF noise due to unavoidable coupling between Vias and planes in the PCB structure.

Abstract: In a dielectric element, the angle ? made by either the top face or the bottom face and the side faces is either 0°<?<89°, or is 91°<?<180°, and is an angle other than 89°???91°. By this means, the area of contact of the side faces of the dielectric element with a glass epoxy resin substrate and with insulating material is increased, adhesion with the resin substrates is improved, and strength and reliability can be enhanced when buried between the two resin substrates.

Abstract: Disclosed is an embedded printed circuit board, in which electronic devices having different thicknesses can be embedded together, thus achieving highly dense electronic devices, and when electronic devices having considerably different thicknesses are embedded, two electronic devices which are comparatively thinner can be embedded in a perpendicular direction, thus reducing an embedding area and suppressing warping of the printed circuit board, and an insulating member the thickness of which is variably adjusted is interposed between base substrates, so that spaces between the electronic devices are completely filled therewith, thus solving the problem of void defects, resulting in reliable printed circuit boards, and, when a base substrate includes a core made of metal, the printed circuit board can less warp. Also a method of manufacturing the embedded printed circuit board is provided.

Abstract: A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards.

Abstract: The present invention relates to a wiring member including: a copper foil layer having a smooth surface with a surface roughness Rz of 2 ?m or less; a noise suppressing layer containing a metallic material or a conductive ceramic and having a thickness of 5 to 200 nm; and an insulating resin layer provided between the smooth surface of the copper foil layer and the noise suppressing layer, and also relates to a printed wiring board equipped with the wiring member.

Abstract: According to one embodiment, there is provided a printed-wiring board, includes a first base member including a component mounting face, a first electronic component with a through-electrode mounted on the component mounting face, a second base member stacked on the first base member via an insulating layer covering the first electronic component, a hole part provided in the second base member and communicating with the through-electrode of the first electronic component, and a second electronic component mounted on the second base member and circuit-connected directly to the through-electrode via the hole part.

Abstract: A component built-in wiring board is provided. The component built-in wiring board 10 includes a core substrate 11, a first component 61, a first built-up layer 31 and a capacitor 101. The core substrate 11 has a housing hole 90 and the first component 61 is housed in the housing hole 90. A component mounting region 20 capable of mounting a second component 21 is provided in a surface 39 of the first built-up layer 31. The capacitor 101 has electrode layers 102 and 103 and a dielectric layer 104. The capacitor 101 is embedded in the first built-up layer 31 such that a first front surface 105 and a second front surface 106 in the electrode layer 102 and a first front surface 107 and a second front surface 108 in the electrode layer 103 are disposed in parallel with the surface 39 of the first built-up layer 31.

Abstract: In electronic component which can be readily miniaturized and compacted, and which has a simple manufacturing process, and in a method of manufacturing the same, the electronic component includes a printed circuit board (PCB) having a first surface and a second surface facing each other, and a predetermined through-hole, a semiconductor device mounted in the through-hole and combined with the first surface of the PCB, and at least one passive device combined with the first surface of the PCB.

Abstract: In a method for manufacturing a ceramic multilayer substrate, when a green ceramic stack prepared by stacking a plurality of ceramic green sheets is fired simultaneously with a ceramic chip electronic component disposed inside the green ceramic stack and including an external terminal electrode to produce a ceramic multilayer substrate having the ceramic chip electronic component inside, a paste layer is disposed in advance between the ceramic chip electronic component and the green ceramic stack, and these three are fired.

Abstract: A flexible electronic circuit member formed of a plurality of dielectric layers includes a plurality of thinned semiconductor chips embedded within the circuit member for increased levels of integration and component density. The thinned semiconductor chips may include various integrated circuits thereon. They may be formed on various substrates and using various technologies and the embedded, thinned semiconductor chips are interconnected by a patterned interconnect that extends between and through the respective dielectric layers. A method for forming the flexible circuit member includes joining conventional semiconductor chips to a mounting apparatus then grinding the semiconductor chips to form thinned semiconductor chips that are joined to respective dielectric layers that combine to form the flexible electronic circuit member.

Abstract: Two panel-sized fully populated printed wiring board assemblies formed together, with an anisotropic epoxy that provides electrical connection for RF signals and DC supplies without the need for wirebonds, mechanical interconnects or solder balls.

Abstract: Methods, devices, and systems for electronic wireless communication in circuits for monitoring one or more activities of an individual are disclosed. One circuit board assembly embodiment includes a carrier board portion having a module contact pattern to electrically connect a module, selected from a plurality of different module types each having a contact pattern that corresponds to the module contact pattern of the carrier board portion, to a number of electrical components attached to the carrier board portion; a sensor portion for sensing one or more activities of an individual, the sensor portion electrically connected to the carrier board portion; and a communications module portion selected from the plurality of different module types, wherein the module portion has a contact pattern that corresponds to the module contact pattern and wherein the communications module portion is electrically connected to the carrier board portion via the module contact pattern.

Abstract: The invention relates to a component arrangement with a first substrate and at least one second substrate arranged on the first substrate, wherein the first substrate has at least one first contact element and the at least one second substrate has at least one second contact element and the contact elements each has a contact surface connected such as to give an electrical contact and a protective layer connecting the first and second substrate together. During production the protective layer is structured such that a part surface of the first substrate and a part surface of the at least one second substrate are not covered, wherein the part surfaces include the contact surfaces of the at least one first and second contact elements and the contact generated between the contact surfaces is hence not contaminated by the protective layer. The contact surfaces are thus freely accessible without elements of the protective layer lying therebetween.

Abstract: A system is provided for the integration of microwave components in a low temperature co-fired ceramic, the system includes a low temperature co-fired ceramic body having a top surface, into which is disposed a plurality of cavities; a plurality of microwave devices, each device being disposed within a cavity such that the cavities provide radio isolation to the devices; and a coaxial connection disposed within the body configured to connect the devices to external components the coaxial components comprising vias disposed within the co-fired ceramic body.

Abstract: Provided are a semiconductor package, a method of forming the semiconductor package, and a printed circuit board (PCB). The semiconductor package includes: a PCB including at least two parts divided by an isolation region; a semiconductor chip mounted on the PCB; and a molding layer disposed in the isolation region. The method includes: preparing a PCB, the PCB including a plurality of chip regions and a scribe region; forming isolation regions dividing each of the chip regions into two parts, the isolation regions including inner isolation regions and outer isolation regions, the inner isolation regions being provided in the chip regions, the outer isolation regions being provided at both ends of the inner isolation regions so as to extend toward the scribe region; mounting semiconductor chips on the chip regions; and cutting the PCB along the scribe region to divide the chip regions into at least two parts.

Abstract: Chip-scale packages and assemblies thereof are disclosed. The chip-scale package includes a core member of a metal or alloy having a recess for at least partially receiving a die therein and includes at least one flange member partially folded over another portion of the core member. Conductive traces extend from one side of the package over the at least one flange member to an opposing side of the package. Systems including the chip-scale packages and assemblies are also disclosed.

Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: A substrate structure capable of miniaturizing and thinning a housing of a portable terminal is provided. A substrate structure 10 comprises a substrate 11, plural electronic components 12 mounted along one mounting surface 11A in the substrate 11, and a resin part 13 for making close contact with the mounting surface 11A of the substrate 11while each of the electronic components 12 is covered with a resin 13A. In the substrate structure 10, a through hole 14 extending through the substrate 11 in a thickness direction is disposed and also the side of the mounting surface 11A in the through hole 14 is closed by a lid member 15. A rising part 21 is disposed in a peripheral part of this lid member 15.

Abstract: A first riser card of an apparatus in an example substantially axially connects with a first serial connection external interface of a printed circuit board (PCB) and at least in part laterally connects with a parallel connection external interface of a first memory module. The first riser card supports the first memory module with avoidance of abutment of the first memory module with a second memory module supported by a second riser card that is adjacent to the first riser card.

Abstract: A mounting region having a rectangular shape is provided at an approximately center of one surface of an insulating layer. A plurality of conductive traces are formed so as to outwardly extend from the inside of the mounting region. A cover insulating layer is formed so as to cover the plurality of conductive traces in a periphery of the mounting region. An electronic component is mounted on the insulating layer so as to overlap with the mounting region. A metal layer is provided on the other surface of the insulating layer. Openings having a rectangular shape are formed in the metal layer along a pair of longer sides and a pair of shorter sides of the mounting region. The openings are opposite to part of terminals of the plurality of conductive traces, respectively, with the insulating layer sandwiched therebetween.

Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB memory cards using an extended 9-pin EUSB socket. Each EUSB device 101 includes a PCBA having four standard USB metal contact pads disposed on an upper side of a PCB, and several extended purpose contact springs that extend through openings defined in the PCB. A single-shot molding process is used to form both an upper housing portion on the upper PCB surface that includes ribs extending between adjacent contact pads, and a lower molded housing portion that is formed over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs.

Abstract: A microelectronic substrate, a method of forming the same, and a system including the same. The microelectronic substrate comprises: a conductive layer; a spacer layer disposed onto the conductive dielectric layer; a dielectric build-up layer disposed onto the spacer layer, the spacer layer being made of a material that has a lower shrinkage than a material of the embedding dielectric-build-up layer during curing, and a higher viscosity than a material of the embedding dielectric build-up layer in its pre-cure form and during curing; and active or passive microelectronic components embedded within the dielectric build-up layer.

Abstract: The present invention provides a semiconductor device fuse, comprising a metal layer and a first semiconductor layer that electrically couples the metal layer to a fuse layer, wherein the fuse layer is spaced apart from the metal layer. The semiconductor device fuse further comprises a second semiconductor layer that forms a blow junction interface with the fuse layer. The blow junction interface is configured to form an open circuit when a predefined power is transmitted through the second semiconductor layer to the fuse layer.

Abstract: An adapter apparatus and methods for using in providing such adapter apparatus include providing a substrate having a plurality of openings defined therethrough. A plurality of conductive elements are mounted within corresponding openings thereof using a curable material.

Abstract: A printed circuit board (PCB) substrate which can be used in a semiconductor package, such as BGA and LGA, has a top surface and a bottom surface. A magnetic component includes a laterally extending bottom plate, two or more vertically extending posts, and a laterally extending top plate, wherein the bottom plate is fully embedded within the PCB substrate and the two or more posts extend in the PCB substrate from the bottom plate toward the upper surface of the PCB substrate. The top plate contacts an end of each of the two or more posts along the top surface of the PCB substrate.

Abstract: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is supplied from the surface of the base substance. A shunt capacitor is provided with an electrode pair of a first electrode and a second electrode formed in parallel, and mounted with the first electrode being electrically connected to the surface of the base substance. An internal bonding wire connects a pad provided on the semiconductor substrate for external connection, to the second electrode of the shunt capacitor. The lead is the external connection terminal of the semiconductor device. An external bonding wire connects the lead to the second electrode of the shunt capacitor.

Abstract: An embedded chip-on-chip package comprises a printed circuit board having a recessed semiconductor chip mounting unit, a first semiconductor chip embedded in the recessed semiconductor chip mounting unit, and a second semiconductor chip mounted on the first semiconductor chip and the printed circuit board.

Abstract: There is provided a circuit substrate to be mounted in an electronic apparatus, and the circuit substrate has a power supply and a GND. The GND of the circuit substrate is electrically connected to GNDs of other components of the electronic apparatus through connecting parts. The circuit substrate has a part or circuit that implements a low impedance in an intended frequency range between the peripheral conductor of the connecting part opening to be used for the connection and the power supply of the circuit substrate.

Abstract: The present invention is to provide an electronic component where positional accuracy for arranging members constituting a circuit element such as a resistor element and the like is mitigated and corrosion of a terminal electrode caused by sulfur in the atmosphere is reduced.

Abstract: A printed circuit board assembly and method of assembly in which underfill is placed between a chip and substrate to support the chip. A trench is formed in the upper layer of the printed circuit board to limit the flow of the underfill and in particular to limit the underfill from contact with adjacent components so that the underfill does not interfere with adjacent components on the printed circuit board assembly.

Abstract: A first insulating layer is formed on a suspension body, and a write wiring trace is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer so as to cover the wiring trace. A ground layer is formed on the second insulating layer so as to be positioned above the wiring trace. Moreover, a third insulating layer is formed on the second insulating layer so as to cover the ground layer. A read wiring trace is formed on the third insulating layer. A fourth insulating layer is formed on the third insulating layer so as to cover the wiring trace.

Abstract: A method for manufacturing a substrate having built-in components prevents a short circuit caused by the spread of solder or conductive adhesive. Land regions to connect a circuit component and a wetting prevention region surrounding the land regions are formed on one primary surface of a metal foil. Terminal electrodes of the circuit component are electrically connected to the land regions using solder, and an uncured resin is disposed on and pressure bonded to the metal foil and the circuit component, so that a resin layer in which the circuit component is embedded is formed. Subsequently, a wiring pattern is formed by processing the metal foil. The wetting prevention region is a region obtained by roughening or oxidizing one primary surface of the metal foil so as to reduce solder wettability.

Abstract: An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect.

Abstract: The invention relates to a multilayer printed circuit board structure comprising a stack of plurality of electrically insulating and/or electroconductive layers and at least one passive or active electrical component arranged inside the stack of layers, the component extending laterally only in part of the surface extension of the stack of layers. The invention also relates to a passive or active electrical component mounted on the stack, to an associated wiring, and to a corresponding production method. According to the invention, the insert is embedded between two electrically insulating liquid resin layers or prepreg layers extending over the entire surface and covering the insert on both sides, the insert being surrounded by a resin material that is liquefied by compression or lamination of the structure. The invention structure can be used in printed circuit board technology.

Abstract: A component-embedded module includes a module substrate having wiring electrodes on the upper surface thereof, first circuit components mounted on the wiring electrodes, a sub-module disposed on an area on which no wiring electrodes are provided, and an insulating resin layer provided on substantially the entire upper surface of the module substrate such that the insulating resin layer covers at least a portion of the first circuit components and sub-module. The second circuit components including an integrated circuit element are mounted on the sub-module or embedded therein. Via conductors are provided through the module substrate from the lower surface thereof and are directly coupled to terminal electrodes on the lower surface of the sub-module. By using a substrate having a wiring greater accuracy than that of the module substrate, a reliable component-embedded module is obtained.

Abstract: An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract: A module with a built-in component is provided which can be produced without a via-forming step. The module with a built-in component 100 includes an insulating sheet substrate 10 which has an upper surface 10a, a lower surface 10b opposed to the upper surface 10b and a side surface 10c which connects these surfaces. At least one wiring 20 extends from the upper surface to the lower surface through the side surface, and an electronic component 32 is disposed within the sheet substrate.

Abstract: A press fit passive component, such as a resistor or capacitor, adapted to fit within, or partially within, a via of a printed circuit board. In one example, the press fit passive component has a cylindrically shaped body with solderable terminals at either end of the body, and a dielectric collar disposed at least partially about the cylindrically shaped body.

Abstract: An edge connector includes, a multilayer printed board having an inner layer and a connector edge, an electronic circuit disposed on the multilayer printed board, an electrical terminal on the multilayer printed board and spaced by a predetermined clearance from the connector edge, an electrical conductor on the multilayer printed board and connected between the electronic circuit and the electrical terminal, a via connected to the electrical terminal and extending to the inner layer of the multilayer printed board, and a lead conductor on the inner layer of the multilayer printed board and connected at one end to the via, another end of the lead conductor being exposed at the connector edge. The electrical terminal is plated. The sum of the length of the via and the length of the lead conductor is less than one-sixth of the wavelength of an electrical signal transmitted.

Abstract: A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrate. Then, a prepreg and a heat dissipating metal layer are provided, and the heat dissipating metal layer is disposed on a first surface of the prepreg and a second surface of the prepreg faces toward the chip. Finally, the prepreg covers the chip by laminating the prepreg and the substrate.

Abstract: Disclosed herein are a circuit board and a method for testing devices embedded inside the circuit board. The circuit board according to an embodiment of the present invention includes an active device that is embedded inside the circuit board and includes at least one connection terminal; a passive device of which one terminal is electrically connected to one of the connection terminals of the active device and the other terminal is electrically connected to a signal pad on a surface of the circuit board; and a test pad that is electrically connected to the one terminal of the passive device. According to the present invention, even when the active device and the passive device are embedded inside the board, it is possible to effectively test a connection state of each device, thereby making it possible to easily determine whether defects occur in the circuit board.

Abstract: A circuit substrate including a laminated layer, an embedded electronic device, at least a circuit structure, and a solder mask layer is provided. The embedded electronic device is disposed within the laminated layer. The circuit structure is disposed on a surface of the laminated layer and is connected between a reference plane and the embedded electronic device. In addition, the solder mask layer is disposed on the surface of the laminated layer and exposes a portion of the circuit structure. The circuit structure has a specific layout by which a circuit trace with an adjustable length can be formed by disconnecting or connecting the exposed portion of the circuit structure.

Abstract: The invention relates to a method for producing microsystems comprising microelectronic components that are inserted into cavities created during the layered construction of a base body consisting of a photocurable material, said components being situated adjacent to and/or above one another on several planes and being interconnected either electrically or thermally.

Abstract: A system for placing electronic devices in restricted spaces of a printed circuit board. At least some of the illustrative embodiments are systems comprising a printed circuit board that comprises at least one conductive layer and at least one insulative layer (an outer surface of the printed circuit board defines a first plane), a void within the printed circuit board (the void defines an aperture through the outer surface, the void has at least one side wall at least partially defined by the insulative layer, and the void has a bottom that defines a second plane substantially parallel to the first plane), a first electronic device coupled to the printed circuit board within the void, and a second electronic device coupled to the outer surface, the second electronic device at least partially occludes the aperture.

Abstract: A cavity configured by electrically connecting an earth conductor formed on a multilayer dielectric substrate and on which a plurality of high frequency circuits are mounted, and a shield cover member. A waveguide aperture is formed on the earth conductor on which the high frequency circuits are mounted and is electrically coupled to the cavity, and an end-short-circuited dielectric waveguide formed in a direction of layer lamination of the multilayer dielectric substrate is connected to the waveguide aperture, and has a length approximately ¼ of an effective wavelength in the substrate of a signal wave. Spatial isolation between the high frequency circuits is ensured by an inexpensive and simple configuration using the single cavity.