Abstract: An embodiment relates to a method of manufacturing a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.

Abstract: A method of forming of an image sensor device includes an isolation well formed in a pixel region of a substrate. The isolation well has a first conductivity type. A gate stack is formed over the isolation well on the substrate. A mask layer is formed over the isolation well and covering at least a majority portion of the gate stack. A plurality of dopants is implanted in the pixel region, using the gate stack and the mask layer as masks, to form doped isolation features. The plurality of dopants has the first conductivity type. A source region and a drain region are formed on opposite sides of the gate stack in the substrate. The source region and the drain region have a second conductivity type opposite to the A conductivity.

Abstract: The invention relates to the production of solar panels which comprise solar cells connected to one another. In this case, various layers are stacked onto one another, such as a film layer, bonding agent, insulating film, solar cells and a support layer. Combining all these layers to form the final panel is carried out on a carrier which stabilizes and supports the stack while it is conveyed past the various treatment stations. The turning over of the stack can also be carried out in a reliable manner by means of such a carrier without shifts between the various components with respect to one another occurring.

Abstract: The present disclosure provides a method of manufacturing a photoelectric conversion device, including, a first step of forming a plurality of photoelectric conversion regions on a surface on one side of a semiconductor wafer, a second step of preparing a light-blocking wafer having insertion openings, a third step of bonding the one-side surface of the semiconductor wafer and a surface on the opposite side to a surface on the one side of the light-blocking wafer to each other to form a bonded wafer body, and a fourth step of dividing the bonded wafer body in peripheries of the photoelectric conversion regions, to obtain bonded-body chips each having the photoelectric conversion region.

Abstract: Disclosed are a solar cell module and a method of fabricating the same. The solar cell module includes a plurality of solar cells including a back electrode layer, a light absorbing layer, and a front electrode layer that are sequentially provided on a top surface of a support substrate, an inclined hole obliquely formed through the support substrate, a junction box on a bottom surface of the support substrate, and a bus bar connected to one of the solar cells and electrically connected to the junction box through the inclined hole.

Abstract: The present technique relates to a solid-state imaging device, a solid-state imaging device manufacturing method, and an electronic apparatus that are capable of providing a solid-state imaging device that can prevent generation of RTS noise due to miniaturization of amplifying transistors, and can achieve a smaller size and a higher degree of integration accordingly. A solid-state imaging device (1-1) includes: a photodiode (PD) as a photoelectric conversion unit; a transfer gate (TG) that reads out charges from the photodiode (PD); a floating diffusion (FD) from which the charges of the photodiode (PD) are read by an operation of the transfer gate (TG); and an amplifying transistor (Tr3) connected to the floating diffusion (FD). More particularly, the amplifying transistor (Tr3) is of a fully-depleted type.

Abstract: A solid-state image pickup unit includes: a p-type compound semiconductor layer of a chalcopyrite structure; an electrode formed on the p-type compound semiconductor layer; and an n-type layer formed separately for each pixel, on a surface opposite to a light incident side of the p-type compound semiconductor layer.

Abstract: A manufacturing method of a semiconductor device includes exposing a wiring layer which is formed of an alloy including two or more types of metals having different standard electrode potentials, on one surface side of a semiconductor substrate and performing a plasma process of allowing plasma generated by a mixture gas of a gas including nitrogen and an inert gas or plasma generated by a gas including nitrogen to irradiate a range which includes an exposed surface of the wiring layer.

Abstract: A CMOS image sensor includes a substrate, a gate electrode formed over the substrate, a photodiode formed over the substrate to be substantially aligned with one side of the gate electrode, a floating diffusion region formed over the substrate to be substantially aligned with the other side of the gate electrode, and a blooming pass region formed below the photodiode.

Abstract: Embodiments relate to a method for annealing a solar cell structure including forming an absorber layer on a molybdenum (Mo) layer of a solar cell base structure. The solar cell base structure includes a substrate and the Mo layer is located on the substrate. The absorber layer includes a semiconductor chalcogenide material. Annealing the solar cell base structure is performed by exposing an outer layer of the solar cell base structure to a plasma.

Abstract: An optoelectronic device includes: a substrate made of a first material; a region in the substrate, the region being made of a second material different from the first material; an N-well in the region made of the second material; and a photo diode formed in the region by ion implantation. The second material for example is silicon germanium (Si1-xGex) or silicon carbide (Si1-yCy) wherein 0<x,y<1.

Abstract: An image sensor may include a semiconductor substrate, a plurality of light receiving devices formed within the semiconductor substrate, and a plurality of device isolation films for isolating the light receiving devices from each other. When an arrangement direction of a pixel array may be formed by arranging the light receiving devices is a horizontal direction, the pixel array may be formed by alternately arranging a first type light receiving device and a second type light receiving device having different horizontal lengths.

Abstract: A method of manufacturing a semiconductor device, includes forming a trench in a semiconductor substrate having a first face and a second face by processing the first face of the semiconductor substrate, the trench including a first portion and a second portion located between the first portion and a plane including a first face, filling an insulator in the second portion such that a space remains in the first portion and the trench is closed, and forming a plurality of elements between the first face and the second face, wherein the space and the insulator form element isolation.

Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.

Abstract: A sputtering target device is provided for manufacturing solar cells. The target device includes a metal selected from a group consisting of copper, indium, and molybdenum and further includes antimony or antimony-containing compound mixed in a matrix of the metal. The target device comprises antimony of 0.1 to 20 wt % and the metal of at least 80 wt %. The target device is installed in a deposition system for forming a back electrode doped with antimony or for forming at least one precursor layer doped with antimony among a stack of multiple precursor layers for forming a semiconductor photovoltaic absorber material.

Abstract: An interlayer insulating film is disposed above an image pickup region and a peripheral region of the semiconductor substrate. An opening is formed in the interlayer insulating film at a position overlying a photoelectric conversion portion. A waveguide member is formed above the image pickup region and the peripheral region of the semiconductor substrate. A part of the waveguide member, which part is disposed above the peripheral region, is removed such that the interlayer insulating film is exposed.

Abstract: There is provided a solid-state imaging device including a pixel array unit in which pixels are arrayed in a two-dimensional manner, each of the pixels including a plurality of photoelectric conversion elements and a floating diffusion configured to accumulate an electric charge from the plurality of photoelectric conversion elements, wherein the floating diffusion is shared by at least two or more of the photoelectric conversion elements, and wherein one or more of the plurality of photoelectric conversion elements include a transfer gate configured to transfer an electric charge between the photoelectric conversion elements that are adjacent.

Abstract: A method is provided for forming a solid-state dye-sensitized solar cell (ssDSC) tandem module. The method fabricates a first panel by forming a first plurality of series-connected ssDSC cells overlying the first substrate top surface, with an electrical interface between each ssDSC cell. A second panel is fabricated in the same manner. An anisotropic conductive film (ACF) is formed overlying each electrical interface of the first panel ssDSC cells. Each ACF is aligned to a corresponding electrical interface of the second panel ssDSC cells, and the panels are bound. The result is a ssDSC tandem module comprising a first plurality of series-connected tandem sections, where each tandem section comprises a first panel ssDSC cell connected in parallel with an overlying second panel ssDSC cell. In one variation, the tandem sections include series-connected ssDSC cells.

Abstract: A solid state imaging device includes a substrate, in which the substrate includes a photoelectric conversion unit that generates a charge according to a light amount of incident light by a pixel unit, an accumulation unit that divides the charge of the pixel unit which is generated in the photoelectric conversion unit and accumulates the charge, a first element isolation unit that is formed at a boundary of the photoelectric conversion unit of the pixel unit, and a second element isolation unit that is formed at a boundary of the accumulation unit of a divided unit of the pixel.

Abstract: CMOS imaging sensors having fluorine-passivated structures to reduce dark current are disclosed together with methods of making thereof. The CIS comprises an array of pixels on a substrate, each pixel comprising a pinned photodiode, an isolation trench adjacent to the pinned photodiode, and a plurality of transistors. Methods of preparing a CIS comprise providing a source of fluorine (F) atoms, and annealing in the presence of the source of F atoms. After the annealing, at least one silicon-containing surface or region in the CIS comprises Si—F bonds and is fluorine passivated.

Abstract: A focal plane array (FPA) including a photodiode array (PDA) and a read out integrated circuit (ROIC). The PDA can include a plurality of conductive through-vias extending through the PDA and electrically isolated from the PDA. The plurality of conductive through-vias can be electrically coupled to circuitry on the ROIC circuit side. The plurality of conductive through-vias can include I/O interconnects such as BGA or other flip-chip bump interconnects that replace conventional wire bond connections, thereby reducing area requirements for bond pads on the ROIC and providing full area coverage of the ROIC circuitry by the PDA bulk material. Embodiments may therefore eliminate wire bonds using bonding to a plurality of metal traces for routing of these interconnects. In an embodiment, an optically transparent lid can include a plurality traces electrically coupled to the plurality of conductive through-vias.

Abstract: An integrated circuit having an array of APS cells. Each cell in the array has at least one transistor source or drain region that is raised relative to a channel region formed in a semiconductor substrate. The raised source or drain region includes doped polysilicon deposited on the surface of the semiconductor body and a region of the bodyextending to the channel region that has been doped to an opposite doping type from that of the channel region by diffusion of dopants from the deposited polysilicon.

Abstract: A method of preparing self-aligned isolation regions between two neighboring sensor elements on a substrate. The method includes patterning an oxide layer to form an opening between the two neighboring sensor elements on the substrate. The method further includes performing a first implant to form a deep doped region between the two neighboring sensor elements and starting at a distance below a top surface of the substrate. The method further includes performing a second implant to form a shallow doped region between the two neighboring sensor elements, wherein a bottom portion of the shallow doped region overlaps with a top portion of the deep doped region.

Abstract: A photoelectric conversion apparatus includes: an active matrix-type TFT array substrate on which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, wherein the photoelectric conversion element connects with a drain electrode via a contact hole opened through a first interlayer insulation film provided above the thin film transistor, wherein a data line and a bias line are connected with the source electrode and the photoelectric conversion element via respective contact holes opened through the second interlayer insulation, and wherein at least a part of the photoelectric conversion element is fixed to have a shape different from a normal pixel between pixels adjacent to each other in an extending direction of the gate line, and an electrical connection between the photoelectric conversion element and the data line is cut off in the transistor of the pixel having the different shape.

Abstract: A metal connector profile for the electrical connection and interconnection of back-contact solar cells is described. In addition, a solar module as well as a method for manufacturing such a solar module are described as well.

Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.

Abstract: A method of fabricating a solar cell is disclosed. The method includes the steps of forming a sacrificial layer on a silicon substrate, forming a doped silicon layer atop the sacrificial substrate, forming a silicon film atop the doped silicon layer, forming a plurality of interdigitated contacts on the silicon film, contacting each of the plurality of interdigitated contacts with a metal contact, and removing the sacrificial layer.

Abstract: The present invention provides a solar cell unit, which comprises a semiconductor plate of first-type doping or second-type doping; wherein the semiconductor plate has a first surface and a second surface opposite to the first surface; the semiconductor plate comprises a first-type doping region and second-type doping region, both the first-type doping region and the second-type doping region are located on the first surface of the semiconductor plate; a first sheet is provided on the side surface of the semiconductor plate that is adjacent to the first-type doping region, and a second sheet is provided on the side surface of the semiconductor plate that is adjacent to the second type doping region.

Abstract: A solid-state imaging device includes a plurality of photoelectric conversion units configured to receive light and generate signal charge, the plurality of photoelectric conversion units being provided in such a manner as to correspond to a plurality of pixels in a pixel area of a semiconductor substrate; and pixel transistors configured to output the signal charge generated by the photoelectric conversion units as electrical signals. Each of the pixel transistors includes at least a transfer transistor that transfers the signal charge generated in the photoelectric conversion unit to a floating diffusion corresponding to a drain. A gate electrode of the transfer transistor is formed in such a manner as to extend with a gate insulating film in between from a channel formed area to a portion where the photoelectric conversion unit has been formed on the surface of the semiconductor substrate.

Abstract: A method of manufacturing a display unit includes: forming, on a substrate, a thin-film transistor having an oxide semiconductor layer; and forming, above the thin-film transistor, a display region that includes a plurality of display elements. The oxide semiconductor layer is formed using a sputtering method in which a target and the substrate are opposed to each other. The target is made of an oxide semiconductor and includes a plurality of divided portions that are jointed in a planar form. A spacing interval between two joints that are formed by the plurality of divided portions and are side-by-side with one another of the target is equal to or less than a width of a luminance distribution arising in the display region in a direction substantially orthogonal to the joints.

Abstract: An image sensor having a light receiving region and an optical black region includes a semiconductor substrate, an interconnection disposed on the semiconductor substrate and extending along an interface between the light receiving region and the optical black region, and via plugs disposed between the interconnection and the semiconductor substrate and serving as light shielding members at the interface. The via plugs are arranged in a zigzagging pattern along the interface.

Abstract: A solid-state imaging device having a backside illuminated structure, includes: a pixel region in which pixels each having a photoelectric conversion portion and a plurality of pixel transistors are arranged in a two-dimensional matrix; an element isolation region isolating the pixels which is provided in the pixel region and which includes a semiconductor layer provided in a trench by an epitaxial growth; and a light receiving surface at a rear surface side of a semiconductor substrate which is opposite to a multilayer wiring layer.

Abstract: A method for manufacturing a photovoltaic module formed on a corrugated-sheet building material includes: shaping a base board in a manner that the base board thus shaped takes on a corrugated-sheet shape and therefore not only has thereon alternating grooves and ridges but also a processing surface defined between a said groove and an adjacent said ridge; forming a photovoltaic module on the processing surface of the base board by stacking a bottom adhesive film layer, a photovoltaic layer, a top adhesive film layer, and a condensing film layer on the processing surface in bottom-to-top order; rolling the photovoltaic module and the base board against each other at 130˜180° C. to effectuate engagement therebetween; and performing lamination within hermetically sealed space at 140˜170° C. and 2˜10 kg/cm2 for 5˜10 minutes. A back plate layer is disposed beneath the bottom adhesive film layer and connected to the base board through another adhesive film layer.

Abstract: A simple method that makes it possible to manufacture a highly-workable organic solar cell module having a plurality of connected organic solar cells is provided. The method includes: a first electrode substrate forming step of forming a plurality of first electrode layers on a first substrate to form a first electrode substrate; preparing a single piece of second electrode substrate-forming base material having at least a second electrode layer and capable of being cut into a plurality of second electrode substrates; a functional layer forming step; a cutting step to form a plurality of second electrode substrates; a bonding step so that the first and second electrode substrates are bonded together; and a connecting step of electrically connecting the first electrode layer of one of the organic solar cells to the second electrode layer of another organic solar cell which is adjacent to the one organic solar cell.

Abstract: According to an aspect of the invention, an imaging device includes a plurality of photoelectric conversion elements and a read-out portion. The photoelectric conversion elements are arranged above a substrate. The read-out portion reads out signal corresponding to charges which are generated from each of the photoelectric conversion elements. Each of the photoelectric conversion elements includes a first electrode that collects the charge, a second electrode that is disposed opposite to the first electrode, a photoelectric conversion layer that generates the charges and disposed between the first electrode and the second electrode, and an electron blocking layer that is disposed between the first electrode and the photoelectric conversion layer. Distance between the first electrodes of adjacent photoelectric conversion elements is 250 nm or smaller. Each of the electron blocking layers has a change in surface potential of ?1 to 3 eV from a first face to a second face.

Abstract: A process of forming an array of monolithic ally integrated thin film photo voltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe. A via scribe is formed in the stack of thin film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe. Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via. Conductive ink is also disposed along the top surface of the stack of thin film layers to form at least one conductive grid.

Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.

Abstract: Manufacturing a semiconductor device includes preparing a structure including a semiconductor substrate having a first region and a second region, a first insulating film arranged on the first region, a second insulating film arranged on the first insulating film, a third insulating film arranged on the second insulating film, a fourth insulating film arranged on the second region, a fifth insulating film arranged on the fourth insulating film, and a sixth insulating film arranged on the fifth insulating film, etching the second insulating film and the first insulating film under different etching conditions after etching the third insulating film, and continuously etching the fifth insulating film and the fourth insulating film under the same etching conditions after etching the sixth insulating film.

Abstract: A silicon solar cell having a silicon substrate includes p-type and n-type emitters on a surface of the substrate, the emitters being doped nano-particles of silicon. To reduce high interface recombination at the substrate surface, the nano-particle emitters are preferably formed over a thin interfacial tunnel oxide layer on the surface of the substrate.

Abstract: The invention relates to an InGaAs photodiode army (101) and to the method for manufacturing same, wherein said array includes: a cathode including at least one indium-phosphide substrate layer (4) and an active gallium-indium arsenide layer (5); and a plurality of anodes (3) at least partially formed in the active gallium-indium arsenide layer by diffusing a P-type dopant, the interaction between an anode (3) and the cathode forming a photodiode. According to said method, an indium-phosphide passivation layer (6) is arranged on the active layer before the diffusion of the P-type dopant forming the anodes (3), and a first selective etching is performed so as to remove, over the entire thickness thereof, an area (10) of the passivation layer (6) surrounding each anode (3).

Abstract: Transistors, methods of manufacturing thereof, and image sensor circuits are disclosed. In one embodiment, a transistor includes a buried channel disposed in a workpiece, a gate dielectric disposed over the buried channel, and a gate layer disposed over the gate dielectric. The gate layer comprises an I shape in a top view of the transistor.

Abstract: A method of fabricating a solar cell includes forming a front contact layer over a substrate, and the front contact layer is optically transparent at specified wavelengths and electrically conductive. A first scribed area is scribed through the front contact layer to expose a portion of the substrate. A buffer layer doped with an n-type dopant is formed over the front contact layer and the first scribed area. An absorber layer doped with a p-type dopant is formed over the buffer layer. A back contact layer that is electrically conductive is formed over the absorber layer.

Abstract: A method for producing thin-film solar modules, comprising the following steps: providing flexible thin-film solar cells as separate segments in a container or on a web wound up to a roll, the flexible thin-film solar cells bearing with a first side against the web, wherein each of the flexible thin-film solar cells is designed to have a first electric pole and a second electric pole; transferring the flexible thin-film solar cells from the web to a first film web such that the first pole of a first flexible thin-film solar cell is positioned next to the second pole of a second thin-film solar cell; and applying electrically conductive contact strips to the first and second poles of the flexible thin-film solar cells in longitudinal and/or transverse direction relative to the conveying direction of the first film web.

Abstract: The systems, methods, and devices of the various embodiments provide a photovoltaic cell made up of an array of photovoltaic bristles. The photovoltaic bristles may be configured individually and in an array to have a high probability of photon absorption. The high probability of photon absorption may result in high light energy conversion efficiency.

Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a directional light sensor. The directional light sensor includes a plurality of photodetectors located on the major surface. The directional light sensor also includes one or more barriers, wherein each barrier is positioned to shade one or more of the photodetectors from light incident upon the integrated circuit from a respective direction. The directional light sensor is operable to determine a direction of light incident upon the integrated circuit by comparing an output signal of at least two of the photodetectors.

Abstract: A solid-state imaging element includes a pixel having a photoelectric conversion section and a side pinning layer. The photoelectric conversion section is formed in a semiconductor substrate. The side pinning layer is formed on a side of the photoelectric conversion section. The side pinning layer is formed by performing ion implantation in a state of a trench being open, the trench being formed in a part on a side of a region in which the photoelectric conversion section is formed.

Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.

Abstract: An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate comprises: a substrate; a first oxide layer formed above the substrate; a second oxide layer formed above the first oxide layer with a channel part interposed therebetween; gate insulating film formed above the substrate, the first oxide layer and the second oxide layer; a gate electrode and a gate wire formed above the gate insulating film.

Abstract: A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first substrate with a dielectric layer formed on a front surface. One or more bonding pads and a heat spreader may be simultaneously formed in the dielectric layer. The first die is bonded with corresponding bond pads on a surface of a second die to form a stacked chip structure. Heat generated in the stacked chip structure may be diffused to the edges of the stacked chip structure through the heat spreader.

Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.