Abstract: A rear-contact solar cell interconnect is disclosed. The rear-contact solar cell interconnect includes a first conductive foil with an opening and a second conductive foil. The first conductive foil is arranged to be electrically connected to a first polarity contact of a solar cell. The second conductive foil is arranged to be electrically connected to a second polarity contact of the solar cell through the opening of the first conductive foil. The solar cell includes a first surface arranged to receive solar irradiation and a second surface substantially opposite the first surface. The first polarity contact and the second polarity contact are provided on the second surface of the solar cell.

Abstract: Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and one photodetector formed in the semiconductor substrate. The image sensor device also includes one gate stack formed over the semiconductor substrate. The gate stack includes multiple polysilicon layers.

Abstract: An image sensor may include a substrate having photoelectric conversion regions respectively formed on a plurality of pixels and charge trap regions overlapping with the respective photoelectric conversion regions and having depths or thicknesses that are different, for each of the respective pixel.

Abstract: Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image, and a manufacturing method for the solid-state imaging element. A solid-state imaging element (1) is provided with: a gate electrode (4) above a substrate (2); a charge storage region (5) formed at a position inside the substrate (2) and apart from a top surface (2a) of the substrate (2); a read region (6) formed at a position inside the substrate (2) and on the opposite side to the charge storage region (5) with the gate electrode (4) interposed therebetween; a channel region (7, 8) formed inside the substrate (2) and immediately below the gate electrode (4); and a shield region (9) and an intermediate region (10) formed inside the substrate (2) and between the top surface (2a) of the substrate (2) and the charge storage region (5).

Abstract: Image sensors may include a plurality of photodiodes. The photodiodes may be isolated from each other using isolations regions formed from p-well or n-well implants. Deep and narrow isolation regions may be formed using a multi-step process that selectively places implants at desired depths in a substrate. If desired, the multi-step process may include only one photolithographic patterning step, which in turn can help reduce costs, fabrication time, and alignment errors. The process may include passing ions through a stack of alternating layers of material such as alternating layers of oxide and nitride. After each implant, a layer in the stack may be removed and ions may be passed through the layers remaining in the stack to form an implant at a different depth in the substrate.

Abstract: A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.

Abstract: An optoelectronic device, including a semiconductor body having a surface to receive photons and a plurality of doped regions of opposite doping polarities, the doped regions extending substantially from the surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.

Abstract: The invention relates to a method and a device for producing a semiconductor layer. The problem addressed is that of increasing the deposition rate of the layer constituents and significantly improving the efficiency of a resulting solar cell. At the same time, the material costs are intended to be reduced. The problem is solved by virtue of the fact that, in a vacuum chamber, metal evaporator sources release Cu, In and/or Ga or the chalcogenide compounds, the latter are focused as metal vapor jets onto the substrate, and Se and/or S emerge(s) in an ionized fashion from a chalcogen low-energy wide-beam ion source and this beam is focused onto the surface of the substrate in such a way that it overlaps the metal vapor jets. A device for carrying out the method is described.

Abstract: A solid-state image pickup device, including: a plurality of pixels; a separation structure provided along a boundary line adjacent to the plurality of pixels; the separation structure includes a groove provided from a back surface of the semiconductor substrate to a depth corresponding to a wavelength, the groove being positioned along the boundary line, a first separation layer provided in the groove, and a second separation layer provided above the first separation layer and corresponding to the boundary line, the second separation layer being connected to the first separation layer; and methods including the same.

Abstract: A backside illuminated CMOS image sensor comprises an extended photo active region formed over a substrate using a first high energy ion implantation process and an isolation region formed over the substrate using a second high energy ion implantation process. The extended photo active region is enclosed by the isolation region, which has a same depth as the extended photo active region. The extended photo active region helps to increase the number of photons converted into electrons so as to improve quantum efficiency.

Abstract: An imitation solar module for structural and aesthetic use in an array of electricity generating solar modules. The imitation solar module having a non-standard shape and a visual representation such as a decal of an actual solar module surface thereon. The imitation solar module includes triangular shapes for use in staggered module arrays.

Abstract: A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.

Abstract: A color filter is formed using a simple manufacturing method, and bias application to a pixel separating electrode allows sensitivity in low illumination intensity to be improved. In a solid-state imaging element, in which a plurality of unit pixel sections are disposed two dimensionally on a side closer to a front surface of a semiconductor substrate or a semiconductor layer, each unit pixel section having a light receiving section for generating a signal charge by light irradiation, an adjoining unit pixel section is formed in the same color to allow for lesser alignment accuracy of the color filter. A pixel separating electrode is formed in the adjoining unit pixel section, and a signal charge is shared by bias application during low illumination intensity, thereby improving an effective photodiode area.

Abstract: A backside-illuminated active pixel sensor array in which crosstalk between adjacent pixels is prevented, a method of manufacturing the backside-illuminated active pixel sensor array, and a backside-illuminated image sensor including the backside-illuminated active pixel sensor array are provided. The backside-illuminated active pixel sensor array includes a semiconductor substrate of a first conductive type that comprises a front surface and a rear surface, light-receiving devices for generating charges in response to light incident via the rear surface, and one or more pixel isolating layers for forming boundaries between pixels by being disposed between the adjacent light-receiving devices, a wiring layer disposed on the front surface of the semiconductor substrate, and a light filter layer disposed on the rear surface of the semiconductor substrate, wherein a thickness of the one or more pixel isolating layers decreases from a point in the semiconductor substrate toward the rear surface.

Abstract: A method for fabricating a variable resistance memory device in accordance with an embodiment of the present invention includes: sequentially forming a first conductive layer and a variable resistance layer on a substrate; forming stacked structures in which first conductive lines and variable resistance lines are sequentially stacked by selectively etching the variable resistance layer and the first conductive layer; forming an insulating layer to fill a space between the stacked structures; forming a second conductive layer on the insulating layer and the stacked structures; and forming a second conductive line and a variable resistance pattern by etching the second conductive layer and the variable resistance line using mask patterns in a line type extending in a direction intersecting the stacked structures.

Abstract: A photoelectric conversion device, comprising a photoelectric conversion portion, provided in a semiconductor substrate, including a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type provided adjacent to the first semiconductor region, a third semiconductor region of the first conductivity type provided at a position away from the second semiconductor region, and a gate electrode provided between the second semiconductor region and the third semiconductor region, wherein the second semiconductor region is provided at a position away from the gate electrode, and the semiconductor substrate includes a region of a second conductivity type within a region extending from an edge of the second semiconductor region to below the gate electrode.

Abstract: A method includes forming a plurality of image sensors on a front side of a semiconductor substrate, and forming a dielectric layer on a backside of the semiconductor substrate. The dielectric layer is over the semiconductor substrate. The dielectric layer is patterned into a plurality of grid-filling regions, wherein each of the plurality of grid-filling regions overlaps one of the plurality of image sensors. A metal layer is formed on top surfaces and sidewalls of the plurality of grid-filling regions. The metal layer is etched to remove horizontal portions of the metal layer, wherein vertical portions of the metal layer remain after the step of etching to form a metal grid. A transparent material is filled into grid openings of the metal grid.

Abstract: There is provided a method of producing a semiconductor device. The method includes the steps of: forming a first hard mask having an opening above a substrate; forming a sacrificial film above a side surface of the opening of the first hard mask; forming a second hard mask in the opening having the sacrificial film above the side surface; removing the sacrificial film after the second hard mask is formed; ion implanting a first conductivity-type impurity through the first hard mask; and ion implanting a second conductivity-type impurity through the first and second hard masks.

Abstract: A method for reducing cross talk in image sensors comprises providing a backside illuminated image sensor wafer, forming an isolation region in the backside illuminated image sensor wafer, wherein the isolation region encloses a photo active region, forming an opening in the isolation region from a backside of the backside illuminated image sensor wafer and covering an upper terminal of the opening with a dielectric material to form an air gap embedded in the isolation region of the backside illuminated image sensor wafer.

Abstract: The solid-state imaging device according to the present invention includes a semiconductor substrate including an imaging region and a peripheral circuit region, a wiring layer formed on the semiconductor substrate, a plurality of pixel electrodes arranged in a matrix on the wiring layer above the imaging region, a photoelectric conversion film formed on the wiring layer and the plurality of pixel electrodes above the imaging region, and an upper electrode formed on the photoelectric conversion film. The photoelectric conversion film has a laminated structure in which a plurality of well layers and a plurality of barrier layers are alternately laminated, the well layers made of a first semiconductor having a fundamental absorption edge in a wavelength region longer than a near-infrared light wavelength, and the barrier layers made of an insulator or a second semiconductor having a band gap wider than that of the first semiconductor.

Abstract: Use of chemical mechanical polishing (CMP) and/or pure mechanical polishing to separate sub-cells in a thin film solar cell. In one embodiment the CMP is only used to separate the active, thin film layer into sub-cells, with scribing still being used to achieve sub-cell separation in conductive layers above and below the active, thin film layer. Also, the active layer may be placed over a series of protrusions so that the CMP removes the active layer that is over the protrusion, while leaving intact the flat, planar portions of the active layer. In this way, the removed active layer, from over the protrusions then becomes the division between sub-cells in the active layer.

Abstract: Two-terminal electronic devices, such as photodetectors, photovoltaic devices and electroluminescent devices, are provided. The devices include a first electrode residing on a substrate, wherein the first electrode comprises a layer of metal; an I-layer comprising an inorganic insulating or broad band semiconducting material residing on top of the first electrode, and aligned with the first electrode, wherein the inorganic insulating or broad band semiconducting material is a compound of the metal of the first electrode; a semiconductor layer, preferably comprising a p-type semiconductor, residing over the I-layer; and a second electrode residing over the semiconductor layer, the electrode comprising a layer of a conductive material. The band gap of the material of the semiconductor layer, is preferably smaller than the band gap of the I-layer material. The band gap of the material of the I-layer is preferably greater than 2.5 eV.

Abstract: The present invention provides a sealing material for a solar cell that seals a solar cell element of a solar cell in a short time in the production of a solar cell module, thereby enabling efficient production of solar cell modules. The sealing material for a solar cell of the present invention has a feature of containing 100 parts by weight of a modified butene-based resin that is produced by graft-modifying a butene-ethylene copolymer having a butene content of 1 to 25% by weight with maleic anhydride and has a total content of the maleic anhydride of 0.1 to 3% by weight, and 0.1 to 15 parts by weight of a silane compound having an epoxy group.

Abstract: Methods for opening polysilicon NFET and PFET gates for a replacement gate process are disclosed. Embodiments include providing a polysilicon gate with a nitride cap; defining PFET and NFET regions of the polysilicon gate, creating a nitride bump on the nitride cap; covering the nitride cap to a top of the nitride bump with a PMD; performing a 1:1 dry etch of the PMD and the nitride bump; and performing a second dry etch, selective to the nitride cap, down to the top surface of the polysilicon gate. Other embodiments include, after creating a nitride bump on the nitride cap, recessing the PMD to expose the nitride cap; covering the nitride cap and the nitride bump with a nitride fill, forming a planar nitride surface; and removing the nitride fill, nitride bump, and nitride cap down to the polysilicon gate.

Abstract: A solid-state imaging element including a semiconductor substrate that has a light reception portion performing a photoelectric conversion of an incident light; an oxide layer that is formed on a surface of the semiconductor substrate; a light shielding layer that is formed on an upper layer further than the oxide layer via an adhesion layer; and an oxygen supply layer that is disposed between the oxide layer and the adhesion layer and is formed of a material which shows an oxidation enthalpy smaller than that of a material forming the oxide layer.

Abstract: Disclosed is a solar cell module that includes: a plurality of solar cells connected with one another in such a manner that electrodes formed on surfaces of neighboring solar cells are connected with each other through a wiring member. A portion of the wiring member bites the electrodes, and the solar cells and the wiring member are bonded to each other by a resin.

Abstract: An image sensor includes: a photoelectric conversion pixel having a photoelectric conversion element that performs photoelectric conversion, and a light guide formed of a first material in an interlayer insulation film above the photoelectric conversion element; and a light-shielded pixel having a photoelectric conversion element that performs photoelectric conversion, a light guide formed of a second material that is different from the first material in an interlayer insulation film above the photoelectric conversion element, and a light-shielding layer formed above the light guide.

Abstract: A photo sensing chip and a manufacturing method thereof are disclosed. The photo sensing chip includes a silicon substrate and a plurality of photo sensors formed on the silicon substrate. The photo sensors include a first photo sensor and a second photo sensor. The first photo sensor has a first P-N junction and a first depletion region is formed at first P-N junction for receiving a first light band of an incident light to generate a first photo current. The second photo sensor has a second P-N junction and a second depletion region is formed at second P-N junction for receiving a second light band of the incident light to generate a second photo current. A first process parameter corresponds to the first depletion region and a second process parameter corresponds to the second depletion region, wherein the first process parameter and the second process parameter are different.

Abstract: An image sensor includes a plurality of photo detectors and a plurality of trench isolations configured to isolate the photo detectors from each other. Each of the trench isolations includes a plurality of films in a multi-layer structure. A method of manufacturing an image sensor includes forming a plurality of trench isolations to isolate a plurality of photo detectors from each other, forming a first film in each of the trench isolations, and forming a second film that constructs a multi-layer structure together with the first film.

Abstract: Provided is a radiation detecting element, including: a semiconductor layer including a tin oxide crystal; and a detecting unit configured to detect, as an electrical signal, charges generated in the semiconductor layer when the semiconductor layer is irradiated with radiation, in which a resistivity of the semiconductor layer is 107 ?·cm or more.

Abstract: A method of forming an ohmic contact and electron reflector on a surface of a CdTe containing compound film as may be found, for example in a photovoltaic cell. The method comprises forming a Cd-deficient, Te-rich surface region at a surface of the CdTe containing compound film; exposing the Cd-deficient surface region to an electron reflector forming material; forming the electron reflector; and laying down a contact layer over the electron reflector layer. The solar cell so produced has a Cd-deficient region which is converted to an electron reflector layer on the surface of a CdTe absorber layer, and an ohmic contact. A Cd/Te molar ratio within the Cd-deficient region decreases from 1 at an interface with the CdTe absorber layer to a value less than 1 towards the ohmic contact.

Abstract: A solid-state imaging device includes: a substrate which is formed of a semiconductor and includes a first surface and a second surface which face opposite sides; a gate insulation film which is formed on a trench formed in the substrate to penetrate the first surface and the second surface; and a gate electrode which is embedded in the trench through the gate insulation film to be exposed to a second surface side of the substrate. A step difference is formed from the second surface of the substrate to a tip end surface of the gate electrode on the second surface side.

Abstract: A solid-state imaging element includes a wiring layer; a charge accumulation unit including a semiconductor layer provided on the wiring layer; and a photoelectric conversion film provided on the semiconductor layer, wherein a pinning layer of a conductivity type opposite to a conductivity type of the charge accumulation unit, the pinning layer including an opening, is provided in a region of the charge accumulation unit, the region being located at an interface between the charge accumulation unit and the photoelectric conversion film.

Abstract: Systems and methods for dry eteching a photodetector array based on InAsSb are provided. A method for fabricating an array of photodetectors includes receiving a pattern of an array of photodetectors formed from InAsSb, the pattern including at least one trench defined between adjacent photodetectors, and dry etching the at least one trench with a plasma including BrCl3 and Ar.

Abstract: A method of forming a photovoltaic device that includes bonding a substrate to a germanium-containing semiconductor layer with a stressor layer, wherein the stressor layer cleaves the germanium-containing semiconductor layer. At least one semiconductor layer is formed on a cleaved surface of the germanium-containing semiconductor layer that is opposite the conductivity type of the germanium-containing semiconductor layer to provide a first solar cell. The first solar cell absorbs a first range of wavelengths. At least one second solar cell may be formed on the first solar cell, wherein the at least one second solar cell is composed of at least one semiconductor material to absorb a second range of wavelengths that is different than the first range wavelengths absorbed by the first solar cell.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: A photoelectric module includes a substrate, a first photoelectric conversion unit that is formed on the substrate and has a first light-receiving surface, and a second photoelectric conversion unit that is formed under the substrate and has a second light-receiving surface, wherein a front electrode of the second photoelectric conversion unit has a thickness smaller than that of a front electrode of the first photoelectric conversion unit. Also, the photoelectric module is a dual-side light-receiving photoelectric module having light-receiving surfaces on and under the substrate, and the first and second photoelectric conversion units respectively formed on the upper and lower surfaces of the substrate are differently designed to compensate for an intensity difference of incident light. Methods of manufacturing the dual-side light-receiving photoelectric module are provided.

Abstract: A sensor includes a sensor array formed on a first side of a substrate and at least one circuit operative to communicate with the sensor array formed on a second side of the substrate. At least one via extends through the substrate to electrically connect the sensor array to the at least one circuit. Placing the at least one circuit on the second side of the substrate allows the sensor array to occupy substantially all of the first side of the substrate.

Abstract: In a linear image sensor 1 according to an embodiment of the present invention, a plurality of embedded photodiodes PD(n) of an elongated shape are arrayed. Each of the embedded photodiodes PD(n) comprises a first semiconductor region 10 of a first conductivity type; a second semiconductor region 20 formed on the first semiconductor region 10, having a low concentration of an impurity of a second conductivity type, and having an elongated shape; a third semiconductor region 30 of the first conductivity type formed on the second semiconductor region 20 so as to cover a surface of the second semiconductor region 20; and a fourth semiconductor region 40 of the second conductivity type for extraction of charge from the second semiconductor region 20; the fourth semiconductor region 40 comprises a plurality of fourth semiconductor regions arranged as separated in a longitudinal direction of the second semiconductor region on the second semiconductor region 20.

Abstract: A method of manufacturing a detection apparatus including pixels is provided. The method includes forming an organic insulation layer above a substrate above which a switching element is formed, forming pixel electrodes divided for individual pixels above the organic insulation layer; forming an inorganic material portion above a portion of the organic insulation layer, which is uncovered with the pixel electrodes, forming an inorganic insulation film covering the plurality of pixel electrodes and the inorganic material portion, forming a semiconductor film covering the inorganic insulation film, and dividing the semiconductor film for individual pixels by etching using a stacked structure of the inorganic material portion and the inorganic insulation film as an etching stopper.

Abstract: An anodic etching system for simultaneously etching a multiplicity of substrates comprises: an etching tank for containing therein an etchant solution; a power supply connected between a first electrode and a second electrode, the first electrode and the second electrode being immersible in the etchant solution and positioned at opposite ends of the tank; and a plurality of support plates serially arranged between the first electrode and the second electrode and sealed to walls of the tank, wherein each of the plurality of support plates is configured to support at least one of the multiplicity of substrates, and wherein any consecutive pair of the plurality of support plates defines an isolated volume of the tank for containing a portion of the etchant solution. The plurality of support plates may be susceptors configured for holding the multiplicity of substrates in a chemical vapor deposition tool.

Abstract: In an image sensor 1 according to an embodiment of the present invention, a plurality of embedded photodiodes PD(m,n) are arrayed. Each of the embedded photodiodes PD(m,n) comprises a first semiconductor region 10 of a first conductivity type; a second semiconductor region 20 formed on the first semiconductor region 10 and having a low concentration of an impurity of a second conductivity type; a third semiconductor region 30 of the first conductivity type formed on the second semiconductor region 20 so as to cover a surface of the second semiconductor region 20; and a fourth semiconductor region 40 of the second conductivity type for extraction of charge from the second semiconductor region 20; the fourth semiconductor region 40 comprises a plurality of fourth semiconductor regions 40 arranged as separated, on the second semiconductor region 20.

Abstract: A semiconductor structure for photon detection, comprising a substrate composed of a semiconductor material having a first doping, a contact region fitted at the frontside of the substrate, a bias layer composed of a semiconductor material having a second doping, which is arranged on the backside of the substrate at a distance from the contact region, wherein the contact region at least partly lies opposite the bias layer, such that an overlap region is present in a lateral direction, a guard ring, which is arranged at the frontside of the substrate and surrounds the contact region, wherein a reverse voltage can be applied between the contact region and the guard ring. In order to enable more cost-effective production, the overlap region has a lateral extent amounting to at least one quarter of the distance between contact region and bias layer.

Abstract: A solid-state image sensor including a pixel unit arranged on a semiconductor substrate and including a plurality of photoelectric converters, and a peripheral circuit unit arranged on the semiconductor substrate and including MOS transistors and a capacitive element portion, wherein a gate insulating film of the MOS transistor in the peripheral circuit unit and an insulating film between facing electrodes of the capacitive element portion are nitrided, and a density of nitrogen atoms in the nitrided insulating film of the capacitive element portion is higher than the density of the nitrogen atoms in the nitrided insulating film of the MOS transistor in the peripheral circuit unit.

Abstract: A method of planarizing a member is provided. The method includes forming the member and polishing a top face of the member. The forming the member includes forming a resist layer which varies in thickness and performing an etch-back process. The etch-back process removes the resist layer and adjusts amounts to be removed by the polishing from respective locations of the member.

Abstract: The present invention is directed to a method of producing two or more thin-film-based interconnected photovoltaic cells (100) comprising the steps of: a) providing a photovoltaic article comprising: a flexible conductive substrate, at least one photoelectrically active layer, and a top transparent conducting layer; b) forming one or more first channels (140) through the flexible conductive substrate to expose a portion of the photoelectrical]?—active layer; e) applying an insulating segment to the conductive substrate and spanning the one or more first-channel; d) forming one or more second channels off set from the one or more first channels—‘through—the photoelectrically active layer to expose a conductive surface of the flexible conductive substrate; I) forming one or more third channels (170) off set from both the first channels and the second channels, through the top transparent conducting layer and to the photoelectrically active layer: and g) applying an electrically conductive material (180) above t

Abstract: An integrated circuit-solar cell device comprising a well region of a first dopant type, a solar cell including: (i) a first region disposed in or on the well region, wherein the first region is of the first dopant type, and (ii) a second region disposed outside the well region, wherein the second region is of a second dopant type. The device further includes an integrated circuit including: (i) a first transistor of a first type disposed in or on the well region, and (ii) a second transistor of a second type disposed in or on the first major surface of the substrate and outside the well region. Power management circuitry selectively and electrically couples the solar cell to the battery when the integrated circuit is in an inactive mode.

Abstract: The present invention provides a sealing material for a solar cell that seals a solar cell element of a solar cell in a short time in the production of a solar cell module, thereby enabling efficient production of solar cell modules. The sealing material for a solar cell of the present invention has a feature of containing 100 parts by weight of a modified butene-based resin that is produced by graft-modifying a butene-ethylene copolymer having a butene content of 1 to 25% by weight with maleic anhydride and has a total content of the maleic anhydride of 0.1 to 3% by weight, and 0.1 to 15 parts by weight of a silane compound having an epoxy group.

Abstract: Described herein is a device operable to detect polarized light comprising: a substrate; a first subpixel; a second subpixel adjacent to the first subpixel; a first plurality of features in the first subpixel and a second plurality of features in the second subpixel, wherein the first plurality of features extend essentially perpendicularly from the substrate and extend essentially in parallel in a first direction parallel to the substrate and the second plurality of features extend essentially perpendicularly from the substrate and extend essentially in parallel in a second direction parallel to the substrate; wherein the first direction and the second direction are different; the first plurality of features and the second plurality of features react differently to the polarized light.

Abstract: The present invention provides an image sensor and a method of fabricating the same. The image sensor comprises a semiconductor substrate, a photosensitive component, and a pixel-readout circuit, characterized in that, the semiconductor substrate comprises a supporting substrate, a first insulating buried layer, a first semiconductor layer, a second insulating buried layer, and a second semiconductor layer covered on the semiconductor substrate in sequence; the first semiconductor layer and the second semiconductor layer have different thicknesses, such that the photosensitive component is in the thicker semiconductor layer, and the pixel-readout circuit is in the thinner semiconductor layer. To realize the image sensor mentioned above, two different methods are provided. Ion implantation and bonding method are used respectively to provide the first and second insulating buried layers, and the first and second semiconductor layer substrates, and then the image sensor is fabricated.