Addressing Physical Block Of Locations, E.g., Base Addressing, Module Addressing, Memory Dedication, Etc. (epo) Patents (Class 711/E12.078)

E Subclasses

Interleaved addressing (epo) (Class 711/E12.079)
Address space extension (epo) (Class 711/E12.08)
Combination of memories, e.g., rom and ram, etc., to permit replacement or supplementing of words in one module by words in another module (epo) (Class 711/E12.083)
Configuration or reconfiguration (epo) (Class 711/E12.084)
  • MEMORY CARD, SEMICONDUCTOR DEVICE, AND METHOD OF CONTROLLING SEMICONDUCTOR MEMORY
    Publication number: 20070300011
    Abstract: A semiconductor device includes a controller which operates if a request is made that data be written in a certain area in a first block in a semiconductor memory having a predetermined erase block size in which data has already been written, to write the data requested to be written, in a leading area in a second block from which data has already been erased, regardless of a value of an address of the certain area.
    Type: Application
    Filed: August 27, 2007
    Publication date: December 27, 2007
    Inventor: Takashi OSHIMA