Particular Access Structure Patents (Class 714/27)
  • Patent number: 7388874
    Abstract: Per-interface electronic device protection switching systems and methods are disclosed. An electronic device and each communication line interface provided in the device are monitored, and device information and interface information are generated. The device and interface information is periodically sent to a mate electronic device in a protection group to which the electronic device belongs. Mate device information and mate interface information are also received by the device from the mate device. Activity states of each device interface are controlled based on at least one of the device information, the interface information, the mate device information, and the mate interface information.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: June 17, 2008
    Assignee: Alcatel Lucent
    Inventors: Herb Cameron, Peter Cameron Dippel
  • Patent number: 7386761
    Abstract: A diagnostic system and method for repairing computing devices comprises a diagnostic application running on a same computing system having a failed operating system (O/S). The diagnostic application is provided with access to the file system of the failed O/S image. The diagnostic software application collects relevant configuration information from the file system of the failed O/S image, and transports this information to a proxy system running the same operating system as the computing device being diagnosed. The proxy system utilizes the collected data to diagnose the subject failed O/S system. Once the proxy makes a determination it synthesizes repair information comprising new or modified files and instructions to be transported back to the diagnostic software system to apply. A network connection is provided between the computer running the diagnostic application and the proxy system that enables data to be easily transported between the two systems without human intervention.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 10, 2008
    Assignee: International Business Machines Corporation
    Inventors: Bulent Abali, Robert A. Saccone, Jr.
  • Patent number: 7380168
    Abstract: According to some embodiments, execution information is received from a first development tool. Execution information is also received from a second development tool. Based on the first execution information and the second execution information, operation of the first development tool may be controlled. According to some embodiments, the first and second development tools are associated with different processor architectures.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 27, 2008
    Assignee: Intel Corporation
    Inventors: Makaram Raghunandan, Rajendra S. Yavatkar, Shou C. Chen, Dave Edwards, Geoffrey R. Gustafson
  • Patent number: 7366955
    Abstract: A test execution system has a central repository that contains a management unit, available test suites and a single test execution harness. Using the management unit, a system administrator establishes active versions of the various test suites, and their individual configurations. End users install clients of the central repository, using a system-provided installer program. In the client, an execution script is created, which downloads the harness and a local configuration file. Then, when the harness is executed at the client, it loads with all designated test suites already installed, configured and ready for execution. The client always has the most current versions of all test suites. All necessary information is obtained from a single central location.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: April 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Olga Kuturianu, Victor Rosenman
  • Patent number: 7360115
    Abstract: Systems and methods are described for replicating virtual memory translation from a target computer on a host computer, and debugging a fault that occurred on the target computer on the host computer. The described techniques are utilized on a target computer having a processor that has halted execution. Virtual to physical address translation data from the target computer is transferred to the host computer. The host computer utilizes the virtual to physical address translation data to access data pointed by virtual memory addresses that were used by the target computer, and then debugs a fault by accessing the data by reading the physical memory address on the host computer. After the virtual to physical memory address translation data have been acquired, they can be cached at the host computer.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 15, 2008
    Assignee: Microsoft Corporation
    Inventors: Gregory Hogdal, John R. Eldridge
  • Patent number: 7356738
    Abstract: Electronic apparatus, such as a personal computer, is described comprising main operative functionality and a power provisioning system for powering the apparatus from an external power source, the power provisioning system comprising:—a main power supply output for energizing the main operative functionality of the apparatus when said power provisioning system is connected to said external power source, and a standby power source for energizing a subset of the components of the apparatus when said main power supply output is not energized, the apparatus further comprising a self contained subsystem including a memory for storing at least one parameter reflecting an internal state of the apparatus, said self contained subsystem being powered by said standby power source and including an encoder for encoding the parameters in an output signal and a transducer for generating a wireless transmission from the output signal, which transmission can be detected in the vicinity of the apparatus, so as to enable the p
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: April 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Eric Owhadi
  • Patent number: 7353426
    Abstract: Communication between an application program running on an information processing apparatus and a peripheral device and the communication between the information processing apparatus and a debugging device, used for debugging, is effected using a sole interface provided on the information processing apparatus. A switcher for debugging, including terminals 17a to 17c, connected to a cable 7, terminals 18a to 18c, connected to a cable 8, a terminal 16a, connected to a cable 6, a controller 41 connected to terminals 17a, 17b for command and to terminals 18a, 18b for command, and a switch unit 43 connected to the terminal for test 17c, terminal for test 18c and to the terminal 16a, is used. Based on input information 51, from one of the terminals for command 17a and 18b, the controller 41 outputs output information 52 to the other of the terminals for command 17a and 18b, while also outputting control information 57.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 1, 2008
    Assignee: NEC Electronics Corporation
    Inventors: Masao Higuchi, Masanori Takano
  • Patent number: 7350109
    Abstract: A computer system that includes a processor, a first bus coupled to the processor, a memory controller coupled to the first bus, a memory coupled to the memory controller, a first input/output (I/O) controller coupled to the first bus, and a test module coupled to the first I/O controller is provided. The test module is configured to cause tests to be performed on the memory using the first bus.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: March 25, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ken G. Pomaranski, Dale J. Shidla
  • Patent number: 7350108
    Abstract: A test board includes a plurality of sockets for connection to a plurality of integrated circuit chips to be tested. A test control device on the board turns on at least one test engine for testing the plurality of chips simultaneously. A checking circuit verifies the functionality of each chip by comparing outputs of chips with each other or with a golden chip. Failing chips are disconnected from further testing and passing or failing chips are recorded.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: March 25, 2008
    Assignee: International Business Machines Corporation
    Inventors: Alvar A. Dean, Sebastian T. Ventrone
  • Patent number: 7350115
    Abstract: A device management system includes a backplane, a device that communicates via the backplane and that stores identification information, a management module that receives the identification information and that provides a diagnostic module that corresponds to the identification information, and a controller associated with the device. The controller provides the identification information to the management module, receives the diagnostic module from the management module, and outputs diagnostic information for the device that is obtained via the diagnostic module.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: March 25, 2008
    Assignee: Intel Corporation
    Inventors: Tisson K. Mathew, Sivakumar Sathappan
  • Patent number: 7346808
    Abstract: An automated method, system, and computer program for troubleshooting the inability of programs installed upon two computers interconnected by wired or wireless linkages to share or manipulate sharable information includes the following steps: On a first computer, tests are performed to see if hardware or software elements on that computer and essential to sharing or manipulating sharable information is properly installed or configured and also to see if information can actually be sent between the two computers; then, if possible, testing is initiated or performed to see if hardware or software elements on the second computer essential to sharing or manipulating sharable information are also properly installed or configured; and then the results of this testing is reported.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: March 18, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Karamadai Srinivasan, Thomas M. Tripp, Rajpal Gill
  • Patent number: 7343591
    Abstract: A real time data exchange on demand system for transferring real time data between a host processor and a target processor is described. The target processor includes a real time target exchange library and API library interface to a target application. The host processor includes a target server, a real time data exchange API interface to a host data exchange application and a real time data exchange dynamic link library. An interconnection data link is coupled between said real time target exchange library on said target processor and said real time data exchange dynamic link library on said host processor. The host processor includes a user interface for programming real time data exchange transfer points for data exchange into the target processor that are passed down to the target processor via the interconnection data link. The target processor has programmable triggers that are programmed by the transfer points that call an appropriate real time data exchange routine to do the data transfer.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: March 11, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Leland J. Szewerenko, Deborah C. Keil, Craig D. McLean
  • Patent number: 7340649
    Abstract: A system and method for determining fault isolation in an enterprise computing system is disclosed. A method includes automatically troubleshooting errors in an enterprise computing system that receives at an analyzer engine a status notification from a first component. In response to receiving the status notification, the method automatically selects a first analyzer policy file from a set of analyzer policy files based on the status notification received at the analyzer engine, wherein the analyzer policy file contains troubleshooting logic for determining root causes for errors. The method automatically attempts to communicate with a second component based on the troubleshooting logic within the first analyzer policy file. The method automatically determines a root cause for the status notification based on the troubleshooting logic in the selected analyzer policy file and based on information obtained in connection with the attempt to communicate with the second component.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: March 4, 2008
    Assignee: Dell Products L.P.
    Inventors: Karthikeyan Angamuthu, Robert V. Cox, Stephanos S. Heracleous
  • Patent number: 7321998
    Abstract: A semiconductor integrated circuit includes a plurality of data output pins, a data processing circuit to generate output signals responsive to an input signal, and an output selection circuit with at least a normal mode and a test mode. A first group of output signals are provided to a first group of data output pins in a first test cycle of the test mode. And a second group of output signals are provided to a second group of data output pins during a second test cycle of the test mode. The semiconductor integrated circuit can be tested by means of a test device having less test pins than the output pins of the semiconductor integrated circuit under test.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: January 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam-Jung Her, Seok-Young Han
  • Publication number: 20080016395
    Abstract: Apparatus having corresponding methods and computer programs comprise: a processor; a test interface that is in communication with the processor only when the test interface is enabled; a first memory to store firmware for the processor; and a second memory to store boot code for the processor, wherein when the processor is booted, the boot code causes the processor to read a portion of the firmware from a predetermined location in the first memory; wherein the test interface is enabled only when the portion of the firmware has a predetermined value.
    Type: Application
    Filed: January 18, 2007
    Publication date: January 17, 2008
    Applicant: Marvell International Ltd.
    Inventor: Weishi Feng
  • Patent number: 7313730
    Abstract: An integrated circuit such as an FPGA containing an embedded processor having test circuitry capable of controlling the processor's resources using JTAG commands includes a formatting circuit that formats soft data received from an external storage device into a JTAG-compatible bitstream that can be used by the processor's test circuitry to access and/or control the processor's resources at any time, thereby allowing the embedded processor's resources to be accessed and controlled during FPGA configuration operations before the processor has been initialized to an operational state without using an external configuration tool. For some embodiments, the formatting circuit is a state machine that formats soft data such as firmware code, software programs, processor commands, and the like received from the external storage device into a JTAG-compatible bitstream that can be loaded into and/or used to access the resources of the embedded processor via the processors' test circuitry.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: December 25, 2007
    Assignee: Xilinx, Inc.
    Inventor: Peter Ryser
  • Patent number: 7293201
    Abstract: An active diagnostic and self healing system involves a support server configured to monitor the state of application and operating system software on a remote client, one or more of whose applications or OS has been registered to the automatic service of the invention. Software drivers or other patches, fixes or updates may be automatically transmitted to the client device via Internet or other connectivity upon the detection of an application or OS crash or other software fault. The user may select criteria according to which fixes and updates may be effected. The fixes and updates may be stored in a knowledge base, vendor databases or other resources, for instance available via Internet or other connections.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: November 6, 2007
    Assignee: Microsoft Corporation
    Inventor: Zubair Ansari
  • Patent number: 7284238
    Abstract: Method and apparatus to enable collection of information required for solving a problem caused by simultaneous access to a shared resource in a multithreading environment. In an information processor capable of executing a routine including a tracing process of collecting information related to the processing status in multithreading, a routine being executed is registered for each thread being activated, and the level of the tracing process for the routine being executed is determined based on information in the registration. The tracing process level for the routine being executed can be determined based on whether any routine identical to, or in a predetermined relation with, the routine is already registered.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Iwao Inagaki, Osamu Furusawa
  • Patent number: 7281163
    Abstract: In at least some embodiments, a computer system may comprise a CPU and a system memory coupled to the CPU. The computer system may further comprise a management device coupled to the CPU and the system memory. The management device is operable to permit remote control of the computer system by other computer systems. The management device is configured to receive a signal when the computer system malfunctions and, in response to receiving the signal, perform a data dump of at least some of the data in the system memory without involvement of the CPU.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: October 9, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew Brown, Christopher J. Frantz
  • Patent number: 7281167
    Abstract: The present invention provides for flexibly configurable network diagnostic modules that can implement any of a plurality of network diagnostic functions. A network diagnostic module receives an indication that a selected network diagnostic function (e.g., network analyzer, jammer, generator, bit error rate tester, etc.) is to be implemented. The network diagnostic module receives a bit file with instructions or data for implementing the selected network diagnostic function at one or more ports. The network diagnostic module identifies a programmable logic module (e.g., a Field-Programmable Gate Array (“FPGA”)) that controls the one or ports. The network diagnostic module loads a portion of the bit file at the identified programmable logic module to cause the programmable logic module and the one or more ports to interoperate to implement the selected network diagnostic function. A plurality of network diagnostic modules can be included in a common computer system chassis.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: October 9, 2007
    Assignee: Finisar Corporation
    Inventor: Jean-François Dubé
  • Patent number: 7269761
    Abstract: A remote diagnostics kit is provided to permit an in-flight entertainment system of an aircraft to be diagnosed remotely by an operator who is not on-site with the aircraft. The kit includes a remote computer, such as a laptop, that is connected to the IFE or a unit to be diagnosed. A technician operating a base computer accesses the remote computer over an appropriate communications network or series of networks. For example, in an embodiment, the remote computer includes a wireless modem, such as a cellular telephone modem, which the base computer accesses over the Internet. The base computer and remote computer are equipped with appropriate software to permit communication between the base and remote computers. Accordingly, through the base computer, the technician can command operation of a diagnostics program running at the remote computer, and output from the diagnostics program is transmitted to the base computer for display.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: September 11, 2007
    Assignee: Thales Avionics, Inc.
    Inventor: Jason Kyong-min Yi
  • Patent number: 7266722
    Abstract: A system and method are disclosed for providing a system and method for an efficient lock recovery. In one embodiment of the present invention, a multiple node networked system shares a resource such a shared storage. Among various other aspects of the present invention, when there is a change, such as a server failure, that prompts a recovery, the recovery can be performed in parallel among the nodes. A further aspect of an embodiment of the present invention includes recovering a lock with a higher level of exclusion prior to another lock with a lower level of exclusion.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: September 4, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Brent A. Kingsbury
  • Patent number: 7266726
    Abstract: Methods and apparatus for logging, analysis, and reporting of events such as reboots in a client device (e.g., consumer premises equipment in a cable network) using applications. In one aspect, an improved event logging and monitoring system is provided within the device with which the application(s) can interface to record event or error data. In one exemplary embodiment, the client device comprises a digital set-top box having Java-enabled middleware adapted to implement the various functional aspects of the event logging system, which registers to receive event notifications (including resource exhaustion data) from other applications running on the device. The network operator can also optionally control the operation of the logging system remotely via a network agent. Improved client device and network configurations, as well as methods of operating these systems, are also disclosed.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: September 4, 2007
    Assignee: Time Warner Cable Inc.
    Inventors: Patrick Ladd, George W. Sarosi
  • Patent number: 7257514
    Abstract: A solution engine (31) of a vendor's highly-automated adaptive computer support system (10) for a remote customer (20) automatically generates proposed solutions, e.g., sets of support documents, as a function of diagnostic data received from a customer's computer system (23). The automatically generated solution can be subject to expert review (35) prior to publication (37) to the customer, e.g., when the automated system assigns a low confidence level to the solution. In addition, expert review can be triggered by feedback (39) from the customer once a proposed solution is communicated. The diagnostic data, solutions and feedback for an incident are packaged (at 41) as a “case” and entered into an historical case database (45). A solution function updater (43) updates the solution function as a function, at least in part, of the expert review and customer feedback.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: August 14, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Yassine Faihe
  • Patent number: 7254745
    Abstract: A common interface (API) is provided which permits a single diagnostic probe manager to communicate with and to control a plurality of diagnostic probes. Through this interface the diagnostic probes are enabled to pass information concerning dependencies between software levels present in a hierarchical stack. This information is particularly useful in that it permits the probe manager to direct diagnostic efforts at the lowest desirable level so as to avoid the problems that occur when problems are indicated at a high level but which are actually caused by lower level software components.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: August 7, 2007
    Assignee: International Business Machines Corporation
    Inventors: Kenneth C. Briskey, Bruce M. Potter, Kesavaprasath Ranganathan
  • Patent number: 7254746
    Abstract: An apparatus and method for controlling and providing a robust, single entry cache memory is described in connection with an on-board cache memory integrated with a microprocessor. By implementing the single entry cache memory in a redundancy array of the cache memory, CPU debug procedures may proceed independently of the cache debug by disabling part of the cache memory and enabling a dedicated single entry cache in the redundancy array. Use of a cache redundancy array for the single entry cache imposes no area or latency penalties because the existing cache redundancy array already matches the latency of the cache.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: August 7, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Pradeep Kaushik, Dennis Wendell
  • Patent number: 7249286
    Abstract: A system and method for automatically diagnosing protocol errors from packet traces is provided. The system and method performs an automatic trace analysis on a packet trace to generate an analysis that is then fed into a diagnosis/resolution module. The diagnosis/resolution compares the trace analysis with the database of known problems to identify the protocol error and a suggested solution. The suggested solution then may be implemented, either by a user or by the DR module, to correct the protocol error.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: July 24, 2007
    Assignee: Network Appliance, Inc.
    Inventor: Prabhakar Krishnan
  • Patent number: 7246266
    Abstract: Corrupted firmware in a modem is automatically replaced. Replacement firmware is stored on a host computer. An update server executing on the host responds with firmware image in response to request from modem. Any interface port may be used to receive updated firmware, including a network interface.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: July 17, 2007
    Inventors: Chris Sneed, Jay E. Gottlieb, Alexander Grigoriev, Liem U. To, Chi-Wen Chen
  • Patent number: 7231540
    Abstract: An electronic apparatus is formed with a first module having a plurality of connectors and a plurality of second modules each connected to the first module through a different one of the connectors. The second modules are identified for each connector or as a combination corresponding to a plurality of connectors and it is checked whether they are preliminarily registered or not. If any of them is found to be not preliminarily registered, a display is made to the effect that a connection error has been committed and the start of a normal operation of the apparatus of prevented.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: June 12, 2007
    Assignee: OMRON Corporation
    Inventors: Katsuki Morimoto, Akira Takaishi, Motohisa Furukawa
  • Patent number: 7228457
    Abstract: A system-on-chip integrated circuit 2 is provided with multiple data processing circuits 4, 6, 8 each with an associated diagnostic interface circuit 16, 18, 20 connected via a diagnostic transaction bus 14 to a diagnostic transaction master circuit 12. The diagnostic master transaction circuit 12 issues diagnostic transaction requests to the diagnostic interface circuits 16, 18, 20. If the associated data processing circuits 4, 6, 8 are powered-down, or otherwise non responsive, then the diagnostic interface circuit 16, 18, 20 returns a diagnostic bus transaction error signal to the diagnostic transaction master circuit 12. A sticky-bit latch 30 within each diagnostic interface circuit 16, 18, 20 serves to record a power-down event and force generation of the diagnostic bus transaction error signal until that sticky bit is cleared by the diagnostic mechanisms.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: June 5, 2007
    Assignee: ARM Limited
    Inventors: Conrado Blasco Allue, Paul Kimelman, Andrew Brookfield Swaine, Richard Roy Grisenthwaite
  • Patent number: 7225245
    Abstract: Disclosed are a system and method of remotely providing diagnostic procedures to a processing system. Upon being launched on a processing system, an agent process may receive data to provide one or more diagnostic procedures from a data network coupled to the processing system. One or more of the diagnostic procedures may then be executed to provide diagnostic results.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Nagasubramanian Gurumoorthy, Raul Yanez, Mark J. Sullivan, Javier A. Galindo
  • Patent number: 7216256
    Abstract: Methods, systems, and products are disclosed for verifying the integrity of web server content. One method communicates with a server specified by a Uniform Resource Locator. Content specified by the Uniform Resource Locator is retrieved. If the content contains an additional link to another Uniform Resource Locator, then the content is parsed to determine if the content contains an error message. The existence of the error message indicates a partial page error.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: May 8, 2007
    Assignee: BellSouth Intellectual Property Corporation
    Inventors: Karthiksundar Sankaran, Zakir Patrawala, Timothy A. Hill
  • Patent number: 7210063
    Abstract: The invention may relate to a method of programming a programmable non-volatile device. The programmable non-volatile device may be programmed while coupled to a circuit in which the programmable non-volatile device is to be used. The method may include establishing a connection and communicating information. The connection may be established from an external device to a test interface of the circuit. The information may be communicated from the external device through the test interface, for programming the programmable non-volatile device.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: April 24, 2007
    Assignee: LSI Logic Corporation
    Inventors: John S. T. Holcroft, Christopher J. Lane, Ross A. Oldfield
  • Patent number: 7200776
    Abstract: A hardware trace unit is integrated into a computer system that has a main memory. The trace unit includes registers that contain information defining a location in main memory, and has an input connection. This is used to eavesdrop on communications in the computer system, thereby obtaining information about the state and/or operation of the system. A trigger mechanism then compares the information received against one or more trigger conditions, such as whether a particular event has occurred. Responsive to the trigger conditions being satisfied, the trace unit generates an output record containing diagnostic information. This is sent for storage in the main memory of the computer at the location defined in the registers.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Jeremy G Harris
  • Patent number: 7200775
    Abstract: A method and data structures for use in providing diagnostics on-demand services are provided. A data structure is provided that identifies one or more server-side entry points for use by a client computer upon which diagnostics on-demand are to be performed. A data structure is also provided that identifies available diagnostics modules, their component files, and that provides installation instructions for use in retrieving and installing diagnostics modules. A method for providing diagnostics on-demand utilizing the data files is also provided.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: April 3, 2007
    Assignee: American Megatrends, Inc.
    Inventors: Paul Anthony Rhea, Stefano Righi
  • Patent number: 7188275
    Abstract: A method of verifying a monitoring and responsive infrastructure of a system is provided and described. The method includes setting a sensor to a simulation mode. Further, a test value is provided to simulate a real value outputted by the sensor. While in the simulation mode, the test value instead of the real value is sent to the monitoring and responsive infrastructure to invoke a response. Moreover, the response to the test value is verified. In an embodiment, the monitoring and responsive infrastructure is compliant with an Intelligent Platform Management Interface specification.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: March 6, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard D. Ortiz, Zane P. Westover, Roy Tsuchida, Dick T. Fong, Gregory R. Hargis
  • Patent number: 7171336
    Abstract: A method for operating a measuring instrument is capable of performing multiple diagnostic functions. For this, a process control is provided for the execution of the diagnostic functions in a manner whereby the normal measuring operation of the measuring instrument is interrupted, a first diagnostic function is performed during that interruption, the normal measuring operation is resumed after completion of the first diagnostic function, the normal measuring operation is again interrupted, and during that later interruption of the normal measuring operation a second diagnostic function is performed. In this fashion, even numerous diagnostic functions can be easily and efficiently integrated into the operation of a measuring instrument such as a magnetoinductive flowmeter.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: January 30, 2007
    Assignee: Krohne A.G.
    Inventor: Helmut Brockhaus
  • Patent number: 7171585
    Abstract: Faults and errors are diagnosed from a repository of directed graphs. Subsets of all the possible questions and answers in the fault diagnosis process are encoded as directed graphs. Downloading subsets from a repository to a remote user substantially reduces the number of transmissions between the user and the repository.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: January 30, 2007
    Assignee: International Business Machines Corporation
    Inventors: H. Richard Gail, Sidney L. Hantler, George B. Leeman, Jr., Meir M. Laker, Daniel Milch
  • Patent number: 7168003
    Abstract: A program checks for installed printers, asks the users to select printers to be tested, and then proceeds to test for communications with the printer, print spooling and driver integrity as well as the driver's appropriateness for the operating system and for language and also whether newer and more current drivers are available. A report is then presented to the user indicating the status of the printer and, if appropriate, offering the user one click installation of a repaired, more appropriate, or updated driver.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: January 23, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rosa Aurora Lozano, Thomas Tripp
  • Patent number: 7168007
    Abstract: A method includes interfacing with a field replaceable unit (FRU) having a memory device configured to store a FRUID image including at least status data. The status data is extracted from the memory device. Repair information associated with a repair of the field replaceable unit is received. The repair information is stored in the memory device. A system includes a field replaceable unit (FRU) and a FRU tool. The FRU includes a memory device configured to store a FRUID image including at least status data. The FRU tool is configured to interface with the FRU, extract the status data from the memory device, receive repair information associated with a repair of the field replaceable unit, and store the repair information in the memory device.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: January 23, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Raymond J. Gilstrap, Steven E. Weiss, Gregory S. Jumper, Ira K. Weiny, Krishna Mohan
  • Patent number: 7152096
    Abstract: The present invention provides improved techniques for managing storage resources, such as disk drives, I/O ports, and the like in a network based storage system according to a user position within the network. Embodiments according to the present invention can provide a relatively high performance storage access environment for the mobile users moving around a wide area. For example, in one applicable environment, there are several data centers in the wide area, and each data center has a local storage system that is connected to the other storage systems through a network. Copies of a user's volume can be made in some of the storage systems. A remote copy function is utilized for making real time copies of the user's volume.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: December 19, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Akira Yamamoto, Naoko Iwami
  • Patent number: 7146535
    Abstract: A system for creating and editing checks for a knowledge automation engine to use in detecting product issues on products. A knowledge automation engine may evaluate a check against a fact to detect a product issue on a product and provide a client of the product remediation information. A check may contain a product issue description, a rule to evaluate against a fact in order to detect the product issue, and remediation information to help a client address the product issue if the product issue is detected on the product. Product issues may include product installation validation and known product bugs. Facts used by the knowledge automation engine may include product configuration facts. Statistics on check execution results may be accumulated to provide additional information on products through their life cycle.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: December 5, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Mike E. Little, Rex G. Martin, Matthew J. Helgren, Paris E. Bingham, Jr., Alan J. Treece
  • Patent number: 7146540
    Abstract: A disc array device receives a hardware diagnosis after shipment of the disc array device at short times during an operation of the device and a diagnostic rate is enhanced and an internal failure of a LSI can be detected at a device level. By at least one MP of a redundant-constitution channel interface control adaptor, a hardware diagnosis of a part in a channel interface control adaptor is made, and hardware diagnoses of a part in a CACHE and a part in a cache path switch are made through a diagnostic interface. By at least one MP of the redundant-constitutional disc drive interface control adaptor, a hardware diagnosis of a part in the disc drive interface control adaptor is made, and hardware diagnoses of a part in the CACHE and a part in the cache path switch are made through a diagnostic interface.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: December 5, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Shinobu Kakihara
  • Patent number: 7146536
    Abstract: Fact collection for a knowledge automation engine to use in detecting product issues on products. A knowledge automation engine may evaluate a check against a fact to detect a product issue on a product and provide a user of the product remediation information. A check may contain a product issue description, a rule to evaluate against a fact in order to detect the product issue, and remediation information to help a user address the product issue if the product issue is detected on the product. Product issues may include product installation validation and known product bugs. Facts used by the knowledge automation engine may include product configuration facts. Static facts may be collected into a fact repository. A fact collector may be used to collect facts not found in the fact repository but needed to execute checks on the knowledge automation engine.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: December 5, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Paris E. Bingham, Jr., Matthew J. Helgren, Rex G. Martin, Mike E. Little, Alan J. Treece
  • Patent number: 7146538
    Abstract: A bus interface module (“BIM”) connectable to a debug bus is described. In one embodiment, the BIM comprises a plurality of BIM segments connected in a ring such that an output of each BIM is connected to an input of a next BIM via the debug bus, the BIM comprising logic for receiving data from a previous BIM, logic for receiving data from local logic associated with the BIM, and logic for combining the previous BIM data with local logic data and transmitting the combined data to a next BIM.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: December 5, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Tyler James Johnson, Theodore Carter Briggs
  • Patent number: 7137036
    Abstract: A microcontroller including a CPU (Central Processor Unit) is capable of detecting the error of its structural part. The CPU executes a first initialization phase in response to a power-on reset signal output from a power-on reset circuit, then executes a second initialization phase in response to a start signal, and then executes usual processing. The CPU outputs a single timer run signal during first initialization phase and repeatedly outputs the timer run signals during usual processing. A watchdog timer starts timing in response to the timer run signal and then outputs an overflow signal on the elapse of a preselected period of time. After receiving the power-on reset signal from the power-on reset circuit, an error detector feeds the CPU with the start signal in response to an overflow signal output from the watchdog timer for the first time.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: November 14, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masakazu Urahama
  • Patent number: 7137085
    Abstract: A system and method for wafer level global bitmap characterization include determining chip level defect data bitmaps from a semiconductor wafer, and consolidating the chip level defect data bitmaps into a global wafer level bitmap that characterizes substantially the entire wafer failure configuration. The global wafer level bitmap is then analyzed and compared with other global wafer level bitmaps to develop correlations thereamong and develop global wafer level bitmap definitions for conducting at least one of wafer-to-wafer, boat-to-boat, and lot-to-lot process analysis based upon the global wafer level bitmap definitions.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: November 14, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: John J. Wang, Siu May Ho, Jeffrey P. Erhardt, Srikanth Sundararajan, David C. Newbury, Shivananda S. Shetty, Paul J. Steffan, Franklyn Shihyu Wu
  • Patent number: 7127639
    Abstract: A method of tracing activity of a data processor generates a trace data stream during a normal background mode and a foreground mode while servicing a real time interrupt during an emulation halt. An Interrupt During Suspend bit is set in foreground modes and transmitted in the trace data stream to distinguish the trace data streams between background mode and foreground mode.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: October 24, 2006
    Assignee: Texas Instruments Incorporated
    Inventor: Manisha Agarwala
  • Patent number: 7120069
    Abstract: An electronic apparatus which includes a wiring substrate which includes wiring conductors, and a plurality of semiconductor bare chips that are formed on the wiring substrate. The semiconductor bare chips include a processor for processing data and a circuit having a checking function for detecting faults of the processor.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: October 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Hirokazu Ihara, Masatsugu Akiyama, Kiyoshi Kawabata, Hisayoshi Yamanaka, Tetsuya Okishima
  • Patent number: 7120830
    Abstract: A method for requesting one or more machines to be maintained includes monitoring the machine or machines and detecting when a failure of at least one machine occurs. The method further includes executing a computer program on an electronic terminal associated with the failed machine. The method further includes entering data relating to the condition of the failed machine into the computer program via the electronic terminal and transmitting the data to a database server, thereby initiating a process to alter the condition of the failed machine. In one embodiment of the method, the database server compiles historical data relating to the condition of the one or more machines.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: October 10, 2006
    Assignee: First Data Corporation
    Inventor: Mark Tonack