Abstract: A method of producing an inorganic multi-layered thin film structure includes providing a substrate. A patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process. A second inorganic thin film material layer is selectively deposited on the region of the substrate where the thin film deposition inhibiting material layer is not present using an atomic layer deposition process.
Type:
Grant
Filed:
August 31, 2012
Date of Patent:
September 30, 2014
Assignee:
Eastman Kodak Company
Inventors:
Carolyn R. Ellinger, David H. Levy, Shelby F. Nelson
Abstract: A method of manufacturing a semiconductor device includes: accommodating a substrate in a processing chamber; and supplying an organosilicon-based gas into the processing chamber that is heated to form a film including silicon and carbon on the substrate. In the forming of the film including silicon and carbon, a cycle is performed a predetermined number of times. The cycle includes supplying the organosilicon-based gas into the processing chamber and confining the organosilicon-based gas in the processing chamber, maintaining a state in which the organosilicon-based gas is confined in the processing chamber, and exhausting an inside of the processing chamber.
Abstract: A manufacturing method for a semiconductor device, comprising: performing first processing on a plurality of wafers in a first processing order in a first processing apparatus; obtaining a processed amount with respect to each of the plurality of wafers in the first processing; obtaining a processed amount with respect to each of the plurality of wafers by second processing in a second processing apparatus after the first processing; deciding a second processing order, which is different from the first processing order, from the processed amount with respect to each of the plurality of wafers by the first processing and the processed amount with respect to each of the plurality of wafers by the second processing; and performing the second processing on the plurality of wafers in the second processing order in the second processing apparatus.
Abstract: Embodiments of the present invention provide a film stack and method for depositing an adhesive layer for a low dielectric constant bulk layer without the need for an initiation layer. A film stack for use in a semiconductor device comprises of a dual layer low-K dielectric deposited directly on an underlying layer. The dual low-K dielectric consists of an adhesive layer deposited without a carbon free initiation layer.
Type:
Application
Filed:
March 14, 2014
Publication date:
September 18, 2014
Applicant:
Applied Materials, Inc.
Inventors:
Kang Sub YIM, Pendar ARDALAN, Sure NGO, Alexandros T. DEMOS
Abstract: Methods for forming a hydrogen implanted amorphous carbon layer with desired film mechanical strength as well as optical film properties are provided. In one embodiment, a method of a hydrogen implanted amorphous carbon layer includes providing a substrate having a material layer disposed thereon, forming an amorphous carbon layer on the material layer, and ion implanting hydrogen ions from a hydrogen containing gas into the amorphous carbon layer to form a hydrogen implanted amorphous carbon layer.
Type:
Application
Filed:
March 7, 2014
Publication date:
September 18, 2014
Applicant:
APPLIED MATERIALS, INC.
Inventors:
Kwangduk Douglas LEE, Martin Jay SEAMONS, Matthew D. SCOTNEY-CASTLE, Martin A. HILKENE, Ludovic GODET
Abstract: A method of making a semiconductor material by pretreating a semiconductor substrate having a native oxide on the substrate surface under vacuum with hydrogen plasma to remove and/or modify the native oxide. After plasma exposure, a high-k dielectric is deposited in-situ onto the substrate using atomic layer deposition. There is no break in the vacuum between the plasma exposure and the atomic layer deposition. Also disclosed is the related semiconductor/dielectric material stack.
Type:
Application
Filed:
February 28, 2014
Publication date:
September 18, 2014
Inventors:
Sharka M. Prokes, Erin Cleveland, Laura Ruppalt
Abstract: Metal-oxide films (e.g., aluminum oxide) with low leakage current suitable for high-k gate dielectrics are deposited by atomic layer deposition (ALD). The purge time after the metal-deposition phase is 5-15 seconds, and the purge time after the oxidation phase is prolonged beyond 60 seconds. Prolonging the post-oxidation purge produced an order-of-magnitude reduction of leakage current in 30 ?-thick Al2O3 films.
Type:
Application
Filed:
September 6, 2013
Publication date:
September 18, 2014
Applicant:
Intermolecular, Inc.
Inventors:
Kurt Pang, Sean Barstow, Chi-I Lang, Michael Miller, Sandip Niyogi, Prashant B. Phatak
Abstract: A chemical solution for use in cleaning a patterned substrate includes water, from approximate 0.01 to 99.98 percent by weight; hydrogen peroxide, from 0 to 30 percent by weight; a pH buffering agent, from approximate 0.01 to 50 percent by weight; a metal chelating agent, from approximate 0 to 10 percent by weight; and a compound for lowering a surface tension of the combination of water, hydrogen peroxide, pH buffering agent, and metal chelating agent. Examples of the compound include an organic solvent, from approximate 0 to 95 percent by weight, or a non-ionic surfactant agent, from approximate 0 to 2 percent by weight.
Abstract: A vaporizing unit, in supplying a gas material produced by vaporizing a liquid material onto a substrate to conduct a film forming process, can vaporize the liquid material with high efficiency to suppress generation of particles. With the vaporizing unit, positively or negatively charged bubbles, which have a diameter of 1000 nm or less, are produced in the liquid material, and the liquid material is atomized to form a mist of the liquid material. Further, the mist of the liquid material is heated and vaporized. The fine bubbles are uniformly dispersed in advance in the liquid material, so that very fine and uniform mist particles of the liquid material are produced when the liquid material is atomized, which makes heat exchange readily conducted. By vaporizing the mist of the liquid material, vaporization efficiency is enhanced, and generation of particles can be suppressed.
Type:
Application
Filed:
May 19, 2014
Publication date:
September 11, 2014
Applicant:
Tokyo Electron Limited
Inventors:
Ikuo SAWADA, Sumie Nagaseki, Kyoko Ikeda
Abstract: A method of manufacturing a semiconductor device, includes treating a surface of an insulating film formed on a substrate by supplying a first precursor including a predetermined element and a halogen group to the substrate; and forming a thin film including the predetermined element on the treated surface of the insulating film by performing a cycle a predetermined number of times, the cycle comprising: supplying a second precursor including the predetermined element and the halogen group to the substrate; and supplying a third precursor to the substrate.
Abstract: A method of forming a nitrogen-containing oxide film is disclosed. The method comprises (a) exposing a substrate to a first gas pulse having one of an oxygen-containing gas and a metal-containing gas; (b) exposing the substrate to a second gas pulse having the other of the oxygen-containing gas and the metal-containing gas to form an oxide film over the substrate; and (c) exposing the oxide film to a third gas pulse having a nitrogen-containing plasma to form a nitrogen-containing oxide film, wherein the nitrogen-containing oxide film has a nitrogen concentration between about 0.1 and about 3 atomic percent (at %).
Type:
Application
Filed:
March 1, 2013
Publication date:
September 4, 2014
Inventor:
Taiwan Semiconductor Manufacturing Company Ltd.
Abstract: An oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element, to the substrate housed in a processing chamber and heated to a first temperature; and changing the specific element-containing layer formed on the substrate, to an oxide layer by supplying a reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure of less than atmospheric pressure and heated to a second temperature higher than the first temperature.
Abstract: The present invention relates to a magnesium oxide-based (MgO) inorganic coating intended to electrically insulate semiconductive substrates such as silicon carbide (SiC), and to a method for producing such an insulating coating. The method of the invention comprises the steps of preparing a treatment solution of at least one hydrolysable organomagnesium compound and/or of at least one hydrolysable magnesium salt, capable of forming a homogeneous polymer layer of magnesium oxyhydroxide by hydrolysis/condensation reaction with water; depositing the treatment solution of the hydrolysable organomagnesium compound or of the hydrolysable magnesium salt, onto a surface to form a magnesium oxide-based layer; and densifying the layer formed at a temperature of less than or equal to 1000° C.
Type:
Grant
Filed:
October 12, 2005
Date of Patent:
September 2, 2014
Assignee:
Commissariat a l'Energie Atomique
Inventors:
Céline Bondoux, Philippe Prene, Philippe Belleville, Robert Jerisian
Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a film containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a first process gas containing the predetermined element and a halogen element to the substrate; supplying a second process gas containing carbon and nitrogen to the substrate; supplying a third process gas containing carbon to the substrate; and supplying a fourth process gas to the substrate, the fourth process gas being different from each of the first to the third process gases.
Abstract: New photoresists are provided that comprise preferably as distinct components: a resin, a photoactive component and a phenolic component Preferred photoresists of the invention are can be useful for ion implant lithography protocols.
Abstract: An apparatus for use with radical sources for supplying radicals during semiconductor processing operations is provided. The apparatus may include a stack of plates or components that form a faceplate assembly. The faceplate assembly may include a radical diffuser plate, a precursor delivery plate, and a thermal isolator interposed between the radical diffuser plate and the precursor delivery plate. The faceplate assembly may have a pattern of radical through-holes with centerlines substantially perpendicular to the radical diffuser plate. The thermal isolator may be configured to regulate heat flow between the radical diffuser plate and the precursor delivery plate.
Type:
Application
Filed:
July 3, 2013
Publication date:
August 21, 2014
Inventors:
Patrick G. Breiling, Bhadri N. Varadarajan, Jennifer L. Petraglia, Bart J. van Schravendijk, Karl F. Leeser, Mandyam Ammanjee Sriram, Rachel E. Batzer
Abstract: Methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece, and forming a protective material over a bottom surface and edges of the workpiece. A top surface of the workpiece is processed. The protective material protects the edges and the bottom surface of the workpiece during the processing of the top surface of the workpiece.
Abstract: A method of making a Si containing gas distribution member for a semiconductor plasma processing chamber comprises forming a carbon member into an internal cavity structure of the Si containing gas distribution member. The method includes depositing Si containing material on the formed carbon member such that the Si containing material forms a shell around the formed carbon member. The Si containing shell is machined into the structure of the Si containing gas distribution member wherein the machining forms gas inlet and outlet holes exposing a portion of the formed carbon member in an interior region of the Si containing gas distribution member.
Abstract: An oxide film capable of suppressing reflection of a lens is formed under a low temperature. A method of manufacturing a semiconductor device includes forming a metal-containing oxide film on a substrate by performing a cycle a predetermined number of times, the cycle comprising: (a) supplying a metal-containing source to the substrate; (b) supplying an oxidizing source to the substrate; and (c) supplying a catalyst to the substrate.
Abstract: Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.
Type:
Grant
Filed:
May 10, 2012
Date of Patent:
August 5, 2014
Assignee:
International Business Machiness Corporation
Inventors:
John Michael Cotte, Christopher Vincent Jahnes, Bucknell Chapman Webb
Abstract: A semiconductor structure is provided, comprising: a Si substrate; a porous structure layer formed on the Si substrate, in which the porous structure layer has a flat surface and comprises a Si1-xGex layer with low Ge content; and a Ge-containing layer formed on the porous structure layer, in which the Ge containing layer comprises a Ge layer or a Si1-yGey layer with high Ge content and x?y. Further, a method for forming the semiconductor structure is also provided.
Abstract: Methods of forming a dielectric layer on a substrate are described, and may include introducing a first precursor into a remote plasma region fluidly coupled with a substrate processing region of a substrate processing chamber A plasma may be formed in the remote plasma region to produce plasma effluents. The plasma effluents may be directed into the substrate processing region. A silicon-containing precursor may be introduced into the substrate processing region, and the silicon-containing precursor may include at least one silicon-silicon bond. The plasma effluents and silicon-containing precursor may be reacted in the processing region to form a silicon-based dielectric layer that is initially flowable when formed on the substrate.
Abstract: A method of manufacturing a thin film transistor (TFT), a TFT manufactured by the method, a method of manufacturing an organic light-emitting display apparatus that includes the TFT, a display including the TFT. By including a buffer layer below and an insulating layer above a silicon layer for the TFT, the silicon layer can be crystallized without being exposed to air, so that contamination can be prevented. Also, due to the overlying insulating layer, the silicon layer can be patterned without directly contacting photoresist. The result is a TFT with uniform and improved electrical characteristics, and an improved display apparatus.
Type:
Grant
Filed:
September 23, 2011
Date of Patent:
July 29, 2014
Assignee:
Samsung Display Co., Ltd.
Inventors:
Byoung-Keon Park, Jong-Ryuk Park, Dong-Hyun Lee, Jin-Wook Seo, Ki-Yong Lee
Abstract: The surface of silicon is textured to create black silicon on a nano-micro scale by electrochemical reduction of a silica layer on silicon in molten salts. The silica layer can be a coating, or a layer caused by the oxidation of the silicon.
Abstract: A method of manufacturing a semiconductor device includes: (a) supplying a first process gas from a first process gas supply unit into a process chamber via a flow rate control device to form a film on a substrate; (b) transmitting a signal representing an exhaust pressure detected by a pressure detector to a controller after the first process gas is supplied into the process chamber; (c) controlling a pressure adjustor and the flow rate control device once the signal is received by the controller such that the exhaust pressure reaches a predetermined pressure; (d) supplying a purge gas from a purge gas supply unit into the process chamber to purge an inside atmosphere after forming the first film; and (e) supplying a second process gas from a second process gas supply unit into the process chamber via the flow rate control device to form a second film.
Abstract: Semiconductor devices with porous insulative materials are disclosed. The porous insulative materials may include a consolidated material with voids dispersed therethrough. The voids may be defined by shells of microcapsules. The voids impart the dielectric materials with reduced dielectric constants and, thus, increased electrical insulation properties.
Abstract: A method of manufacturing a semiconductor device includes forming a thin film containing a predetermined element, carbon, nitrogen and a borazine ring skeleton on a substrate by performing a cycle for a first predetermined number of times. The cycle includes forming a first layer containing the predetermined element, a halogen group, carbon and nitrogen by supplying a first precursor gas containing the predetermined element and the halogen group and a second precursor gas containing the predetermined element and an amino group to the substrate, for a second predetermined number of times; and forming a second layer containing the predetermined element, carbon, nitrogen and the borazine ring skeleton by supplying a reaction gas containing a borazine compound to the substrate and allowing the first layer to react with the borazine compound to modify the first layer under a condition where the borazine ring skeleton in the borazine compound is maintained.
Abstract: A method for making a carbon nanotube film includes the steps of: (a) adding a plurality of carbon nanotubes to a solvent to create a carbon nanotube floccule structure in the solvent; (b) separating the carbon nanotube floccule structure from the solvent; and (c) shaping the separated carbon nanotube floccule structure to obtain the carbon nanotube film.
Type:
Application
Filed:
December 20, 2007
Publication date:
July 17, 2014
Applicants:
HON HAI Precision Industry CO., LTD., Tsinghua University
Inventors:
Ding Wang, Chang-Hong Liu, Shou-Shan Fan
Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.
Abstract: A method is described for manufacturing a component having a through-connection. The method includes providing a substrate; forming a trench structure in the substrate, a substrate area which is completely surrounded by the trench structure being produced; forming a closing layer for closing off the trench structure, a cavity girded by the closing layer being formed in the area of the trench structure; removing substrate material from the substrate area surrounded by the closed-off trench structure; and at least partially filling the substrate area surrounded by the closed-off trench structure with a metallic material. A component having a through-connection is also described.
Abstract: Disclosed herein are methods of forming SiC/SiCN film layers on surfaces of semiconductor substrates. The methods may include introducing a silicon-containing film-precursor and an organometallic ligand transfer reagent into a processing chamber, adsorbing the silicon-containing film-precursor, the organometallic ligand transfer reagent, or both onto a surface of a semiconductor substrate under conditions whereby either or both form an adsorption-limited layer, and reacting the silicon-containing film-precursor with the organometallic ligand transfer reagent, after either or both have formed the adsorption-limited layer. The reaction results in the forming of the film layer. In some embodiments, a byproduct is also formed which contains substantially all of the metal of the organometallic ligand transfer reagent, and the methods may further include removing the byproduct from the processing chamber. Also disclosed herein are semiconductor processing apparatuses for forming SiC/SiCN film layers.
Abstract: By depositing the lower portion of a silicon dioxide interlayer dielectric by means of SACVD or HDP-CVD techniques, the generation of voids may be reliably avoided even for devices having spaces between closely spaced lines on the order of 200 nm or less. Moreover, the bulk silicon dioxide material is deposited by well-established plasma enhanced CVD techniques, thereby providing the potential for using well-established process recipes for the subsequent CMP process, so that production yield and cost of ownership may be maintained at a low level.
Type:
Grant
Filed:
March 16, 2005
Date of Patent:
July 8, 2014
Assignee:
GLOBALFOUNDRIES Inc.
Inventors:
Hartmut Ruelke, Christof Streck, Kai Frohberg
Abstract: According to one embodiment, a pattern forming method using a template containing a pattern that has at least one recess section or protrusion section to transfer the shape of the pattern to a resin layer on a substrate, is provided. The method includes a process for coating the resin on the substrate, a process for making the hardness of the first portion as a portion of the resin higher than the hardness of the second portion as the portion other than the first portion, and a process in which the portion other than the pattern of the template makes contact with the first portion, in a state where a gap is maintained between the template and the resin, the shape of the pattern is transferred to the second portion, and the resin is cured. Embodiments of an apparatus for pattern forming are also provided.
Abstract: A semiconductor device manufacture method has the steps of: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.
Abstract: Memory devices are described along with methods for manufacturing and methods for operating. A memory device as described herein includes a plurality of memory cells located between word lines and bit lines. Memory cells in the plurality of memory cells comprise a diode and a metal-oxide memory element programmable to a plurality of resistance states including a first and a second resistance state, the diode of the memory element arranged in electrical series along a current path between a corresponding word line and a corresponding bit line. The device further includes bias circuitry to apply bias arrangements across the series arrangement of the diode and the memory element of a selected memory cell in the plurality of memory cells.
Abstract: A method of forming a low-carbon silicon-containing film by CVD on a substrate having trenches includes: introducing a silicon-containing compound having three or less hydrocarbon units in its molecule and having a boiling temperature of 35° C. to 220° C.; applying RF power to the gas; and depositing a film on a substrate having trenches wherein the substrate is controlled at a temperature such that components of the silicon-containing compound are at least partially liquidified on the substrate, thereby filling the trenches with the film.
Abstract: During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots.
Type:
Grant
Filed:
May 11, 2012
Date of Patent:
July 1, 2014
Assignee:
International Business Machines Corporation
Abstract: A method of making a porous SiOC membrane is provided. The method comprises disposing a SiOC layer on a porous substrate, and etching the SiOC layer to form through pores in the SiOC layer. A porous SiOC membrane having a network of pores extending through a thickness of the membrane is provided.
Abstract: A surface treatment method for a semiconductor device includes providing a substrate where a plurality of projected patterns are formed, forming a hydrophobic coating layer on a surface of each of the plurality of projected patterns, rinsing the substrate with deionized water, and drying the substrate, wherein the hydrophobic coating layer is formed using a coating agent that includes phosphate having more than one hydrocarbon group, phosphonate having more than one hydrocarbon group, or a mixture thereof.
Type:
Application
Filed:
March 15, 2013
Publication date:
June 26, 2014
Applicant:
SK hynix Inc.
Inventors:
Sung-Hyuk CHO, Hyo-Sang KANG, Sung-Ki PARK, Kwon HONG, Hyung-Soon PARK, Hyung-Hwan KIM, Young-Bang LEE, Ji-Hye HAN, Tae-Yeon JUNG, Hyeong-Jin NOR
Abstract: A method of forming a carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. The dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen.
Type:
Application
Filed:
February 28, 2014
Publication date:
June 26, 2014
Applicants:
GLOBALFOUNDRIES, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Alfred Grill, Joshua L. Herman, Son Nguyen, E. Todd Ryan, Hosadurga K. Shobha
Abstract: A method for manufacturing a semiconductor device includes: forming a semiconductor element on a main surface of a substrate; forming a low melting glass film having a melting point of 450° C. or less on the main surface and the semiconductor element; heat treating the substrate while pressing the low melting glass film toward the main surface of the substrate with a pressurizing jig that is insulating or semi-insulating, and sintering the low melting glass film; and leaving the pressurizing jig on the low melting glass film after sintering the low melting glass film.
Type:
Application
Filed:
September 25, 2013
Publication date:
June 26, 2014
Applicant:
Mitsubishi Electric Corporation
Inventors:
Yoichi Nogami, Yoshitsugu Yamamoto, Yoshinori Yokoyama, Shinnosuke Soda
Abstract: A method of forming a material comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material.
Abstract: A method of mounting a semiconductor chip includes: forming a resin coating on a surface of a path connecting a bonding pad on a surface of a semiconductor chip and an electrode pad formed on a surface of an insulating base material; forming, by laser beam machining, a wiring gutter having a depth that is equal to or greater than a thickness of the resin coating along the path for connecting the bonding pad and the electrode pad; depositing a plating catalyst on a surface of the wiring gutter; removing the resin coating; and forming an electroless plating coating only at a site where the plating catalyst remains.
Abstract: The present disclosure provides manufacturing techniques and semiconductor devices in which performance of P-channel transistors may be enhanced on the basis of a stress mechanism that involves the deposition of a dielectric bi-layer system. Contrary to conventional strategies, an additional pre-treatment may be performed prior to the deposition of an adhesion layer in a plasma-free process atmosphere, thereby enabling a reduced thickness of the adhesion layer and a higher internal stress level of the subsequent top layer.
Abstract: A film formation device to conduct a film formation process for a substrate includes a rotating table, a film formation area configured to include a process gas supply part, a plasma processing part, a lower bias electrode provided at a lower side of a position of a height of the substrate on the rotating table, an upper bias electrode arranged at the same position of the height or an upper side of a position of the height, a high-frequency power source part connected to at least one of the lower bias electrode and the upper bias electrode and configured to form a bias electric potential on the substrate in such a manner that the lower bias electrode and the upper bias electrode are capacitively coupled, and an exhaust mechanism.
Abstract: Substrate processing uniformity is improved in the surfaces of wafers and between the wafers. A method of manufacturing a semiconductor device, including: loading a substrate holder into an inner tube, the substrate holder holding a plurality of substrates in a state where the plurality of substrates are horizontally oriented and stacked; forming thin films on the plurality of substrates by supplying a source gas to an inside of the inner tube; and unloading the substrate holder from the inner tube, wherein the forming the thin films is performed in a state where a conductance of a space between an inner wall of the inner tube and a gas penetration preventing cylinder is smaller than a conductance of a region where the plurality of substrates are stacked.
Abstract: A method for forming a dielectric film is disclosed. The method includes (a) exposing a substrate to a first gas pulse having a first oxygen-containing gas in a chamber; (b) exposing the substrate to multiple consecutive second gas pulses having a second oxygen-containing gas in the chamber, wherein the first oxygen-containing gas is different from the second oxygen-containing gas; and (c) sequentially after (a) and (b), exposing the substrate to a third gas pulse having a metal-containing gas in the chamber. Steps (a), (b), and (c) may be repeated any number of times to form the dielectric film with a predetermined thickness.
Abstract: Apparatuses and methods are provided for electrostatically inhibiting particle contamination of a surface of a process structure, such as a mask or reticle. The apparatuses include a plasma-generating system configured to establish a plasma shield over the surface of the process structure. The plasma shield includes a plasma region and a plasma sheath over the surface of the process structure, with the plasma sheath being disposed, at least partially, adjacent to the surface of the process structure, between the plasma region and the surface of the process structure. The plasma shield facilitates negatively charging particles within the plasma shield, and electrostatically inhibits negatively-charged particle contamination of the surface of the process structure to be protected.
Type:
Application
Filed:
December 11, 2012
Publication date:
June 12, 2014
Applicants:
BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS, SEMATECH, INC.
Inventors:
John R. SPORRE, Vibhu JINDAL, David RUZIC
Abstract: A polyimide film is effectively formed on a complicated surface. The polyimide film is formed by reacting, on the surface, diamine monomer and tetracarboxylic acid dianhydride monomer both of which are dissolved within carbon dioxide in a supercritical states, together with a polyamic acid resulting from a reaction between the diamine monomer and the tetracarboxylic acid dianhydride reached to the surface.
Abstract: A periphery coating unit performs a scan-in process of moving a resist liquid nozzle 27 from an outside of an edge Wb of a wafer W to a position above a periphery region Wc of the wafer W while rotating the wafer W and discharging a resist liquid from the resist liquid nozzle 27; and a scan-out process of moving the resist liquid nozzle 27 from the position above the periphery region Wc of the wafer W to the outside of the edge Wb of the wafer W while rotating the wafer W and discharging the resist liquid from the resist liquid nozzle 27. Further, in the scan-out process, the resist liquid nozzle 27 is moved at a speed v2 lower than a speed v3 at which the resist liquid is moved to a side of the edge Wb of the wafer W.