Abstract: Methods, materials, and systems are described for forming conformal dielectric layers containing silicon and nitrogen (e.g., a silicon-nitrogen-hydrogen (Si—N—H) film) from a carbon-free silicon-and-nitrogen precursor and radical-nitrogen precursor. The carbon-free silicon-and-nitrogen precursor is predominantly excited by contact with the radical-nitrogen precursor. Because the silicon-and-nitrogen film is formed without carbon, the conversion of the film into hardened silicon oxide is done with less pore formation and less volume shrinkage. The deposited silicon-and-nitrogen-containing film may be wholly or partially converted to silicon oxide which allows the optical properties of the conformal dielectric layer to be selectable. The deposition of a thin silicon-and-nitrogen-containing film may be performed at low temperature to form a liner layer in a substrate trench.

Abstract: A method of manufacturing a semiconductor device, includes: forming a film containing a predetermined element on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a first precursor containing the predetermined element and a halogen group to the substrate; supplying a second precursor containing the predetermined element and an amino group to the substrate; and supplying a reducing agent not containing halogen, nitrogen and carbon to the substrate.

Abstract: A method of forming a surface passivation layer on a surface of a crystalline silicon substrate is disclosed. In one aspect, the method includes depositing an Al2O3 layer on the surface, the Al2O3 layer having a thickness not exceeding about 15 nm; performing an outgassing process at a temperature in the range between about 500° C. and 900° C., after the deposition of the Al2O3 layer on the surface; and after the outgassing process, depositing at least one additional dielectric layer such as a silicon nitride layer and/or a silicon oxide layer on the Al2O3 layer.

Abstract: Embodiments related to metal oxide protective layers formed on a surface of a halogen-sensitive metal-including layer present on a substrate processed in a semiconductor processing reactor are provided. In one example, a method for forming a metal oxide protective layer is provided. The example method includes forming a metal-including active species on the halogen-sensitive metal-including layer, the metal-including active species being derived from a non-halogenated metal oxide precursor. The example method also includes reacting an oxygen-containing reactant with the metal-including active species to form the metal oxide protective layer.

Abstract: Disclosed are group IV metal-containing precursors and their use in the deposition of group IV metal-containing films {nitride, oxide and metal) at high process temperature. The use of cyclopentadienyl and imido ligands linked to the metal center secures thermal stability, allowing a large deposition temperature window, and low impurity contamination. The group IV metal (titanium, zirconium, hafnium)-containing f{umlaut over (?)}m depositions may be carried out by thermal and/or plasma-enhanced CVD, ALD, and pulse CVD.

Abstract: A method includes: forming a thin film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a source gas to the substrate in a process chamber; and (b) supplying a reactive gas to the substrate in the process chamber, wherein at least one of (a) and (b) includes: (c) supplying the source gas or the reactive gas at a first flow rate with exhaust of an inside of the process chamber being suspended until an inner pressure of the process chamber reaches a predetermined pressure; and (d) supplying the source gas or the reactive gas at a second flow rate less than the first flow rate with exhaust of the inside of the process chamber being performed while maintaining the inner pressure of the process chamber at the predetermined pressure after the inner pressure of the process chamber reaches the predetermined pressure.

Abstract: The invention concerns the use of the ruthenium-containing precursor having the formula (Rn-chd) Ru(CO)3, wherein: (Rn-chd) represents a cyclohexadiene (chd) ligand substituted with n substituents R, any R being in any position on the chd ligand; n is an integer comprised between 1 and 8 (1?n?8) and represents the number of substituents on the chd ligand; R is selected from the group consisting of C1-C4 linear or branched alkyls, alkylamides, alkoxides, alkylsilylamides, amidinates, carbonyl and/or fluoroalkyl for R being located in any of the eight available position on the chd ligand, while R can also be oxygen O for substitution on the C positions in the chd cycle which are not involved in a double bond for the deposition of a Ru containing film on a substrate.

Abstract: A dielectric containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric produce a reliable dielectric for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also include structures for capacitors, transistors, memory devices, and electronic systems with dielectrics containing a titanium aluminum oxide film.

Abstract: In a method of forming a dense contact-hole pattern in a semiconductor device, the method uses a self-align double patterning technique including forming a square or triangular lattice dot pattern on double layers of mask materials, forming first holes in the upper mask material and second holes wider than the first holes in the lower mask material by double patterning, additionally forming an insulating layer to a thickness such that the first holes are closed such that voids are left in the second holes, and transferring the shape of the voids to a base layer.

Abstract: A substrate is mounted onto an elevated substrate support of a substrate carrier plate. The substrate carrier plate with the substrate is then placed in a plasma reactor. Due to the elevated substrate support, both opposite sides of the substrate are exposed to the plasma and are therefore coated with an electrical passivation layer.

Abstract: A method for forming a silicon-containing dielectric film on a substrate by atomic layer deposition (ALD) includes: providing two precursors, one precursor containing a halogen in its molecule, another precursor containing a silicon but no halogen in its molecule, adsorbing a first precursor, which is one of the two precursors onto a substrate to deposit a monolayer of the first precursor; adsorbing a second precursor, which is the other of the two precursors onto the monolayer of the first precursor to deposit a monolayer of the second precursor; and exposing the monolayer of the second precursor to radicals of a reactant to cause surface reaction with the radicals to form a compound monolayer of a silicon-containing film.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array part, a first contact part, and a peripheral circuit part. The first contact part is juxtaposed with the memory cell array part in a first plane. The peripheral circuit part is juxtaposed with the memory cell array part in the first plane. The memory cell array part includes a first stacked body, a first semiconductor layer, and a memory film. The first contact part includes a first contact part insulating layer, and a plurality of first contact electrodes. The peripheral circuit part includes a peripheral circuit, a structure body, a peripheral circuit part insulating layer, and a peripheral circuit part contact electrode. A width along an axis perpendicular to the first axis of the peripheral circuit part insulating layer is smaller than a diameter of the first particle.

Abstract: According to the invention, there is provided a plasma processing apparatus which can generate plasma stably and efficiently, and can efficiently treat all of the desired regions to be treated of a base material within a short period of time. Provided is a plasma processing apparatus including an opening portion having an opening width of 1 mm or more; a dielectric member that defines a circular chamber constituting a circular space which communicates the opening; a gas supply pipe that introduces gas into an inside of the circular chamber; a coil that is provided in a vicinity of the circular chamber; a high-frequency power supply that is connected to the coil; and a base material mounting table on which a base material is disposed near the opening.

Abstract: The present invention provides polyimide polymer materials for passivating semiconductor wafers and methods for fabricating thereof. The present invention further provides a device that includes a semiconductor wafer and a passivating layer disposed on the surface of the wafer, wherein the passivating layer comprises such polyimide polymers.

Abstract: A method is provided for reducing film surface roughness in Chemical Vapor Deposition (CVD) of dielectric films. The method may include removing dangling bonds from a film surface of a CVD dielectric film by a reactant. For reducing a surface roughness of a dielectric film, a further method may passivate a nonstoichiometric film surface of the dielectric film, or of a previous dielectric film, or of the dielectric film and of a previous dielectric film, by a reactant gas in the vapor environment. The dielectric film may include at least one out of the following group: ultraviolet light transparent Silicon Nitride (UVSIN), Silicon Rich Oxide (SRO), Silicon Dioxide (SiO2), Silicon Nitride (Si3N4), Phosphosilicate Glass (PSG), or Silicon Oxynitride (SiON) The reactant gas may include at least one out of the following group: Ammonia (NH3), Hydrogen (H2), Nitrous Oxide (N2O), or Oxygen (O2).

Abstract: The present disclosure reduces and, in some instances, eliminates the density of interface states in III-V compound semiconductor materials by providing a thin crystalline interlayer onto an upper surface of a single crystal III-V compound semiconductor material layer to protect the crystallinity of the single crystal III-V compound semiconductor material layer's surface atoms prior to further processing of the structure.

Abstract: A method of forming a film of lanthanide oxide nanoparticles. In one embodiment, the method includes the steps of: (a) providing a first substrate with a conducting surface and a second substrate that is positioned apart from the first substrate, (b) applying a voltage between the first substrate and the second substrate, (c) immersing the first and the second substrates in a solution that comprises a plurality of lanthanide oxide nanoparticles suspended in a non-polar solvent or apolar solvent for a first duration of time effective to form a film of lanthanide oxide nanoparticles on the conducting surface of the first substrate, and (d) after the immersing step, removing the first substrate from the solution and exposing the first substrate to air while maintaining the applied voltage for a second duration of time to dry the film of lanthanide oxide nanoparticles formed on the conducting surface of the first substrate.

Abstract: Example embodiments relate to a method of forming a hardened porous dielectric layer. The method may include forming a dielectric layer containing porogens on a substrate, transforming the dielectric layer into a porous dielectric layer using a first UV curing process to remove the porogens from the dielectric layer, and transforming the porous dielectric layer into a crosslinked porous dielectric layer using a second UV curing process to generate crosslinks in the porous dielectric layer.

Abstract: Embodiments related to depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method of processing a substrate includes, applying photoresist to the substrate, exposing the photoresist to light via a stepper, patterning the resist with a pattern and transferring the pattern to the substrate, selectively removing photoresist from the substrate, placing the substrate into a process station, and, in the process station, in a first phase, generating radicals off of the substrate and adsorbing the radicals to the substrate to form active species, in a first purge phase, purging the process station, in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the active species and generate the film, and in a second purge phase, purging the process station.

Abstract: A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film structured as one or more monolayers.

Abstract: Methods are described for forming a dielectric layer on a semiconductor substrate. The methods may include providing a silicon-containing precursor and an energized nitrogen-containing precursor to a chemical vapor deposition chamber. The silicon-containing precursor and the energized nitrogen-containing precursor may be reacted in the chemical vapor deposition chamber to deposit a flowable silicon-carbon-nitrogen material on the substrate. The methods may further include treating the flowable silicon-carbon-nitrogen material to form the dielectric layer on the semiconductor substrate.

Abstract: Methods are described for forming and curing a flowable silicon-carbon-and-nitrogen-containing layer on a semiconductor substrate. The silicon and carbon constituents may come from a silicon and carbon containing precursor while the nitrogen may come from a nitrogen-containing precursor that has been activated to speed the reaction of the nitrogen with the silicon-and-carbon-containing precursor at lower deposition chamber temperatures. The initially-flowable silicon-carbon-and-nitrogen-containing layer is treated to remove components which enabled the flowability, but are no longer needed after deposition. Removal of the components increases etch resistance in order to allow the gapfill silicon-carbon-and-nitrogen-containing layer to remain intact during subsequent processing. The treatments have been found to decrease the evolution of properties of the film upon exposure to atmosphere.

Abstract: Methods are described for forming and curing a gapfill silicon-and-carbon-containing layer on a semiconductor substrate. The silicon and carbon constituents may come from a silicon-and-carbon-containing precursor excited by a radical hydrogen precursor that has been activated in a remote plasma region. Exemplary precursors include 1,3,5-trisilapentane (H3Si—CH2—SiH2—CH2—SiH3) as the silicon-and-carbon-containing precursor and hydrogen (H2) as the hydrogen-containing precursor. The hydrogen-containing precursor may also be a hydrocarbon, such as acetylene (C2H2) or ethylene (C2H4). The hydrogen-containing precursor is passed through a remote plasma region to form plasma effluents (the radical hydrogen precursor) which are flowed into the substrate processing region. When the silicon-and-carbon-containing precursor combines with the plasma effluents in the substrate processing region, they form a flowable silicon-carbon-and-hydrogen-containing layer on the semiconductor substrate.

Abstract: Disclosed are new methods of fabricating metal oxide thin films and nanomaterial-derived metal composite thin films via solution processes at low temperatures (<400° C.). The present thin films are useful as thin film semiconductors, thin film dielectrics, or thin film conductors, and can be implemented into semiconductor devices such as thin film transistors and thin film photovoltaic devices.

Abstract: Provided is a substrate processing apparatus. The substrate processing apparatus includes: a process chamber configured to accommodate a substrate; a substrate holding member configured to hold the substrate in the process chamber; a first gas supply system including a first gas supply hole for supplying a first process gas into the process chamber; a second gas supply system including a second gas supply hole for supplying a second process gas into the process chamber; and a catalyst supply system including a catalyst supply hole for supplying a catalyst into the process chamber, wherein an angle between a first imaginary line connecting a center of the substrate holding member and the first gas supply hole and a second imaginary line connecting the center of the substrate holding member and the catalyst supply hole ranges from 63.5 degrees to 296.5 degrees.

Abstract: The present application discloses a method of manufacturing a semiconductor structure. According to at least one embodiment, a first etch stop layer is formed over a conductive feature and a substrate, and the conductive feature is positioned over the substrate. A second etch stop layer is formed over the first etch stop layer. A first etch is performed to form an opening in the second etch stop layer, and the opening exposes a portion of the first etch stop layer. A second etch is performed to extend the opening downwardly by removing a portion of the exposed first etch stop layer, and the extended opening exposes a portion of the conductive feature.

Abstract: A semiconductor device includes an interlayer insulation film, a wiring embedded in the interlayer insulation film and an air gap part formed between a side surface of the wiring and the interlayer insulation film. A first sidewall film is formed in the air gap part so that the first sidewall film contacts with the side surface of the wiring.

Abstract: Low-k porous insulating films with a high modulus of elasticity are made by depositing alkylated cyclic siloxane precursors over a semiconductor substrate by CVD. Plasma enhancement of the CVD is performed either during CVD or in situ on the deposited film. A UV cure of the film is effected under controlled temperature and time conditions, which generates a tight bonding structure between adjacent ring moieties without disrupting the Si—O ring bonding.

Abstract: A disclosed film deposition apparatus has a separation area arranged between a first process area and a second area as viewed from a wafer that is rotated by a turntable, and a modification area arranged between the second process area and the first process area as viewed from the wafer that is rotated by the turntable where a modification process is performed on a reaction product formed on the wafer by a plasma generating unit. Further, a protruding portion is arranged at a casing that surrounds the modification area, and the atmospheric pressure of the modification area is arranged to be higher than the atmospheric pressure of the areas adjacent to the modification area.

Abstract: A vapor deposition method and apparatus including at least two vessels containing a same first source chemical. A controller is programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels, each of the doses having a substantially consistent concentration of the first source chemical. The apparatus may also include at least two vessels containing a same second source chemical. The controller can be programmed to simultaneously pulse to the reaction space doses or pulses of a gas from the vessels containing the second source chemical, each of the doses having a substantially consistent concentration of the second source chemical. The second source chemical can be pulsed to the reaction space after the reaction space is purged of an excess of the first source chemical.

Abstract: A substrate structure is produced by forming a first material layer on a substrate having a recess, removing the first material layer from the portion of the substrate except for the recess using a second material that reacts with the first material, and forming a deposition film from the first material layer using a third material that reacts with the first material. A method of manufacturing a device may include the method of forming a substrate structure.

Abstract: A method is provided for forming FinFETS with improved alignment features. Embodiments include forming on a Si substrate pillars of TEOS on poly-Si; conformally depositing a first TEOS liner over the entire substrate; etching the first TEOS liner and substrate through the pillars, forming first trenches; filling the first trenches and spaces between the pillars with an oxide; removing the TEOS from the pillars and the oxide therebetween; removing the poly-Si; conformally depositing a second TEOS liner over the entire Si substrate; etching the second TEOS liner and Si between the oxide, forming second trenches having a larger depth than the first trenches; filling the second trenches with oxide; removing the oxide and the first and second TEOS liners down to an upper surface of the Si substrate; and recessing the oxide below the upper surface of the Si substrate.

Abstract: Disclosed are new methods of fabricating metal oxide thin films and nanomaterial-derived metal composite thin films via solution processes at low temperatures (<400° C.). The present thin films are useful as thin film semiconductors, thin film dielectrics, or thin film conductors, and can be implemented into semiconductor devices such as thin film transistors and thin film photovoltaic devices.

Abstract: A process for treating a semiconductor-on-insulator structure that has, in succession, a support substrate, a layer of an oxide or oxynitride of a semiconductor material, and a thin semiconductor layer of the semiconductor material. The process includes providing, on the surface of the thin layer, a mask defining exposed regions of the thin layer; providing a layer of nitride or oxynitride of the semiconductor material on the exposed regions of the thin layer; and applying a heat treatment causing at least some of the oxygen in the oxide or oxynitride layer to diffuse through the exposed regions. The nitride or oxynitride layer is provided at a thickness sufficient to provide a ratio of the rate of oxygen diffusion though the exposed regions to that through the regions covered with the mask that is greater than 2.

Abstract: A solvent such as PGMEA is coated on a wafer in advance to easily spread resist liquid onto the wafer on a spin chuck. Before coating, the solvent supplied from a solvent supply source is stored in a distill tank first, the solvent is heated by a heating unit to be evaporated, and the evaporated solvent is cooled by a cooler, thereby performing the purification of the solvent by distillation. Therefore, particles among the solvent are removed. The purified solvent is stored in a storage tank first, and then supplied to a solvent nozzle above the spin chuck from a solvent supplying line. And then, the solvent is coated on the wafer by ejecting the solvent from the solvent nozzle to the wafer. Further, the distill tank is cleaned periodically to suppress the increase of the concentration of the particles in the solvent.

Abstract: The present disclosure relates to a guiding element for guiding gas flow within a chamber. The guiding element includes a structure, one or more inlets, an outlet, and a transportation region. The one or more inlets are formed on a first side of the structure. The inlets have inlet sizes selected according to a removal rate and to mitigate gas flow variations within the chamber. The outlet is on a second side of the structure, opposite the first side of the structure. The outlet has an outlet size selected according to the removal rate. The transportation region is within the structure and couples or connects the inlets to the outlet.

Abstract: A gate stack structure for field effect transistor (FET) devices includes a nitrogen rich first dielectric layer formed over a semiconductor substrate surface; a nitrogen deficient, oxygen rich second dielectric layer formed on the nitrogen rich first dielectric layer, the first and second dielectric layers forming, in combination, a bi-layer interfacial layer; a high-k dielectric layer formed over the bi-layer interfacial layer; a metal gate conductor layer formed over the high-k dielectric layer; and a work function adjusting dopant species diffused within the high-k dielectric layer and within the nitrogen deficient, oxygen rich second dielectric layer, and wherein the nitrogen rich first dielectric layer serves to separate the work function adjusting dopant species from the semiconductor substrate surface.

Abstract: A laser micro/nano processing system (100, 200, 300, 400) comprises: a laser light source used to provide a first laser beam having a first wavelength and a second laser beam having a second wavelength different from the first wavelength, with the pulse width of the first laser beam being in the range from a nanosecond to a femtosecond; an optical focusing assembly used to focus the first laser beam and the second laser beam to the same focal point; and a micro mobile platform (21) controlled by a computer. Also disclosed are a method for micro/nano-processing photosensitive materials with a laser and a method for fabricating a device with a micro/nano structure using laser two-photon direct writing technology. In the system and methods, spatial and temporal overlapping of two laser beams is utilized, so as to obtain a micro/nano structure with a processing resolution higher than that of a single laser beam, using an average power lower than that of a single laser beam.

Abstract: In accordance with the present techniques, there is provided a JFET device structures and methods for fabricating the same. Specifically, there is provided a transistor including a semiconductor substrate having a source and a drain. The transistor also includes a doped channel formed in the semiconductor substrate between the source and the drain, the channel configured to pass current between the source and the drain. Additionally, the transistor has a gate comprising a semiconductor material formed over the channel and dielectric spacers on each side of the gate. The source and the drain are spatially separated from the gate so that the gate is not over the drain and source.

Abstract: The present invention provides a method of manufacturing a semiconductor device. The method includes stacking a SiO2 film, a N-containing stopper film, and a resist pattern in this order on a semiconductor substrate, performing etching on the stopper film and the SiO2 film with a F-containing etching gas, with the resist pattern serving as a mask to form an opening, and performing ashing on the resist pattern to remove the resist pattern, using a gas containing an oxygen gas and an inert gas under the condition that the ratio of the oxygen radical to the inert-gas radical becomes equal to or lower than 5.

Abstract: To remove the deposit including a high dielectric constant film deposited on an inside of a processing chamber, by using a cleaning gas activated only by heat. The method includes the steps of: loading a substrate or a plurality of substrates into the processing chamber; performing processing to deposit the high dielectric constant film on the substrate by supplying processing gas into the processing chamber; unloading the processed substrate from the inside of the processing chamber; and cleaning the inside of the processing chamber by supplying a halide gas and an oxygen based gas into the processing chamber, and removing the deposit including the high dielectric constant film deposited on the inside of the processing chamber, and in the step of cleaning the inside of the processing chamber, the concentration of the oxygen based gas in the halide gas and the oxygen based gas is set to be less than 7%.

Abstract: Provided is a method of manufacturing a semiconductor device capable of forming a nitride layer having high resistance to hydrogen fluoride at low temperatures. The method includes forming a nitride film on a substrate by performing a cycle a predetermined number of times, the cycle including supplying a source gas to the substrate, supplying a plasma-excited hydrogen-containing gas to the substrate, supplying a plasma-excited or thermally excited nitriding gas to the substrate, and supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate.

Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

Abstract: A toughening agent composition for increasing the hydrophobicity of an organosilicate glass dielectric film when applied to said film. It includes a component capable of alkylating or arylating silanol moieties of the organosilicate glass dielectric film via silylation, and an activating agent selected from the group consisting of an amine, an onium compound and an alkali metal hydroxide.

Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed, which is capable of realizing an extension of a cleaning cycle for a processing chamber, the method comprising preheating a substrate; placing the preheated substrate onto a substrate-supporting unit provided in a susceptor while the preheated substrate is maintained at a predetermined height from an upper surface of the susceptor provided in a processing chamber; and forming a thin film on the preheated substrate, wherein a temperature of the preheated substrate is higher than a processing temperature for forming the thin film in the processing chamber.

Abstract: The method of forming a silicon oxycarbonitride film on a base includes stacking a silicon carbonitride film and a silicon oxynitride film on the base to form the silicon oxycarbonitride film.

Abstract: A method of fabricating a semiconductor device may include forming active and field regions in a substrate; forming a gate trench in which the active and field regions are exposed; forming a gate insulating layer on a surface of the exposed active region, wherein forming the gate insulating layer includes forming a first gate oxide layer by primarily oxidizing the surface of the active region, and forming a second gate oxide layer between the surface of the active region and the first gate oxide layer by secondarily oxidizing the surface of the active region; conformally forming a gate barrier layer on the gate insulating layer and the exposed field region; forming a gate electrode layer on the gate barrier layer; and forming a gate capping layer in contact with the gate insulating layer, the gate barrier layer, and the gate electrode layer in the gate trench.

Abstract: This description relates to a method including forming an interfacial layer over a semiconductor substrate. The method further includes etching back the interfacial layer. The method further includes performing an ultraviolet (UV) curing process on the interfacial layer. The UV curing process includes supplying a gas flow rate ranging from 10 standard cubic centimeters per minute (sccm) to 5 standard liters per minute (slm), wherein the gas comprises inert gas, and heating the interfacial layer at a temperature less than or equal to 700° C. The method further includes depositing a high-k dielectric material over the interfacial layer.

Abstract: A method of depositing a film with a target conformality on a patterned substrate, includes: depositing a first film on a convex pattern and a bottom surface; and depositing a second film on the first film, thereby forming an integrated film having a target conformality, wherein one of the first and second films is a conformal film which is non-flowable when being deposited and has a conformality of about 80% to about 100%, and the other of the first and second films is a flowable film which is flowable when being deposited.