Abstract: The present invention relates to a method for forming a planar conductive surface on a wafer. In one aspect, the present invention uses a no-contact process with electrochemical deposition, followed by a contact process with electrochemical mechanical deposition.

Abstract: A method of electro-plating comprises providing an anode current for a target, applying an electron beam to the surface of a target and passing electrolyte between said target and anode, thereby to deposit material on said target. An electron beam gun directs an electron beam onto web while anode provides a current thereby depositing material on the web.

Abstract: Shielded electronic integrated circuit apparatus (5) includes a substrate (10), with an eletronic integrated circuit (15) formed thereon, and a dielectric region (12) positioned on the electronic integrated circuit. The dielectric region and the substrate are substantially surrounded by lower and upper magnetic material regions (26, 30), deposited using electrochemical deposition, and magnetic material layers on each side (32, 34). Each of the lower and upper magnetic material regions preferably include a glue layer (36, 40), a seed layer (28, 24), and an electrochemically deposited magnetic material layer (26, 30). Generally, the electrochemically deposited magnetic material layer can be conveniently deposited by electroplating.

Abstract: A plating apparatus includes a plating solution tank which stores a plating solution, a holder including an inner space to house a wafer and an opening for the wafer to be in contact with the plating solution, and a nitrogen supplying mechanism to supply nitrogen to the inner space of the holder.

Abstract: The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative movement between the workpiece and the workpiece-surface-influencing device is established so that an additive in the electrolyte solution disposed on the workpiece and which is adsorbed onto the top surface is removed or otherwise its amount or concentration changed with respect to the additive on the cavity surface of the workpiece. Plating of the conductive material can place prior to, during and after usage of the workpiece-surface-influencing device, particularly after the workpiece surface influencing device no longer contacts any portion of the top surface of the workpiece, to achieve desirable semiconductor structures.

Abstract: An apparatus for analyzing a substrate employing a copper decoration includes a bath having at least two receiving containers for receiving electrolytes, slots formed at insides of the receiving containers for receiving substrates to be analyzed in a direction that is normal to a bottom face of the bath, lower copper plates provided in the receiving containers, the lower copper plates making contact with entire rear faces of the substrates received in the receiving containers, upper copper plates provided in the receiving containers, each of the upper copper plates corresponding to a respective one of the lower copper plates, and separated from front faces of the substrates, and a power source connected to the upper copper plates and the lower copper plates for providing voltages to the same. A plurality of substrates may be simultaneously analyzed using one apparatus thereby greatly reducing an amount of time required for the analysis.

Abstract: Electroplating station S has a head 1 with anode 2, to one side of which there is located an electrically neutral wall 3. The width of anode 2 is provided to accommodate the width of web 6. Serrations 9 are provided on the anode 2, especially in the area of top surface 8. A passageway 4 for electrolyte 5 is between anode 2 and wall 3. Mesh 11 is located at a throat section 12 of passageway 4 shortly before the start of the guide 7. In addition, mesh 13 is located further upstream in passageway 4 as an alternative and/or as an addition to mesh 11. Guide 7 of wall 3, serrations 9, and meshes 11 and 13 enhance and maximize the production of stream-wise vortices. These vortices cause a substantial increase in the ion flow, which overcomes boundary layers and results in additional deposition of copper onto the web 6.

Abstract: An electro-chemical deposition method and apparatus that encapsulates a substrate's edge to prevent deposition thereon is generally provided. In one embodiment, the apparatus includes a contact ring, one or more electrical contact pads disposed on the contact ring and a thrust plate axially movable relative to the contact ring. A first seal is disposed inward of the contact pad and seals with the contact ring. A second seal is coupled to the thrust plate. The first and second seals are adapted to sandwich the substrate therebetween when the contact ring and the thrust plate are moved towards each other. In another embodiment, a third seal provides a seal between the thrust plate and contact ring, and, with the first and second seals, defines an exclusion zone encapsulating the substrate's edge. One or more electrical contact pads are protected from the electrolyte by being disposed within the exclusion zone.

Abstract: A conductive polymer colloidal composition that selectively forms a coating on a non-conductive surface. The conductive polymer colloidal composition is composed of a polymer and a sulfonate dopant. The conductive polymer colloidal composition may also contain conductive colloidal particles such as conductive carbon or metal salt particles, oxidants, stabilizers, and preservatives. The conductive polymer colloidal composition may be employed to selectively coat the non-conductive parts of printed wiring boards such that a uniform metal layer can be deposited on the conductive polymer coat. In addition to a uniform metal layer being formed over the conductive polymer, adhesion between the metal layer and the printed wiring board is improved.

Abstract: A process for electroplating metallic features of different density on a surface of a substrate comprises providing an electroplating bath having an anode, immersing the substrate into the electroplating bath, spaced from the anode, the substrate comprising a cathode. Positioned in the electroplating bath between the substrate and the anode, and adjacent to and separated from the substrate surface is a second cathode that includes a wire mesh screening portion having openings of different sizes conforming to the metallic features to be electroplated. The second cathode screening portion has openings of larger size adjacent areas of higher density of features to be electroplated and openings of smaller size adjacent areas of lower density of features to be electroplated.

Abstract: A material includes a layer with a plurality of self-assembled structures comprising compositions. The structures are localized in separate islands covering a portion of the layer in an integrated assembly. In some embodiments, the compositions include nanoparticles. In particular, some embodiments pertain to a material with a self-assembled formation of inorganic particles with an average diameter less than about 100 nm. The structures can be used as devices within an integrated article. The method for producing the articles comprise a localization process defining boundaries of the devices and a self-assembly process within the identified boundaries.

Abstract: A process for electroplating metallic features of different density on a surface of a substrate comprises providing an electroplating bath having an anode, immersing the substrate into the electroplating bath, spaced from the anode, the substrate comprising a cathode. Positioned in the electroplating bath between the substrate and the anode, and adjacent to and separated from the substrate surface is a second cathode that includes a wire mesh screening portion having openings of different sizes conforming to the metallic features to be electroplated. The second cathode screening portion has openings of larger size adjacent areas of higher density of features to be electroplated and openings of smaller size adjacent areas of lower density of features to be electroplated.

Abstract: The present invention provides an MFM or MRFM analytical device comprising a micro-dimensional probe that is capable of detecting single proton and single electron spin. Furthermore, it provides an MFM or MRFM device comprising a micro-dimensional probe, that is capable of detecting magnetic structures of size of order one nanometer. In particular, the present invention provides a micro-dimensional probe for an MFM or MRFM device that comprises a CNT cantilever that comprises a nanoscale ferromagnetic material. The CNT cantilever can be attached to an electrode as a component of a microscopic probe which is coupled with an electrical circuit as a component of a device for nanoscale MFM or MRFM micro-dimensional probes. The device comprising the probe and electrical circuit can be incorporated into an existing scanning probe microscope (SPM) apparatus having accommodation for electrical readout.

Abstract: A process for forming an interface (106) between a plated and a non-plated area (102, 104) on the surface of a plastic component (100) is disclosed. First, an anti-plating layer (110) is formed over the surface of the plastic component. Thereafter, a low-power laser beam (10) is used to remove a portion of the anti-plating layer and to form an interface between the plated area and the non-plated area. A seeding layer (120) is formed on the plated area so that the plated area is electrically conductive. Finally, a metallic layer (130) is electrically plated over the seeding layer. The metallic layer connects with the anti-plating layer via the interface. The cost of producing the anti-plating layer is low. Moreover, since the laser etching operation is able to produce a high-quality interface boundary between the plated and the non-plated area, yield of the process is improved.

Abstract: Embodiments of the present invention provide methods for enhancing void-free metallic filling of narrow openings by electrochemical deposition (ECD). The methods provide enhanced replenishment of plating inhibitor at the field, while depleting the inhibitor inside narrow openings. The resulting inhibitor gradients facilitate void-free ECD filling of narrow openings with large aspect ratios. The inventive methods utilize vigorous electrolyte agitation at the field and top corners of the openings, while maintaining a relatively stagnant electrolyte inside the openings. Vigorous agitation is produced, for example, by high pressure jets flow and/or by mechanical means, such as brush (or pad, or wiper blade) wiping, or by a combination of jets and wiping brushes.

Abstract: An inexpensive process for depositing an electrically conductive material on selected surfaces of a dielectric substrate may be advantageously employed in the manufacture of printed wiring boards having high quality, high density, fine-line circuitry, thereby allowing miniaturization of electronic components and/or increased interconnect capacity. The process may also be used for providing conductive pathways between opposite sides of a dielectric substrate and in decorative metallization applications.

Abstract: The invention is related to a method of plating of a metal layer on a substrate. The method is particularly preferred for the formation of metallization structures for integrated circuits.

Abstract: The present invention relates to methods and apparatus for plating a conductive material on a substrate surface in a highly desirable manner. The invention removes at least one additive adsorbed on the top portion of the workpiece more than at least one additive disposed on a cavity portion, using an indirect external influence, thereby allowing plating of the conductive material take place before the additive fully re-adsorbs onto the top portion, thus causing greater plating of the cavity portion relative to the top portion.

Abstract: A method of forming an oxide free copper interconnect, comprising the following steps. A substrate is provided and a patterned dielectric layer is formed over the substrate. The patterned dielectric layer having an opening exposing a portion of the substrate. The opening having exposed sidewalls. A copper seed layer is formed over the sidewalls of the opening. The copper seed layer is subjected to an electrochemical technique to eliminate any copper oxide formed over the copper seed layer. A bulk copper layer is electrochemically plated over the copper-oxide-free copper seed layer, filling the opening and forming the oxide-free copper interconnect.

Abstract: Method of synthesis of confined colloidal crystals using electrodeposition. The present invention provides a method of growing confined colloidal crystal structures using electrodeposition of monodispersed charged colloid spheres onto a substrate patterned with an array of electroconductive surface relief features on a surface of a substrate. In this approach, control over large-scale ordering is achieved via a planar pattern whose scale is on the order of tens of microns, a regime readily accessed through coarse lithography, laser micromachining, and holography.

Abstract: The invention provides for a back-end metallisation process in which a recess is filled with copper and which includes the step of forming a plating base on the surfaces of the recess for the subsequent galvanic deposition of the said copper, and wherein subsequent to the formation of the plating base, but prior to the galvanic deposition of the copper, a modifying agent is introduced to the recess and which serves to absorb in the surface regions not covered by the plating base and to thereby modify the surface to promote copper growth thereon so as to effectively repair the initial plating base before the copper plating fill commences.

Abstract: A method of electrochemically filling features on a wafer surface to form a substantially planar copper layer is provided. The features to be filled includes a first feature that is an unfilled feature with the smallest width and a second feature having the next larger width after the smallest feature. The first and the second features are less than 10 micrometers in width. The method comprises applying a first cathodic current to form a first copper layer on the wafer surface. The first copper layer has a planar portion over a first feature and a non-planar portion over a second feature. After a surface of the first copper layer is treated by applying a first pulsed current, a second cathodic current is applied to form a second copper layer on the first copper layer. The second copper layer has a planar portion over both the first and second features.

Abstract: A method and a device for developing an electrochemical measuring system, in particular a sensor, is provided. A plurality of different electrode materials are applied to at least one substrate and introduced into a medium together with at least one reference electrode. Subsequently, the electrochemical potentials of the individual electrode materials in relation to the reference electrode are determined.

Abstract: Electrolytic copper plating methods are provided, wherein copper is electrolytically deposited on a substrate, and the electrolytic copper plating solution supplied to the electrolytic copper plating is subjected to dummy electrolysis using an insoluble anode. The method described above can maintain and restore the electrolytic copper plating solution so as to maintain satisfactory appearance of plated copper, fineness of deposited copper film, and via-filling.

Abstract: The present invention provides an electrolytic processing apparatus which is capable of increasing the in-plane uniformity of the film thickness of a plated film by making more uniform an electric field distribution over the entire surface to be processed of a substrate even if the substrate has a large area and controlling more uniformly the speed, over the entire surface to be processed of the substrate.

Abstract: A method for plating tin or a tin alloy on a substrate such that whiskers are prevented form forming or the number of whickers is reduced in number as well as size.

Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.

Abstract: The interior of cavities and through-holes in electrically conductive substrates having high-aspect ratios of 8:1 or greater can be electroplated with a uniform layer of metal on their interior surfaces by using a pulse reverse voltage waveform having a pulse train of long cathodic pulses followed by short anodic pulses even in the absence of conventional additives such as levelers and brighteners.

Abstract: An active part of a sensor is formed, for example, by micro-machined silicon wafers bearing electronic elements, electrical conductors, connection pads, and pins. The pads are electrically connected to the pin ends by conductive elements. Then the wafer and the pin ends are plunged into an electrolytic bath to make an electrolytic deposit of conductive metal on the pin ends, the pads, and the conductive elements that connect them. Finally, this metal is oxidized or nitrized to form an insulating coat on the pin ends, the pads, and the conductive elements that connect them. Such a sensor may find particular application as a sensor designed to work in harsh environments.

Abstract: An apparatus which can control thickness uniformity during deposition of conductive material from an electrolyte onto a surface of a semiconductor substrate is provided. The apparatus has an anode which can be contacted by the electrolyte during deposition of the conductive material, a cathode assembly including a carrier adapted to carry the substrate for movement during deposition, and a conductive element permitting electrolyte flow therethrough. A mask lies over the conductive element and has openings permitting electrolyte flow. The openings define active regions of the conductive element by which a rate of conductive material deposition onto the surface can be varied. A power source can provide a potential between the anode and the cathode assembly so as to produce the deposition. A deposition process is also disclosed, and uniform electroetching of conductive material on the semiconductor substrate surface can additionally be performed.

Abstract: A process produces a sulfonated solid particle by burning sulfur to yield gaseous sulfur dioxide, subjecting the gaseous sulfur dioxide to catalytic oxidation to yield gaseous sulfur trioxide, and sulfonating a dry powdery or granular solid particle with the gaseous sulfur trioxide in a gas phase-solid phase reaction.

Abstract: Method for making three-dimensional structures. A template is provided having at least two conductive regions separated by a non-conductive region. The template is disposed in an electrolyte in an electrodeposition cell and a voltage is established between one of the conductive regions and an electrode in the cell. Material is deposited on the one of the conductive regions connected to the voltage and subsequently bridges to the other conductive region with material deposition continuing on both of the at least two regions. The non conductive region may be a gap and the gap dimension is selected to regulate height differences between the at least two conductive regions.

Abstract: A method for forming bonding pads on a printed circuit board (PCB) with circuit patterns is provided. A plurality of copper patterns are formed on the PCB which are electrically connected to the circuit patterns, and a filler is filled between the copper patterns such that an upper surface of the copper pattern is exposed. A plating layer is then applied to the exposed upper surface of the copper patterns. Protrusion of the plating layer at a lower portion of a copper pattern is prevented, thus reducing an interval between the wire bonding pad(s) and potentially increasing the number of bonding pads which may be effectively formed on a given PCB.

Abstract: An apparatus for engaging a work piece during plating facilitates electrolyte flow during a plating operation. The apparatus helps to control the plating solution fluid dynamics and electric field shape to keep the wafer's local plating environment uniform and bubble free. The apparatus holding the work piece in a manner that facilitates electrolyte circulation patterns in which the electrolyte flows from the center of the work piece plating surface, outward toward the edge of the edge of the work piece. The apparatus holds the work piece near the work piece edges and provides a flow path for electrolyte to flow outward away from the edges of the work piece plating surface. That flow path has a “snorkel” shape in which the outlet is higher than the inlet. In addition, the flow path may have a slot shape that spans much or all of the circumference of holding apparatus. It may be made from a material that resists deformation and corrosion such as certain ceramics.

Abstract: An electrochemical processing method is provided for forming a current carrying device for semiconductor chip packaging and similar applications. The method comprises selecting sections of a substrate to carry current wherein a selected section is at least partly covered with a voltage switchable dielectric material, rendering the voltage switchable dielectric material conductive, and electrochemically forming a current carrying material directly on the voltage switchable dielectric material. The voltage switchable dielectric material can have a characteristic voltage, such that when a voltage having a magnitude exceeding the characteristic voltage is applied to the voltage switchable dielectric material, the voltage switchable dielectric material switches from a dielectric material to a conductive material. When conductive, the voltage switchable dielectric material is amenable to electrochemical processing such as electroplating.

Abstract: A method of forming microstructures. An article including a metal atom precursor is disproportionally exposed to electromagnetic radiation in an amount and intensity sufficient to convert some of the precursor to elemental metal. Additional conductive material may then be deposited onto the elemental metal to produce a microstructure.

Abstract: Treatment of substrates, formation of structures, and formation of multilayer structures using contact masks are disclosed where a non-parallel or non-simultaneous mating of various mask contact surfaces to a substrate surface occurs. Some embodiments involve bringing a relative planar mask contact surface and a relative planar substrate surface together at a small angle (but larger than an alignment tolerance associated with the system). Some embodiments involve flexing a mask to make it non-planar and bringing it into contact with a substrate such that progressively more contact between the mask and substrate occur until complete mating is achieved. Some embodiments involve use of gas or liquid pressure to bow a flexible or semi-flexible mask and use a linear actuator to bring the mating surfaces together and to bring the mask into a more planar configuration.

Abstract: Electroplating methods using an electroplating bath containing metal ions and a suppressor additive, an accelerator additive, and a leveler additive, together with controlling the current density applied to a substrate, avoid defects in plated films on substrates having features with a range of aspect ratios, while providing good filling and thickness distribution. The methods include, in succession, applying DC cathodic current densities optimized to form a conformal thin film on a seed layer, to provide bottom-up filling, preferentially on features having the largest aspect ratios, and to provide conformal plating of all features and adjacent field regions. Including a leveling agent in the electroplating bath produces films with better quality after subsequent processing.

Abstract: A method is disclosed for the manufacture of colloidal rod particles as nanobarcodes. Template membranes for the deposition of materials are prepared using photolithographic techniques.

Abstract: Semiconductor materials having a porous texture are modified with a recognition element and produce a photoluminescent response on exposure to electromagnetic radiation. The recognition elements, which can be selected from biomolecular, organic and inorganic moieties, interact with a target analyte to produce a modulated photoluminescent response, as compared with that of semiconductor materials modified with a recognition element only.

Abstract: Synthetic methods for the manufacture of segmented nanoparticles are described.

Abstract: The present invention provides a plating method and apparatus, which is capable of introducing plating solution into the fine channels and holes formed in a substrate without needing to add a surface active agent to the plating solution, and capable of forming a high-quality plating film having no defects or omissions. The plating method for performing electrolytic or electroless plating of an object using a plating solution comprises: conducting a plating operation after or while deaerating dissolved gas in the plating solution; and/or conducting a preprocessing operation using a preprocessing solution after or while deaerating dissolved gas in the preprocessing solution and subsequently conducting the plating operation.

Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers onto a semiconductor workpieces, and is of particular advantage in connection with plating copper onto semiconductor materials. The workpiece holder includes electrodes which have a contact face which bears against the workpiece and conducts current therebetween. The contact face is provided with a contact face outer contacting surface which is made from a contact face material similar similar to the workpiece plating material which is to be plated onto the semiconductor workpiece. The contact face can be formed by pre-conditioned an electrode contact using a plating metal which is similar to the plating materials which is to be plated onto the semiconductor workpiece.

Abstract: A copper electroplating bath and a method to plate substrates with the bath are provided. The bath and method are particularly effective to plate electronic components such as semiconductive wafer VLSI and ULSI interconnects with void-free fill copper plating for circuitry forming vias and trenches and other small features less than 0.2 microns with high aspect ratios. The copper bath contains a bath soluble organic divalent sulfur compound, and a bath soluble polyether compound such as a block copolymer of polyoxyethylene and polyoxypropylene, a polyoxyethylene or polyoxypropylene derivative of a polyhydric alcohol and a mixed polyoxyethylene and polyoxypropylene derivative of a polyhydric alcohol. A preferred polyether compound is a mixed polyoxyethylene and polyoxypropylene derivative of glycerine. A preferred copper bath also contains a pyridine compound derivative.

Abstract: Embodiments of the invention generally include a method and intermediate plating solution for plating metal onto a substrate surface. The method generally includes filling the features and/or growing a film layer on the field areas by plating a metal from a first solution on a seed layer under an applied first current, wherein the first solution includes an acid in an amount sufficient to provide a first solution pH of about 6 or less, copper ions, and at least one suppressor. The method may further include substantially filling features by plating metal ions from a second solution onto the substrate under an applied second current to form a metal layer, wherein the second solution includes an acid in an amount sufficient to provide a second solution pH of from about 0.

Abstract: A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating cooper. The vertical spiral inductor is formed defined by next depositing a pattern of top metal (e.g. Copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core made be made from a preamble or non-premable material.

Abstract: An electronic device manufacturing method comprises forming an insulating film above a substrate, forming a to-be-filled region which includes at least one of an interconnection groove and a hole in the insulating film, forming a first conductive film containing a catalyst metal which accelerates electroless plating, so as to line an internal surface of the to-be-filled region, forming a second conductive film on the first conductive film by the electroless plating, so as to line the internal surface of the to-be-filled region via the first conductive film, and forming a third conductive film on the second conductive film by electroplating, so as to fill the to-be-filled region via the first conductive film and the second conductive film.

Abstract: A via filling method that provides superior filling properties and superior planarization of the deposited metal layer is provided. This is achieved by a method having a F/R ratio, the ratio of the electric current densities between the forward electrolysis and the reverse electrolysis, is in the range of 1/1 to 1/10 in a PPR electric current method applied with a cycle wherein the forward electrolysis interval is from 1 to 50 msec and the reverse electrolysis interval is from 0.2 to 5 msec.

Abstract: The invention presents methods and systems for plating conductive patterns which at least result in a high uniformity and avoid parasitical plating effects. A plating system is disclosed for plating conductive patterns formed at a first surface of a substrate. The system is such that exposure surfaces not to be plated is inhibited. A first electrode of the system is immersed in the plating solution while the second electrode is in contact with another than the first surface of the substrate. The conductive patterns to be plated are temporarily electrically connected with the second electrode.

Abstract: The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative movement between the workpiece and the workpiece-surface-influencing device is established so that an additive in the electrolyte solution disposed on the workpiece and which is adsorbed onto the top surface is removed or otherwise its amount or concentration changed with respect to the additive on the cavity surface of the workpiece. Plating of the conductive material can place prior to, during and after usage of the workpiece-surface-influencing device, particularly after the workpiece surface influencing device no longer contacts any portion of the top surface of the workpiece, to achieve desirable semiconductor structures.