Using Plasma Patents (Class 216/67)
  • Patent number: 8895452
    Abstract: A semiconductor substrate support for use in a plasma processing apparatus comprises a chuck body having a plenum and three radially extending bores extending between the plenum and an outer periphery of the chuck body, wherein the chuck body is sized to support a semiconductor substrate having a diameter of at least 450 mm. The semiconductor substrate support further comprises three tubular support arms which include a first section extending radially outward from the outer periphery of the chuck body, and a second section extending vertically from the first section. The tubular support arms provide a passage therethrough which communicates with a respective bore in the chuck body. The second section of each tubular support arm is configured to engage with a respective actuation mechanism outside the chamber operable to effect vertical translation and planarization of the chuck body in the interior of a plasma processing chamber.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: November 25, 2014
    Assignee: Lam Research Corporation
    Inventors: Jerrel Kent Antolik, Yen-kun Victor Wang, John Holland
  • Patent number: 8895444
    Abstract: An approach for polishing-based hard mask removal during FinFET device formation is provided. In a typical embodiment, an initial device will be provided with a set of fins (e.g., silicon (Si)), a set of fin caps (e.g., silicon nitride (SiN)), and an oxide layer. A post-oxide planarizing and thinning polishing will first be performed (e.g., using a Silica-based slurry) to thin/reduce the oxide layer. A stop-on-nitride polishing will then be performed (e.g., using a Ceria-based slurry) to reduce the oxide layer to a top surface of the fin caps. Still yet, a stop-on-silicon polishing will be performed (e.g., using a Ceria-based slurry) to remove the set of fin caps and to reduce the oxide layer to a top surface to the set of fins.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: November 25, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventor: Michael D. Wedlake
  • Patent number: 8894870
    Abstract: A system and method for etching a material, including a compound having a formulation of XYZ, wherein X and Y are one or more metals and Z is selected from one or more Group 13-16 elements, such as carbon, nitrogen, boron, silicon, sulfur, selenium, and tellurium, are disclosed. The method includes a first etch process to form one or more first volatile compounds and a metal-depleted layer and a second etch process to remove at least a portion of the metal-depleted layer.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: November 25, 2014
    Assignee: ASM IP Holding B.V.
    Inventors: Jereld Lee Winkler, Eric James Shero, Fred Alokozai
  • Patent number: 8889025
    Abstract: This disclosure relates to a method for manufacturing a semiconductor device. The method includes etching a metal film on a semiconductor substrate with an etching composition; and rinsing the etched metal film with a rinse solvent. The etching composition includes at least one acid; at least one compound containing a halide anion, the halide anion being chloride or bromide; at least one compound containing a nitrate or nitrosyl ion; and water.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: November 18, 2014
    Assignees: Fujifilm Electronic Materials U.S.A., Inc., FujiFilm Corporation
    Inventors: Tomonori Takahashi, Tadashi Inaba, Atsushi Mizutani, Bing Du, William A. Wojtczak, Kazutaka Takahashi, Tetsuya Kamimura
  • Publication number: 20140332497
    Abstract: The plasma processing apparatus is provided with a plasma source 13 which generates plasma inside a chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position and a second position. The second position does not allow the cover 31 to make contact with the holding sheet 6, the frame 7 and a substrate 2. The cover 31 includes at least a ceiling surface 36b which extends in parallel to the upper face of the frame 7 and an inclined surface 36c which is inclined to gradually come close to the upper face of the holding sheet 6 exposed at the inner diameter side of the frame 7.
    Type: Application
    Filed: April 23, 2014
    Publication date: November 13, 2014
    Applicant: Panasonic Corporation
    Inventors: Nobuhiro NISHIZAKI, Atsushi HARIKAI, Tetsuhiro IWAI, Mitsuru HIROSHIMA
  • Publication number: 20140332498
    Abstract: Provided are a substrate holder, a substrate supporting apparatus, a substrate processing apparatus, and a substrate processing method. Particularly, there are provided a substrate holder, a substrate supporting apparatus, a substrate processing apparatus, and a substrate processing method that are adapted to improve process efficiency and etch uniformity at the back surface of a substrate.
    Type: Application
    Filed: July 21, 2014
    Publication date: November 13, 2014
    Inventors: Young Ki HAN, Young Soo SEO, Hyoung Won KIM, Chi Kug YOON, Sang Hoon LEE
  • Publication number: 20140332462
    Abstract: Hierarchical porous membranes suitable for use in oil/water separation processes are provided. The membranes described herein are particularly well suited for separating trace amounts of water (e.g., no greater than 3 wt % water content, no greater than 1 wt % water content, or 50-1000 ppm water) from oil in droplets less than 1 um in size. The membranes have a wide range of applications, including deep seep oil exploration, oil purification, and oil spill cleanup.
    Type: Application
    Filed: June 12, 2014
    Publication date: November 13, 2014
    Inventors: Brian Richmond Solomon, Kripa K. Varanasi, Md. Nasim Hyder
  • Patent number: 8884526
    Abstract: In some embodiments, the present disclosure relates to a plasma processing system that generates a magnetic field having a maximum strength that is independent of workpiece size. The plasma processing system has a plurality of side electromagnets that have a size which is independent of the workpiece size. The side electromagnets are located around a perimeter of a processing chamber configured to house a semiconductor workpiece. When a current is provided to the side electromagnets, separate magnetic fields emanate from separate positions around the workpiece. The separate magnetic fields contribute to the formation of an overall magnetic field that controls the distribution of plasma within the processing chamber. Because the size of the plurality of separate side magnets is independent of the workpiece size, the plurality of side magnets can generate a magnetic field having a maximum field strength that is independent of workpiece size.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Hung Lin, Ming-Chih Tsai, Chia-Ho Chen, Chung-En Kao
  • Patent number: 8883023
    Abstract: A method for forming a pattern includes providing a composition to form a resist underlayer film on a surface of a substrate to be processed. The composition contains a calixarene based compound having a group represented by a following formula (i) bound to at least a part of an aromatic ring or at least a part of a heteroaromatic ring of the calixarene based compound. The resist underlayer film on the surface of the substrate is treated with heat or an acid. A resist pattern is formed on a surface of the resist underlayer film. The resist underlayer film and the substrate are etched using the resist pattern as a mask to form the pattern on the substrate. The dry-etched resist underlayer film is removed from the substrate with a basic solution.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: November 11, 2014
    Assignee: JSR Corporation
    Inventors: Goji Wakamatsu, Hayato Namai, Syun Aoki
  • Patent number: 8883024
    Abstract: The invention provide apparatus and methods for creating gate structures on a substrate in real-time using Vacuum Ultra-Violet (VUV) data and Electron Energy Distribution Function (EEDƒ) data and associated (VUV/EEDƒ)-related procedures in (VUV/EEDƒ) etch systems. The (VUV/EEDƒ)-related procedures can include multi-layer-multi-step processing sequences and (VUV/EEDƒ)-related models that can include Multi-Input/Multi-Output (MIMO) models.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: November 11, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Lee Chen, Jianping Zhao
  • Patent number: 8883025
    Abstract: A plasma processing apparatus includes a stock unit, a processing unit, and an alignment chamber. The stock unit supplies and collects a conveyable tray formed with a plurality of housing holes in each of which a wafer is housed. In the processing chamber, plasma processing is executed on the wafers housed in the tray supplied from the stock unit. The alignment chamber is provided with a rotating table on which the tray before being subjected to the plasma processing is set to perform positioning of the wafers on the rotating table. A housing state determination unit of a control device determines whether or not the wafer is misaligned with respect the housing hole of the tray based on a height detected by height detecting sensors.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: November 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Yasuhiro Onishi
  • Patent number: 8883027
    Abstract: A method for generating plasma for removing metal oxide from a substrate is provided. The method includes providing a powered electrode assembly, which includes a powered electrode, a dielectric layer, and a wire mesh disposed between the powered electrode and the dielectric layer. The method also includes providing a grounded electrode assembly disposed opposite the powered electrode assembly to form a cavity wherein the plasma is generated. The wire mesh is shielded from the plasma by the dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the metal oxide. The method further includes introducing at least one inert gas and at least one process gas into the cavity. The method yet also includes applying an rf field to the cavity using the powered electrode to generate the plasma from the inert and the process gas.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: November 11, 2014
    Assignee: Lam Research Corporation
    Inventors: Hyungsuk Alexander Yoon, William Thie, Yezdi Dordi, Andrew D. Bailey, III
  • Patent number: 8877082
    Abstract: Disclosed is a processing method which can achieve a high processing rate, and is capable of making a surface smooth. In order to achieve this an SiC substrate is arranged in a potassium hydroxide solution containing hydrogen peroxide, and ultraviolent radiation is irradiated on the surface of the SiC substrate. An SiO2 layer is formed on the surface of the SiC substrate due to the irradiation of ultraviolet radiation, and this SiO2 layer is chemically removed by means of the potassium hydroxide solution, and also removed by a synthetic quartz surface plate.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: November 4, 2014
    Assignee: National University Corporation Kumamoto University
    Inventors: Akihisa Kubota, Mutsumi Touge
  • Patent number: 8877301
    Abstract: An asymmetrically grounded susceptor used in a plasma processing chamber for chemical vapor deposition onto large rectangular panels supported on and grounded by the susceptor. A plurality of grounding straps are connected between the periphery of the susceptor to the grounded vacuum chamber to shorten the grounding paths for RF electrons. Flexible straps allow the susceptor to vertically move. The straps provide a conductance to ground which is asymmetric around the periphery. The straps may be evenly spaced but have different thicknesses or different shapes or be removed from available grounding point and hence provide different RF conductances. The asymmetry is selected to improve the deposition uniformity and other qualities of the PECVD deposited film.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Gaku Furuta, Soo Young Choi, Young-Jin Choi
  • Patent number: 8877646
    Abstract: A method of manufacturing a plurality of spacers in a film stack includes forming at least one electrically-conductive element having sidewalls on a substrate, depositing a plurality of passivation layers proximate to the substrate, and performing etching on one of the plurality of passivation layers to form a plurality of spacers substantially across from the sidewalls of the at least one electrically-conductive element.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: November 4, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Valerie J Marty, Galen P. Cook
  • Patent number: 8877650
    Abstract: Methods of manufacturing semiconductor devices and methods of optical proximity correction methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes determining an amount of reactive ion etch (RIE) lag of a RIE process for a material layer of the semiconductor device, and adjusting a size of at least one pattern for a feature of the material layer by an adjustment amount to partially compensate for the amount of RIE lag determined.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: November 4, 2014
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: O Seo Park, Wai-Kin Li
  • Patent number: 8877080
    Abstract: The invention provides an apparatus and methods for creating gate structures on a substrate in real-time using Vacuum Ultra-Violet (VUV) data and Electron Energy Distribution Function (EEDf) data and associated (VUV/EEDf)-related procedures in (VUV/EEDf) etch systems. The (VUV/EEDf)-related procedures can include multi-layer-multi-step processing sequences and (VUV/EEDf)-related models that can include Multi-Input/Multi-Output (MIMO) models.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: November 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Lee Chen, Jianping Zhao
  • Patent number: 8877000
    Abstract: A plasma-processing chamber including pulsed gas injection orifices/nozzles utilized in combination with continuous flow shower head injection orifices is described. The continuous flow shower head injection orifices introduce a continuous flow of gas while the pulsed gas injection orifices/nozzles cyclically inject a high-pressure gas into the chamber. In one embodiment, a central computer may monitor and control pressure measurement devices and utilize the measurements to adjust processing parameters (e.g. pulse duration, pulse repetition rate, and the pulse mass flow rate of processing gases).
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: November 4, 2014
    Assignee: Tokyo Electron Limited
    Inventor: Eric J. Strang
  • Publication number: 20140319098
    Abstract: A method for processing substrate in a processing chamber, which has at least one plasma generating source and a gas source for providing process gas into the chamber, is provided. The method includes exciting the plasma generating source with an RF signal having RF frequency. The method further includes pulsing the gas source, using at least a first gas pulsing frequency, such that a first process gas is flowed into the chamber during a first portion of a gas pulsing period and a second process gas is flowed into the chamber during a second portion of the gas pulsing period, which is associated with the first gas pulsing frequency. The second process gas has a lower reactant-gas-to-inert-gas ratio relative to a reactant-gas-to-inert-gas ratio of the first process gas. The second process gas is formed by removing at least a portion of a reactant gas flow from the first process gas.
    Type: Application
    Filed: July 9, 2014
    Publication date: October 30, 2014
    Inventor: Keren Jacobs Kanarik
  • Patent number: 8871105
    Abstract: A method is provided for etching silicon in a plasma processing chamber, having an operating pressure and an operating bias. The method includes: performing a first vertical etch in the silicon to create a hole having a first depth and a sidewall; performing a deposition of a protective layer on the sidewall; performing a second vertical etch to deepen the hole to a second depth and to create a second sidewall, the second sidewall including a first trough, a second trough and a peak, the first trough corresponding to the first sidewall, the second trough corresponding to the second sidewall, the peak being disposed between the first trough and the second trough; and performing a third etch to reduce the peak.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: October 28, 2014
    Assignee: Lam Research Corporation
    Inventors: Jaroslaw W. Winniczek, Frank Y. Lin, Alan J. Miller, Qing Xu, Seongjun Heo, Jin Hwan Ham, Sang Joon Yoon, Camelia Rusu
  • Patent number: 8869376
    Abstract: A substrate mounting table includes a plate shaped member provided with a mounting surface for mounting a substrate thereon, a plurality of gas injection openings opened on the mounting surface to supply a gas toward the mounting surface, and a gas supply channel for supplying the gas through the gas injection openings; and a thermally sprayed ceramic layer covering the mounting surface. At least inner wall portions of the gas supply channel are formed in curved surface shapes, the inner wall portions facing the gas injection openings.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 28, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Takehiro Ueda, Yoshiyuki Kobayashi, Kaoru Oohashi
  • Patent number: 8871107
    Abstract: A method of forming at least one metal or metal alloy feature in an integrated circuit is provided. In one embodiment, the method includes providing a material stack including at least an etch mask located on a blanker layer of metal or metal alloy. Exposed portions of the blanket layer of metal or metal alloy that are not protected by the etch mask are removed utilizing an etch comprising a plasma that forms a polymeric compound and/or complex which protects a portion of the blanket layer of metal or metal alloy located directly beneath the etch mask during the etch.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 28, 2014
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. M. Fuller, Eric A. Joseph, Hiroyuki Miyazoe, Mark Hoinkis, Chun Yan
  • Patent number: 8871650
    Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: October 28, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Srinivas D. Nemani, Nicolas J. Bright, Thorsten B. Lill, Yifeng Zhou, Jamie Saephan, Ellie Yieh
  • Patent number: 8865012
    Abstract: Methods for processing a substrate are provided herein. In some embodiments, a method for processing a substrate may include placing a substrate atop a substrate support disposed beneath a processing volume of a process chamber having a grounded shield surrounding the process volume and a conductive cover ring selectably supportable by the grounded shield; positioning the substrate support in a first position such that the substrate support is not in contact with the conductive cover ring and such that a conductive member electrically coupled to the cover ring contacts the grounded shield to electrically couple the cover ring to the grounded shield; and performing a plasma enhanced etch process on the substrate.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 21, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Zhenbin Ge, Alan A. Ritchie
  • Patent number: 8864959
    Abstract: Planetary carriers (22) for workpieces mounted on a carousel (19) are provided within a vacuum chamber. A source (24) for a cloud comprising ions (CL) is provided so that a central axis (ACL) of the cloud intercepts the rotary axis (A20) of the carousel (19). The cloud (CL) has an ion density profile at the moving path (T) of planetary axes (A22) which drops to 50% of the maximum ion density at a distance from the addressed center axis (ACL) which is at most half the diameter of the planetary carriers (22). When workpieces upon the planetary carriers (22) are etched by the cloud comprising ions material which is etched off is substantially not redeposited on neighboring planetary carriers but rather ejected towards the wall of the vacuum chamber.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: October 21, 2014
    Assignee: Oerlikon Trading AG, Truebbach
    Inventors: Siegfried Krassnitzer, Oliver Gstoehl, Markus Esselbach
  • Patent number: 8858816
    Abstract: A plasma processing tool is used to deposit material on a workpiece. For example, a method for conformal deposition of material is disclosed. In this embodiment, the plasma sheath shape is modified to allow material to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of different features can be deposited onto. In another embodiment, a plasma processing tool is used to etch a workpiece. In this embodiment, the plasma sheath shape is altered to allow ions to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of differently shaped features can be created.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: October 14, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Timothy Miller, George Papasouliotis, Vikram Singh
  • Patent number: 8858819
    Abstract: The titled method affords low dishing levels in the polished substrate while simultaneously affording high metal removal rates. The method utilizes an associated polishing composition. Components in the composition include a poly(alkyleneimine) such as polyethyleneimine, an abrasive, an acid, and an oxidizing agent, such as a per-compound.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: October 14, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Rachel Dianne McConnell, Ann Marie Hurst, Xiaobo Shi
  • Patent number: 8859434
    Abstract: The present invention relates to an etching method of capable of etching a silicon carbide substrate with a higher accuracy. A first etching step in which a silicon carbide substrate K is heated to a temperature equal to or higher than 200 ° C, SF6 gas is supplied into a processing chamber and plasma is generated from the SF6 gas, and a bias potential is applied to a platen, thereby isotropically etching the silicon carbide substrate K, and a second etching step in which the silicon carbide substrate K is heated to a temperature equal to or higher than 200 ° C., SF6 gas and O2 gas are supplied into the processing chamber and plasma is generated from the SF6 gas and the O2 gas, and a bias potential is applied to the platen on which the silicon carbide substrate K is placed, thereby etching the silicon carbide substrate K while forming a silicon oxide film as passivation film on the silicon carbide substrate K are alternately repeated.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: October 14, 2014
    Assignee: SPP Technologies Co., Ltd.
    Inventors: Akimitsu Oishi, Shoichi Murakami
  • Patent number: 8858809
    Abstract: A manufacturing method of a magnetic recording medium includes steps of forming a magnetic recording layer, a first mask layer, a second mask layer containing silicon as primary component, a strip layer, a third mask layer, and a resist layer, a step of patterning the resist layer to provide a pattern, steps of transferring the pattern to the third mask layer, to the strip layer, and to the second mask layer, a step of removing the strip layer by wet etching and of stripping the third mask layer and the resist layer above the magnetic recording layer, steps of transferring the pattern to the first mask layer and to the magnetic recording layer, and a step of stripping the first mask layer remaining on the magnetic recording layer.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Watanabe, Kaori Kimura, Kazutaka Takizawa, Takeshi Iwasaki, Tsuyoshi Onitsuka, Akihiko Takeo
  • Patent number: 8858812
    Abstract: Provided is a processing method for an ink jet head substrate, including: forming a barrier layer on a substrate and forming a seed layer on the barrier layer; forming a resist film on the seed layer and patterning the resist film so that the patterned resist film corresponds to a pad portion for electrically connecting an ink jet head to an outside of the ink jet head; forming the pad portion in an opening of the patterned resist film; removing the resist film; subjecting the substrate to anisotropic etching to form an ink supply port; removing the barrier layer and the seed layer; and performing laser processing from a surface of the substrate.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: October 14, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenta Furusawa, Keiji Matsumoto, Keisuke Kishimoto, Kazuhiro Asai, Shuji Koyama
  • Patent number: 8858811
    Abstract: A method for manufacturing a device comprising an elastic member on a substrate includes steps of: forming a sacrificial layer by forming a plurality of sacrificial sub-layers on the substrate; forming a plate member in or on the sacrificial layers connected to the substrate and substantially parallel to a top surface of the substrate; and removing the sacrificial sub-layers after forming the plate member by removing the sacrificial sub-layers in an order different from the reverse order of forming the sacrificial sub-layers.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: October 14, 2014
    Inventors: Yoshihiro Maeda, Fusao Ishii, Kazuhiro Watanabe, Hirotoshi Ichikawa
  • Patent number: 8853081
    Abstract: Provided are methods for processing semiconductor substrates to remove high-dose ion implanted (HDI) photoresist structures without damaging other structures made of titanium nitride, tantalum nitride, hafnium oxide, and/or hafnium silicon oxide. The removal is performed using a mixture of an organic solvent, an oxidant, a metal-based catalyst, and one of a base or an acid. Some examples of suitable organic solvents include dimethyl sulfoxide, n-ethyl pyrrolidone, monomethyl ether, and ethyl lactate. Transition metals in their zero-oxidation state, such as metallic iron or metallic chromium, may be used as catalysts in this mixture. In some embodiments, a mixture includes ethyl lactate, of tetra-methyl ammonium hydroxide, and less than 1% by weight of the metal-based catalyst. The etching rate of the HDI photoresist may be at least about 100 Angstroms per minute, while other structures may remain substantially intact.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: October 7, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Anh Duong, Olov Karlsson, Sven Metzger
  • Publication number: 20140291289
    Abstract: A method of etching a low-k material which is capable of decreasing a damage of the low-k material is provided. In the method, the low-k material is etched with a plasma of a mixture gas including NF3 gas and Cl2 gas. Utilization of the mixture gas enables to decrease a damage of the low-k material, enhance an etch rate and selectivity of the low-k material, and reduce the bottom surface roughness and water absorption of the low-k material.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 2, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Frederic LAZZARINO, Shigeru TAHARA, Mikhail KRISHTAB, Mikhail BAKLANOV
  • Patent number: 8846539
    Abstract: A plasma processing apparatus includes a heater in thermal contact with a showerhead electrode, and a temperature controlled top plate in thermal contact with the heater to maintain a desired temperature of the showerhead electrode during semiconductor substrate processing. A gas distribution member supplies a process gas and radio frequency (RF) power to the showerhead electrode.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: September 30, 2014
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Eric Lenz
  • Patent number: 8845915
    Abstract: A polishing agent which comprises a composition containing an inorganic acid, an amino acid, a protective film-forming agent, an abrasive, an oxidizing agent, an organic acid and water, adjusted to a pH of 1.5-4, wherein the amount of potassium hydroxide required to raise the pH of the composition without the organic acid to 4 is at least 0.10 mol with respect to 1 kg of the composition without the organic acid, and the organic acid contains at least two carboxyl groups, wherein the logarithm of the inverse of the first acid dissociation constant (pKa1) is no greater than 3.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 30, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Hiroshi Ono, Takashi Shinoda, Yuuhei Okada
  • Publication number: 20140284308
    Abstract: There are provided a plasma etching method and a plasma etching apparatus, capable of suppressing occurrence of local bias in etching rate and suppressing occurrence of charge-up damage. The plasma etching method of etching a silicon layer of a substrate to be processed using the plasma etching apparatus sets the pressure in a processing chamber to 13.3 Pa or more and applies, to a lower electrode, a first high-frequency power with a first frequency and a second high-frequency power with a second frequency that is lower than the first frequency and is a frequency of 1 MHz or lower.
    Type: Application
    Filed: March 19, 2014
    Publication date: September 25, 2014
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOKYO ELECTRON LIMITED
    Inventors: Shoichiro MATSUYAMA, Akitaka SHIMIZU, Susumu NOGAMI, Kiyohito ITO, Tokuhisa OHIWA, Katsunori YAHASHI
  • Publication number: 20140287266
    Abstract: According to exemplary embodiments, a pattern forming method includes: forming a diblock copolymer coating film by applying coating liquid containing a diblock copolymer including a chain of a first polymer and a chain of a second polymer which is not compatible with the first polymer, and a homopolymer having affinity with the first polymer, on a substrate, and drying the liquid; and performing phase separation of the first polymer and the second polymer by providing a coating film for solvent annealing using a solvent having compatibility with the second polymer.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira WATANABE, Kazutaka TAKIZAWA, Kaori KIMURA
  • Publication number: 20140287019
    Abstract: An implantable delivery device and method for utilizing the device to delivery a bioactive agent to a subject in need thereof is described. The device includes a pattern of structures fabricated on a surface of the device to form a nanotopography. A random or non-random pattern of structures may be fabricated such as a complex pattern including structures of differing sizes and/or shapes. The device may be located adjacent tissue such as an endovascular implant or a perivascular implant, and may deliver the bioactive agent without triggering an immune or foreign body response to the bioactive agent.
    Type: Application
    Filed: October 16, 2012
    Publication date: September 25, 2014
    Applicant: Kimberly-Clark Worldwide, Inc.
    Inventors: Jeremy Ollerenshaw, Emily Reichart, Russell F. Ross
  • Publication number: 20140263182
    Abstract: A method of selectively activating a chemical process using a DC pulse etcher. A processing chamber includes a substrate therein for chemical processing. The method includes coupling energy into a process gas within the processing chamber so as to produce a plasma containing positive ions. A pulsed DC bias is applied to the substrate, which is positioned on a substrate support within the processing chamber. Periodically, the substrate is biased between first and second bias levels, wherein the first bias level is more negative than the second bias level. When the substrate is biased to the first bias level, mono-energetic positive ions are attracted from plasma toward the substrate, the mono-energetic positive ions being selective so as to enhance a selected chemical etch process.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Lee Chen, Radha Sundararajan
  • Publication number: 20140251953
    Abstract: A system and method for providing intermediate reactive species from a remote plasma unit to a reaction chamber are disclosed. The system includes a pressure control device to control a pressure at the remote plasma unit as intermediate reactive species from the remote plasma unit are provided to the reaction chamber.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: ASM IP Holding B.V.
    Inventor: Jereld Lee Winkler
  • Publication number: 20140251954
    Abstract: A system and method for providing pulsed excited species from a remote plasma unit to a reaction chamber are disclosed. The system includes a pressure control device to control a pressure at the remote plasma unit as reactive species from the remote plasma unit are pulsed to the reaction chamber.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: ASM IP Holding B.V.
    Inventor: Jereld Lee Winkler
  • Patent number: 8828257
    Abstract: In a plasma processing apparatus including a processing chamber in a vacuum container to form plasma in the processing chamber in which pressure is reduced, a sample stage in lower part of inside of the processing chamber and having an upper surface on which a wafer to be processed by plasma is put, a plurality of pins in the sample stage to be moved in vertical direction so that the pins abut against rear side of the wafer to move the wafer up and down over the upper surface of the sample stage, and a plurality of openings formed in the upper surface of the sample stage so that the pins are moved in the openings, gas is fed from supply ports communicating with the openings into the processing chamber through the openings when the wafer is not put on the upper surface of the sample stage.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 9, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroho Kitada, Kazunori Nakamoto, Yosuke Sakai
  • Patent number: 8828259
    Abstract: A method for automatically performing power matching using a mechanical RF match during substrate processing is provided. The method includes providing a plurality of parameters for the substrate processing wherein the plurality of parameters including at least a predefined number of learning cycles. The method also includes setting the mechanical RF match to operate in a mechanical tuning mode. The method further includes providing a first set of instructions to the substrate processing to ignore a predefined number of cycles of Rapid Alternating Process RAP steps. The method yet also includes operating the mechanical RF match in the mechanical tuning mode for the predefined number of learning cycles. The method yet further includes determining a set of optimal capacitor values. The method moreover includes providing a second set of instructions to a power generator to operate in a frequency tuning mode.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: September 9, 2014
    Assignee: Lam Research Corporation
    Inventor: Arthur H. Sato
  • Patent number: 8828256
    Abstract: A method for making a carbon nanotube film includes the steps of providing an array of carbon nanotubes, treating the array of carbon nanotubes by plasma, and pulling out a carbon nanotube film from the array of carbon nanotubes treated by the plasma.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: September 9, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Chen Feng, Kai Liu, Yong-Chao Zhai, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 8828881
    Abstract: The invention discloses an etch-back method for planarization at the position-near-interface of an interlayer dielectric (ILD), comprising: depositing or growing a thick layer of SiO2 by the chemical vapor deposition or oxidation method on a surface of a wafer; spin-coating a layer of SOG and then performing a heat treatment to obtain a relatively uniform stack structure; perform an etch-back on the SOG using a plasma etching, and stopping when approaching the position-near-interface of SiO2; performing a plasma etch-back on the remaining SOG/SiO2 structure at the position-near-interface until achieving a desired thickness. Since a two-step etching at the position-near-interface is employed, an extremely good smooth surface of the ILD is obtained. That is, a planar and tidy surface of the ILD is obtained not only in the center region, but also even at the edge of the wafer.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: September 9, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Lingkkuan Meng, Huaxiang Yin
  • Patent number: 8828252
    Abstract: A silsesquioxane resin is applied on top of the patterned photo-resist and cured to produce a cured silsesquioxane resin on top of the pattern surface. Subsequently, an aqueous base stripper or a reactive ion etch recipe containing CF4 is used to “etch back” the silicon resin to the top of the photoresist material, exposing the entire top surface of the photoresist. Then, a second reactive ion etch recipe containing O2 to etch away the photoresist. The result is a silicon resin film with via holes with the size and shape of the post that were patterned into the photoresist. Optionally, the new pattern can be transferred into the underlying layer(s).
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: September 9, 2014
    Assignee: Dow Corning Corporation
    Inventors: Michael L. Bradford, Eric Scott Moyer, Kasumi Takeuchi, Sheng Wang, Craig Rollin Yeakle
  • Patent number: 8828883
    Abstract: Apparatuses and methods for processing substrates are disclosed. A processing apparatus includes a chamber for generating a plasma therein, an electrode associated with the chamber, and a signal generator coupled to the electrode. The signal generator applies a DC pulse to the electrode with sufficient amplitude and sufficient duty cycle of an on-time and an off-time to cause events within the chamber. A plasma is generated from a gas in the chamber responsive to the amplitude of the DC pulse. Energetic ions are generated by accelerating ions of the plasma toward a substrate in the chamber in response to the amplitude of the DC pulse during the on-time. Some of the energetic ions are neutralized to energetic neutrals in response to the DC pulse during the off-time. Some of the energetic neutrals impact the substrate with sufficient energy to cause a chemical reaction on the substrate.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: September 9, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Neal R. Rueger
  • Patent number: 8828254
    Abstract: A plasma processing method and a plasma processing apparatus in which a stable process region can be ensured in a wide range, from low microwave power to high microwave power. The plasma processing method includes making production of plasma easy in a region in which production of plasma by continuous discharge is difficult, and plasma-processing an object to be processed, with the generated plasma, wherein the plasma is produced by pulsed discharge in which ON and OFF are repeated, radio-frequency power for producing the pulsed discharge, during an ON period, is a power to facilitate production of plasma by continuous discharge, and a duty ratio of the pulsed discharge is controlled so that an average power of the radio-frequency power per cycle is power in the region in which production of plasma by continuous discharge is difficult.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: September 9, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yoshiharu Inoue, Tetsuo Ono, Michikazu Morimoto, Masaki Fujii, Masakazu Miyaji
  • Patent number: 8821744
    Abstract: A substrate processing method using a substrate processing apparatus includes a first step and a second step. The first step is to apply a negative voltage pulse from a pulsed power supply to be included in the apparatus. The second step is to apply floating potential for an interval of time between the negative voltage pulse and a positive voltage pulse from the pulsed power supply subsequent to the negative voltage pulse. In addition, the apparatus includes a chamber, a first electrode, a second electrode, an RF power supply, and the pulsed power supply. The second electrode is provided so that the second electrode faces the first electrode to hold a substrate. The RF power supply applies an RF voltage having a frequency of 50 MHz or higher to the second electrode. The pulsed power supply repeatedly applies a voltage waveform with the RF voltage to the second electrode.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Ui, Hisataka Hayashi
  • Patent number: 8821743
    Abstract: The disclosure relates to a method for making a grating. The method includes the following steps. First, a substrate is provided. Second, a patterned mask layer is formed on a surface of the substrate. Third, the substrate with the patterned mask layer is placed in a microwave plasma system. Fourth, a plurality of etching gases are guided into the microwave plasma system simultaneously to etch the substrate through three stages. The etching gas includes carbon tetrafluoride (CF4), argon (Ar2), and sulfur hexafluoride (SF6). Finally, the patterned mask layer is removed.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: September 2, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhen-Dong Zhu, Qun-Qing Li, Li-Hui Zhang, Mo Chen, Shou-Shan Fan