Light Responsive Or Combined With Light Responsive Device Patents (Class 257/290)
  • Publication number: 20140103409
    Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.
    Type: Application
    Filed: December 19, 2013
    Publication date: April 17, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya KAKEHATA, Hideto OHNUMA, Yoshiaki YAMAMOTO, Kenichiro MAKINO
  • Publication number: 20140103408
    Abstract: In a solid-state imaging device, N regions serving as photoelectric conversion diodes are formed on outer peripheries of P regions in upper portions of island-shaped semiconductors formed on a substrate, and P+ regions connected to a pixel selection line conductive layer are formed on top layer portions of upper ends of the island-shaped semiconductors so as to adjoin the N regions and the P regions. In the P+ regions, a first P+ region has a thickness less than a second P+ region, and the second P+ region has a thickness less than a third P+ region.
    Type: Application
    Filed: October 14, 2013
    Publication date: April 17, 2014
    Applicant: Unisantis Electronics Singapore Pte. Ltd.
    Inventors: Fujio MASUOKA, Nozomu HARADA
  • Patent number: 8692301
    Abstract: The present invention provides a photodiode comprising a p-i-n or pn junction at least partly formed by first and second regions (2) made of semiconductor materials having opposite conductivity type, wherein the p-i-n or pn junction comprises a light absorption region (11) for generation of charge carriers from absorbed light. One section of the p-i-n or pn junction is comprises by one or more nanowires (7) that are spaced apart and arranged to collect charge carriers generated in the light absorption region (11). At least one low doped region (10) made of a low doped or intrinsic semiconductor material provided between the nanowires (7) and one of said first region (1) and said second region (2) enables custom made light absorption region and/or avalanche multiplication region of the active region (9).
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: April 8, 2014
    Assignee: QuNano AB
    Inventors: Lars Samuelson, Federico Capasso, Jonas Ohlsson
  • Patent number: 8691615
    Abstract: An image sensor and a method of manufacturing the same. The image sensor includes a plurality of photoelectric conversion units that are horizontally arranged and selectively emit electric signals by absorbing color beams.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: April 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyu-sik Kim
  • Publication number: 20140091321
    Abstract: There is provided a semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.
    Type: Application
    Filed: September 4, 2013
    Publication date: April 3, 2014
    Applicant: Sony Corporation
    Inventor: Takashi Yokoyama
  • Publication number: 20140091374
    Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
  • Publication number: 20140091375
    Abstract: A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate and extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and two end cap hardmasks are between the gate dielectric and the gate electrode over the implant isolation region. The two end cap hardmasks include same dopants as those implanted into the active region.
    Type: Application
    Filed: October 1, 2012
    Publication date: April 3, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Wen-De Wang, Wen-I Hsu
  • Patent number: 8680639
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: March 25, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Publication number: 20140077282
    Abstract: A TFT flat sensor comprises pixel units each comprising: a common electrode and a common electrode insulating layer on a substrate, wherein a first via hole is provided in the common electrode insulating layer at a location corresponding to the common electrode; a gate electrode on the common electrode insulating layer; a first conductive film layer on the common electrode and the gate electrode wherein the first conductive film layer contacts the common electrode through a first via hole; a gate insulating layer, an active layer, a drain electrode and a source electrode, a second conductive film layer, a protection layer and a third conductive film layer on the first conductive film layer; a second via hole is provided in the protection layer at a location corresponding to the source electrode through which the third conductive film layer contacts the source electrode.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 20, 2014
    Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Shaoying XU, Zhenyu XIE, Xu CHEN
  • Patent number: 8674417
    Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Publication number: 20140070079
    Abstract: To provide a photodetector circuit capable of obtaining signals in different periods without being affected by characteristics of a photoelectric conversion element. The photodetector circuit has n signal output circuits (n is a natural number of 2 or more) connected to the photoelectric conversion element. Further, the n signal output circuits each include the following: a transistor whose gate potential varies in accordance with the amount of light entering the photoelectric conversion element; a first switching element which holds the gate potential of the transistor; and a second switching element which controls a signal output from the transistor. Thus, after data based on the amount of light entering the photoelectric conversion elements is held as the gate potentials of the transistors, the second switching elements are turned on, whereby signals in different periods can be obtained without being affected by characteristics of the photoelectric conversion element.
    Type: Application
    Filed: September 5, 2013
    Publication date: March 13, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshiyuki Kurokawa, Takuya Tsurume
  • Publication number: 20140070108
    Abstract: An apparatus for detecting an X-ray includes a photo diode having an anode electrode and a cathode electrode, a switching transistor, and a first storage capacitor that has one end connected to the cathode electrode and another end connected to the switching transistor.
    Type: Application
    Filed: July 10, 2013
    Publication date: March 13, 2014
    Inventor: Dong Hyuk KIM
  • Patent number: 8669598
    Abstract: A unit pixel of an image sensor and a photo detector are disclosed. The photo detector of the present invention configured to absorb light can include: a light-absorbing part configured to absorb light by being formed in a floated structure; an oxide film being in contact with one surface of the light-absorbing part; a source being in contact with one side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; a drain facing the source so as to be in contact with the other side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; and a channel interposed between the source and the drain and configured to form flow of an electric current between the source and the drain.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 11, 2014
    Inventor: Hoon Kim
  • Patent number: 8669552
    Abstract: The present invention generally relates to an offset electrode TFT and a method of its manufacture. The offset electrode TFT is a TFT in which one electrode, either the source or the drain, surrounds the other electrode. The gate electrode continues to be below both the source and the drain electrodes. By redesigning the TFT, less voltage is necessary to transfer the voltage from the source to the drain electrode as compared to traditional bottom gate TFTs or top gate TFTs. The offset electrode TFT structure is applicable not only to silicon based TFTs, but also to transparent TFTs that include metal oxides such as zinc oxide or IGZO and metal oxynitrides such as ZnON.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: March 11, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Yan Ye
  • Patent number: 8669599
    Abstract: A unit pixel of an image sensor and a photo detector are disclosed. The photo detector of the present invention configured to absorb light can include: a light-absorbing part configured to absorb light by being formed in a floated structure; an oxide film being in contact with one surface of the light-absorbing part; a source being in contact with one side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; a drain facing the source so as to be in contact with the other side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; and a channel interposed between the source and the drain and configured to form flow of an electric current between the source and the drain.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 11, 2014
    Inventor: Hoon Kim
  • Publication number: 20140061737
    Abstract: A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-I Hsu, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung, Tzu-Hsuan Hsu, Wen-De Wang
  • Publication number: 20140054661
    Abstract: An embodiment relates to a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.
    Type: Application
    Filed: October 31, 2013
    Publication date: February 27, 2014
    Applicant: Zena Technologies, Inc.
    Inventors: Young-June YU, Munib WOBER
  • Patent number: 8659061
    Abstract: In one embodiment, a solid-state image capturing element of an embodiment has: a semiconductor substrate; a photodiode formed on the semiconductor substrate; a capacitor formed on the semiconductor substrate and including a first electrode layer, an insulating layer, and a second electrode layer which are stacked in sequence; a transistor formed on the semiconductor substrate and including a floating gate and a control gate; and a first electrode portion electrically connecting the second electrode layer and an n-type diffusion layer or a p-type diffusion layer constituting the photodiode. Further, the first electrode layer of the capacitor is constituted by the floating gate of the transistor, and the second electrode layer of the capacitor and the control gate of the transistor are discontinuous.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakatsuka
  • Patent number: 8659109
    Abstract: An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: February 25, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: François Roy
  • Publication number: 20140043497
    Abstract: There is provided an apparatus including an image sensor of a back-illuminated type using a complementary metal oxide semiconductor (CMOS), including a light receiving unit, formed in a semiconductor substrate, which receives incident light, an anti-reflection film formed on a back-surface side of the semiconductor substrate in which the light receiving unit is formed, and a silicon oxide film, formed on a back-surface side of the anti-reflection film, which has a refractive index lower than a silicon nitride film and has a higher density in a back-surface side than in a front-surface side thereof.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 13, 2014
    Applicant: Sony Corporation
    Inventors: Takamasa Tanikuni, Shinpei Yamaguchi, Shuji Manda
  • Patent number: 8644759
    Abstract: Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: February 4, 2014
    Assignee: Oracle America, Inc.
    Inventors: Justin M. Schauer, Robert David Hopkins, Robert J. Drost
  • Publication number: 20140027826
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
  • Patent number: 8638382
    Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: January 28, 2014
    Assignee: Sony Corporation
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Publication number: 20140021518
    Abstract: A display device includes: a first substrate; a photo transistor on the first substrate; and a switching transistor connected to the photo transistor. The photo transistor includes a light blocking film on the first substrate, a first gate electrode on the light blocking film and in contact with the light blocking film, a first semiconductor layer on the first gate electrode and overlapping the light blocking film, and a first source electrode and a first drain electrode on the first semiconductor layer. The switching transistor includes a second gate electrode on the first substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are at a same layer of the display device, and each includes crystalline silicon germanium.
    Type: Application
    Filed: December 18, 2012
    Publication date: January 23, 2014
    Applicants: SAMSUNG DISPLAY CO., LTD., ULSAN COLLEGE INDUSTRY COOPERATION, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Sang Youn HAN, Cheol Kyu KIM, Jun Ho SONG, Sung Hoon YANG, Kyung Tea PARK, Seung Mi SEO, Suk Won JUNG, Do Young KIM, Sun Jo KIM, Hyung Jun KIM
  • Publication number: 20140015023
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 16, 2014
    Applicant: Soitec
    Inventors: Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure, Mohamad A. Shaheen
  • Patent number: 8629484
    Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor region of a second conductivity type which is formed on a face side of a semiconductor substrate; a photoelectric conversion element which has an impurity region of a first conductivity type and which is operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof; an electric-charge holding region which has an impurity region of the first conductivity type and in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out; an intermediate transfer path through which only the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined electric charge amount is transferred into the electric-charge holding region; and an impurity layer.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: January 14, 2014
    Assignee: Sony Corporation
    Inventors: Hiroyuki Ohri, Takashi Machida, Takahiro Kawamura, Yasunori Sogoh
  • Patent number: 8629441
    Abstract: The semiconductor device includes a driver circuit including a first thin film transistor and a pixel including a second thin film transistor over one substrate. The first thin film transistor includes a first gate electrode layer, a gate insulating layer, a first oxide semiconductor layer, a first oxide conductive layer, a second oxide conductive layer, an oxide insulating layer which is in contact with part of the first oxide semiconductor layer and which is in contact with peripheries and side surfaces of the first and second oxide conductive layers, a first source electrode layer, and a first drain electrode layer. The second thin film transistor includes a second gate electrode layer, a second oxide semiconductor layer, and a second source electrode layer and a second drain electrode layer each formed using a light-transmitting material.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: January 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Tatsuya Takahashi
  • Publication number: 20140008707
    Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 9, 2014
    Inventors: Eric R. FOSSUM, Dae-Kil CHA, Young-Gu JIN, Yoon-Dong PARK, Soo-Jung HWANG
  • Publication number: 20140001521
    Abstract: An optoelectronic device for detecting electromagnetic radiation and including: a body of semiconductor material delimited by a main surface and including a first region and a second region that form a junction; and a recess formed in the body, which extends from the main surface and is delimited at least by a first wall, the first wall being arranged transverse to the main surface. The junction faces the first wall.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 2, 2014
    Inventor: Alberto Pagani
  • Publication number: 20130341690
    Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 26, 2013
    Applicant: PIXART IMAGING INCORPORATION, R.O.C.
    Inventors: Han-Chi Liu, Huan-Kun Pan, Eiichi Okamoto
  • Patent number: 8614412
    Abstract: A solid-state image device is provided which includes: a photoelectric conversion portion which obtains a signal charge by photoelectric conversion of incident light; a pixel transistor portion which outputs a signal charge generated by the photoelectric conversion portion; a peripheral circuit portion which is provided at the periphery of a pixel portion including the photoelectric conversion portion and the pixel transistor portion and which has an NMOS transistor and a PMOS transistor; a first stress liner film which has a compressive stress and which is provided on the PMOS transistor; and a second stress liner film which has a tensile stress and which is provided on the NMOS transistor. In the solid-state image device described above, the photoelectric conversion portion, the pixel transistor portion, and the peripheral circuit portion are provided in and/or on a semiconductor substrate.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: December 24, 2013
    Assignee: Sony Corporation
    Inventor: Yasushi Tateshita
  • Patent number: 8610127
    Abstract: A thin film transistor array substrate is disclosed. The thin film transistor array substrate includes: gate lines and data lines formed to cross each other in the center of a gate insulation film on a substrate and to define pixel regions; a thin film transistor formed at each intersection of the gate and data lines; a passivation film formed on the thin film transistors; a pixel electrode formed on each of the pixel regions and connected to the thin film transistor through the passivation film; a gate pad connected to each of the gate lines through a gate linker; and a data pad connected to each of the data lines through a data linker. The data pad is formed of a gate pattern, and the data line is formed of a data pattern. The data linker is configured to connect the data pad formed of the gate pattern with the data line formed of the data pattern using a connection wiring.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 17, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Chung Wan Oh, Jae Chang Kwon, Yu Ri Shim, Chang Yeop Shin, Dong Eok Kim
  • Patent number: 8604581
    Abstract: A solid-state image pickup device has a photoelectric conversion element that converts light incident from a first surface of a substrate into a signal charge and accumulates the signal charge, a transistor that is formed on a second surface side opposite to the first surface of the substrate and reads out the signal charge accumulated by the photoelectric conversion element, a supporting substrate stuck to the second surface of the substrate, and an antireflection coating formed on the first surface of the substrate, wherein the first surface of the substrate includes a curved surface or an inclined surface forming a prescribed angle to the second surface.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: December 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Risako Ueno, Hideyuki Funaki, Yoshinori Iida, Hiroto Honda
  • Publication number: 20130320419
    Abstract: A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy layers form a diode. The method further includes forming a gate dielectric over the first epitaxy layer, forming a gate electrode over the gate dielectric, and implanting a top portion of the first epitaxy layer and the second epitaxy layer to form a source/drain region adjacent to the gate dielectric.
    Type: Application
    Filed: September 14, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Chih-Cherng Jeng
  • Publication number: 20130320418
    Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
  • Patent number: 8598638
    Abstract: A solid-state image capturing element according to the present invention includes a one conductivity type semiconductor substrate; an opposite conductivity type well region formed on the one conductivity type semiconductor substrate; a photodiode section formed on the opposite conductivity type well region, constituted of a plurality of one conductivity type regions with successively different impurity concentrations for complete electric charge transferring; a one conductive drain region capable of reading out signal charges from the photodiode section; and a transfer gate formed above a substrate between the one conductivity drain region and the photodiode section.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: December 3, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Nagai Kenichi
  • Patent number: 8598639
    Abstract: A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: December 3, 2013
    Assignee: National Central University
    Inventors: Yue-Ming Hsin, Fang-Ping Chou, Ching-Wen Wang, Guan-Yu Chen
  • Patent number: 8592812
    Abstract: Provided is a device for analyzing at least one of a generated amount of positive charges, a generated amount of negative charges, and a generated amount of ultraviolet (UV) light. The device includes a substrate on which at least one of a first device configured to detect a variation in threshold voltage relative to the generated amount of positive charges, a second device configured to detect a variation in threshold voltage relative to the generated amount of negative charges, and a third device configured to detect a variation in threshold voltage relative to the generated amount of UV light is formed.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ken Tokashiki
  • Patent number: 8587008
    Abstract: A light-emitting device includes a substrate, a plurality of light-emitting elements mounted on one surface of the substrate, a first glass film provided to one surface of the substrate and having a plurality of apertures that form a light-reflecting frame surrounding the perimeter of each the light-emitting elements, and a second glass film provided to the other surface of the substrate. A coefficient of thermal expansion of the second glass film is greater than that of the substrate when a coefficient of thermal expansion of the first glass film is greater than that of the substrate, and a coefficient of thermal expansion of the second glass film is less than that of the substrate when a coefficient of thermal expansion of the first glass film is less than that of the substrate.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 19, 2013
    Assignees: Stanley Electric Co., Ltd., Nippon Carbide Industries Co., Inc.
    Inventors: Dai Aoki, Makoto Ida, Shigehiro Kawaura
  • Patent number: 8581254
    Abstract: The present approach involves a radiation detector module with increased quantum efficiency and methods of fabricating the radiation detector module. The module includes a scintillator substrate and a photodetector fabricated on the scintillator substrate. The photodetector includes an anode, active organic elements, and a cathode. The module also includes a pixel element array disposed over the photodetector. During imaging, radiation attenuated by an object to be imaged may propagate through the pixel element array and through the layers of the photodetector to be absorbed by the scintillator which in response emits optical photons. The photodetector may absorb the photons and generate charge with improved quantum efficiency, as the photons may not be obscured by the cathode or other layers of the module. Further, the module may include reflective materials in the cathode and at the pixel element array to direct optical photons towards the active organic elements.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: November 12, 2013
    Assignee: General Electric Company
    Inventors: Aaron Judy Couture, Steven Jude Duclos, Joseph John Shiang, Gautam Parthasarathy
  • Patent number: 8570455
    Abstract: A semiconductor device includes a supporting substrate; a semiconductor film on the supporting substrate; a gate insulating film on the semiconductor film; a gate electrode on the gate insulating film; and a source region and a drain region formed by introducing impurity elements to the semiconductor film. The thickness of the semiconductor film is within the range of 20 nm to 40 nm. Low-concentration regions are provided between the source region and a channel forming region, and between the drain region and the channel forming region, respectively. The low-concentration regions each have an impurity concentration smaller than that of the source region and that of the drain region, and the impurity concentration in a lower surface side region on the side of the supporting substrate is smaller than that of an upper surface side region on the opposite side.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: October 29, 2013
    Assignee: NLT Technologies, Ltd.
    Inventors: Shigeru Mori, Isao Shouji, Hiroshi Tanabe
  • Patent number: 8569766
    Abstract: Disclosed is an organic light-emitting display device including a transparent substrate which includes a display portion and a pad portion formed in a region around the display portion, a first semiconductor layer formed on the display portion, a second semiconductor layer formed on the pad portion, and a transparent electrode formed on each of the first the second semiconductor layers, where the first and second semiconductor layers include the same material.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun Park, Chun-Gi You, June-Woo Lee
  • Patent number: 8564032
    Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: October 22, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Noriyuki Nakamura
  • Patent number: 8563978
    Abstract: A display device includes a substrate, a first conductive film pattern including a gate electrode and a first capacitor electrode on the substrate, a gate insulating layer pattern on the first conductive film pattern, a polycrystalline silicon film pattern including an active layer and a second capacitor electrode on the gate insulating layer pattern, an interlayer insulating layer on the polycrystalline silicon film pattern, a plurality of first contact holes through the gate insulating layer pattern and the interlayer insulating layer to expose a portion of the first conductive film pattern, a plurality of second contact holes through the interlayer insulating layer to expose a portion of the polycrystalline silicon film pattern, and a second conductive film pattern including a source electrode, a drain electrode, and a pixel electrode on the interlayer insulating layer.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min-Chul Shin, Jong-Moo Huh, Bong-Ju Kim, Yun-Gyu Lee
  • Patent number: 8564035
    Abstract: To fabricate an active matrix type display device integrated with an image sensor at a low cost and without complicating process, the image sensor includes a thin film transistor is in a pixel of a plurality of pixels, an insulating layer is over the thin film transistor, a plurality of first electrodes, which is a shielding layer, is over the insulating layer, a photoelectric conversion layer including a semiconductor film is over the plurality of the first electrodes, and a second electrode over the photoelectric conversion layer. The thin film transistor can include polycrystal silicon. The semiconductor film can include amorphous silicon.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: October 22, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Masayuki Sakakura, Yurika Satou
  • Publication number: 20130270618
    Abstract: A touch panel and fabricating method thereof are provided. The patterned transparent conductive layer, disposed on the substrate, includes first electrodes. The photo-sensing layers are disposed on the first electrodes. The first patterned conductive layer includes gate electrodes, scan lines and second electrodes. The gate electrodes and the scan lines are disposed on the substrate. The second electrodes are disposed on the photo-sensing layers. The first electrodes, the photo-sensing layers and the second electrodes constitute photo-sensors. The second patterned conductive layer includes source electrodes and drain electrodes, wherein the gate electrodes, the channel layers, the source electrodes and the drain electrodes constitute read-out transistors and each of the read-out transistors is electrically connected to the corresponding photo-sensor respectively.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 17, 2013
    Applicant: Au Optronics Corporation
    Inventors: Chi-Wen Fan, Tien-Hao Chang, Zao-Shi Zheng, Chun Chang, Wei-Peng Weng, An-Thung Cho, Jiun-Jye Chang
  • Patent number: 8558291
    Abstract: An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a plurality of heaters disposed under the substrate mounting portion, the heaters individually preheating a plurality areas defined laterally in the substrate through a bottom surface of the substrate; and a light source facing a top surface of the substrate, configured to irradiate a pulsed light at a pulse width of about 0.1 ms to about 100 ms on the entire top surface of the substrate.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: October 15, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayuki Ito
  • Publication number: 20130264618
    Abstract: A method for manufacturing a backside-illuminated image sensor includes (1) forming an isolation film on the front side of a semiconductor substrate with a buried insulating layer formed therein to define an active region; (2) forming a light-receiving element in the active region of the semiconductor substrate; and (3) forming an inter-layer dielectric layer on the front side of the semiconductor substrate on which the light-receiving element is formed. The method may include forming a super contact hole to pass through the inter-layer dielectric layer and the buried insulating layer in a pad region defined on the front side of the semiconductor substrate reaching the semiconductor substrate. The method may include forming a barrier layer of a metal oxide film containing transition metal at the bottom and sidewall of the super contact hole. The method may include filling a conductive material in the super contact hole, in which the barrier layer is formed, to form a super contact.
    Type: Application
    Filed: February 6, 2013
    Publication date: October 10, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventors: Chung Kyung JUNG, Sungwook Joo
  • Patent number: 8552479
    Abstract: In one embodiment, a detector includes an AlxIn(1-x)Sb absorber layer, and an AlyIn(1-y)Sb passivation layer disposed above the AlxIn(1-x)Sb absorber layer, wherein x<y. The detector further includes a junction formed in a region of the AlxIn(1-x)Sb absorber layer, and a metal contact disposed above the junction and through the AlyIn(1-y)Sb passivation layer.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: October 8, 2013
    Assignee: Flir Systems, Inc.
    Inventors: Richard E. Bornfreund, Jeffrey B. Barton
  • Patent number: 8552481
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai