Light Responsive Or Combined With Light Responsive Device Patents (Class 257/290)
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Patent number: 8817144Abstract: A photoelectric conversion apparatus includes a semiconductor substrate having a photoelectric conversion portion. An insulator is provided on the semiconductor substrate. The insulator has a hole corresponding to the photoelectric conversion portion. A waveguide member is provided in the hole. An in-layer lens is provided on a side of the waveguide member farther from the semiconductor substrate. A first intermediate member is provided between the waveguide member and the in-layer lens. The first intermediate member has a lower refractive index than the in-layer lens.Type: GrantFiled: February 2, 2012Date of Patent: August 26, 2014Assignee: Canon Kabushiki KaishaInventors: Taro Kato, Mineo Shimotsusa, Hiroaki Sano, Takeshi Ichikawa, Yasuhiro Sekine, Mahito Shinohara, Genzo Momma
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Patent number: 8815628Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.Type: GrantFiled: December 12, 2011Date of Patent: August 26, 2014Assignee: Intellectual Ventures II LLCInventor: Sang-Young Kim
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Patent number: 8816405Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.Type: GrantFiled: April 12, 2011Date of Patent: August 26, 2014Assignee: Micron Technology, Inc.Inventor: Salman Akram
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Publication number: 20140231886Abstract: A flexible photosensor includes a flexible substrate, a gate on the flexible substrate, the gate including a conductive material having a planar structure, a gate insulating layer on the flexible substrate and the gate to at least cover the gate, the gate insulating layer including a non-conductive material having a planar structure, and a channel layer on the gate insulating layer, the channel layer including a semiconductor material having a planar structure.Type: ApplicationFiled: November 13, 2013Publication date: August 21, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Tian-zi SHEN, Won-jong YOO, Huamin LI, Min-Sup CHOI, Jae-young CHOI
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Patent number: 8809924Abstract: According to an aspect of the invention, an imaging device includes a plurality of photoelectric conversion elements and a read-out portion. The photoelectric conversion elements are arranged above a substrate. The read-out portion reads out signal corresponding to charges which are generated from each of the photoelectric conversion elements. Each of the photoelectric conversion elements includes a first electrode that collects the charge, a second electrode that is disposed opposite to the first electrode, a photoelectric conversion layer that generates the charges and disposed between the first electrode and the second electrode, and an electron blocking layer that is disposed between the first electrode and the photoelectric conversion layer. Distance between the first electrodes of adjacent photoelectric conversion elements is 250 nm or smaller. Each of the electron blocking layers has a change in surface potential of ?1 to 3 eV from a first face to a second face.Type: GrantFiled: February 24, 2011Date of Patent: August 19, 2014Assignee: FUJIFILM CorporationInventors: Hideyuki Suzuki, Kiyohiko Tsutsumi
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Patent number: 8809921Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.Type: GrantFiled: December 22, 2010Date of Patent: August 19, 2014Assignee: Sony CorporationInventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
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Patent number: 8803268Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.Type: GrantFiled: April 26, 2013Date of Patent: August 12, 2014Assignee: Intel CorporationInventors: John Heck, Ansheng Liu, Michael T. Morse, Haisheng Rong
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Patent number: 8803209Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.Type: GrantFiled: August 7, 2013Date of Patent: August 12, 2014Assignee: Seiko Epson CorporationInventor: Noriyuki Nakamura
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Patent number: 8803057Abstract: A method of resetting a photosite is disclosed. Photogenerated charges accumulated in the photosite are reset by recombining the photogenerated charges with charges of opposite polarity.Type: GrantFiled: July 18, 2011Date of Patent: August 12, 2014Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: François Roy, Julien Michelot
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Publication number: 20140217485Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: ApplicationFiled: April 7, 2014Publication date: August 7, 2014Applicant: International Business Machines CorporationInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Patent number: 8796747Abstract: A semiconductor chip having a photonics device and a CMOS device which includes a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; spacers formed on the germanium gate and the metal or polysilicon gate; and nitride encapsulation formed on the germanium gate. A method is also disclosed pertaining to fabricating the semiconductor chip.Type: GrantFiled: January 8, 2013Date of Patent: August 5, 2014Assignee: International Business Machines CorporationInventors: Solomon Assefa, William M. J. Green, Steven M. Shank, Yurii A. Vlasov
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Publication number: 20140209985Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.Type: ApplicationFiled: March 27, 2014Publication date: July 31, 2014Applicant: International Business Machines CorporationInventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
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Publication number: 20140203340Abstract: The photodiode has a p-type doped region (2) and an n-type doped region (3) in a semiconductor body (1), and a pn junction (4) between the p-type doped region and the n-type doped region. The semiconductor body has a cavity (5) such that the pn junction (4) has a distance (d) of at most 30 ?m from the bottom of the cavity (7).Type: ApplicationFiled: May 4, 2012Publication date: July 24, 2014Applicant: AMS AGInventors: Jochen Kraft, Ingrid Jonak-Auer, Rainer Minixhofer, Jordi Teva, Herbert Truppe
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Patent number: 8785991Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.Type: GrantFiled: May 28, 2009Date of Patent: July 22, 2014Assignee: Sony CorporationInventor: Keiji Mabuchi
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Patent number: 8785932Abstract: An IR sensing transistor according to an exemplary embodiment of the present invention includes: a light blocking layer formed on a substrate; a gate insulating layer formed on the light blocking layer; a semiconductor formed on the gate insulating layer; a pair of ohmic contact members formed on the semiconductor; a source electrode and a drain electrode formed on respective ones of the ohmic contact members; a passivation layer formed on the source electrode and the drain electrode; and a gate electrode formed on the passivation layer, wherein substantially all of the gate insulating layer lies on the light blocking layer.Type: GrantFiled: July 13, 2011Date of Patent: July 22, 2014Assignee: Samsung Display Co., Ltd.Inventors: Suk Won Jung, Byeong Hoon Cho, Sung Hoon Yang, Woong Kwon Kim, Sang Youn Han, Dae Cheol Kim, Ki-Hun Jeong, Kyung-Sook Jeon, Seung Mi Seo, Jung-Suk Bang, Kun-Wook Han
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Publication number: 20140191302Abstract: A semiconductor chip having a photonics device and a CMOS device which includes a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; spacers formed on the germanium gate and the metal or polysilicon gate; and nitride encapsulation formed on the germanium gate. A method is also disclosed pertaining to fabricating the semiconductor chip.Type: ApplicationFiled: January 8, 2013Publication date: July 10, 2014Applicant: International Business Machines CorporationInventors: Solomon Assefa, William M.J. Green, Steven M. Shank, Yurii A. Vlasov
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Patent number: 8773336Abstract: Illumination devices and related systems and methods are closed that can be used for LCD (Liquid Crystal Display) backlights, LED lamps, or other applications. The illumination devices can include a photo detector, such as a photodiode or an LED or other light detecting device, and one or more LEDs of different colors. A related method can be implemented using these illumination devices to maintain precise color produced by the blended emissions from such LEDs. One application for the illumination devices is backlighting for FSC (Field Sequential Color) LCDs (Liquid Crystal Displays). FSC LCDs temporally mix the colors in an image by sequentially loading the red, green, and blue pixel data of an image in the panel and flashing the different colors of an RGB backlight. Precise and uniform color temperature across such a display can be advantageously maintained by continually monitoring ratios of photodiode currents induced by the different colored LEDs in each illumination device as each color is flashed.Type: GrantFiled: August 5, 2010Date of Patent: July 8, 2014Assignee: Ketra, Inc.Inventor: David J. Knapp
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Publication number: 20140183606Abstract: According to an embodiment of the invention, there is provided a method of manufacturing a semiconductor device. The method of manufacturing the semiconductor device includes forming a trench downward from an upper face of a semiconductor layer at a position where an element isolation area is formed in the semiconductor layer, and melting the upper face of the trench-formed semiconductor layer to close an open end of the trench.Type: ApplicationFiled: May 29, 2013Publication date: July 3, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kazunori KAKEHI, Hisashi Aikawa, Yosuke Kitamura
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Patent number: 8766157Abstract: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.Type: GrantFiled: September 1, 2011Date of Patent: July 1, 2014Assignee: SRI InternationalInventors: Peter Alan Levine, Rui Zhu
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Patent number: 8764462Abstract: The invention concerns a semiconductor component with a layered arrangement with an electrode, an organic semiconductor layer, an injection layer, and an additive layer, which consists of an additive, which on contact with the molecular doping material modifies its doping affinity with respect to the organic material of the organic semiconductor layer, wherein in the injection layer a layered region is formed with a first doping affinity of the molecular doping material with respect to the organic material and a further layered region is formed with a second, in comparison to the first doping affinity smaller, doping affinity of the molecular doping material with respect to the organic material. Furthermore the invention concerns a method for the manufacture of a semiconductor component and also the application of a semiconductor component.Type: GrantFiled: July 21, 2011Date of Patent: July 1, 2014Assignee: Novaled AGInventors: Sascha Dorok, Rudolf Lessmann, Tobias Canzler, Qiang Huang, Christiane Koehn
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Patent number: 8766337Abstract: A first thin film diode (100A) has a first semiconductor layer (10A) and a first light blocking layer (12A) disposed on the substrate side of the first semiconductor layer. A second thin film diode (100B) has a second semiconductor layer (10B) and a second light blocking layer (12B) disposed on the substrate side of the second semiconductor layer. An insulating film (14) is formed between the first semiconductor layer (10A) and the first light blocking layer (12A) and between the second semiconductor layer (10B) and the second light blocking layer (12B). A thickness D1 of a portion of the insulating film (14) positioned between the first semiconductor layer (10A) and the first light blocking layer (12A) is different from a thickness D2 of a portion of the insulating film (14) positioned between the second semiconductor layer (10B) and the second light blocking layer (12B).Type: GrantFiled: November 24, 2010Date of Patent: July 1, 2014Assignee: Sharp Kabushiki KaishaInventor: Hiroshi Aichi
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Patent number: 8759873Abstract: A bispectral detector comprising upper and lower semiconductor layers of a first conductivity type in order to absorb a first and a second electromagnetic spectrum, separated by an intermediate layer that forms a barrier; semiconductor zones of a second conductivity type implanted in upper layer and lower layer and each implanted at least partially in the bottom of an opening that passes through upper layer and intermediate layer; and conductor elements connected to semiconductor zones. At least that part of each opening that passes through upper layer is separated from the latter by a semiconductor cap layer: whereof the concentration of dopants of the second conductivity type is greater than 1017 cm?3; and whereof the thickness is chosen as a function of said concentration so that it exceeds the minority carrier diffusion length in the cap layer.Type: GrantFiled: September 13, 2011Date of Patent: June 24, 2014Assignee: Commissariat a l'Energie Atomique et Aux Energies AlternativesInventors: Olivier Gravrand, Jacques Baylet
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Patent number: 8748953Abstract: Methods and devices that incorporate microlens arrays are disclosed. An image sensor includes a pixel layer and a dielectric layer. The pixel layer has a photodetector portion configured to convert light absorbed by the pixel layer into an electrical signal. The dielectric layer is formed on a surface of the pixel layer. The dielectric layer has a refractive index that varies along a length of the dielectric layer. A method for fabricating an image sensor includes forming an array of microlenses on a surface of the dielectric layer, emitting ions through the array of microlenses to implant the ions in the dielectric layer, and removing the array of microlenses from the surface of the dielectric layer.Type: GrantFiled: November 29, 2011Date of Patent: June 10, 2014Assignee: Aptina Imaging CorporationInventors: Giovanni Margutti, Andrea Del Monte
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Patent number: 8734008Abstract: An active sensor apparatus includes an array of sensor elements arranged in a plurality of columns and rows of sensor elements. The sensor apparatus includes a plurality of column and row thin film transistor switches for selectively activating the sensor elements, and a plurality of column and row thin film diodes for selectively accessing the sensor elements to obtain information from the sensor elements. The thin film transistor switches and thin film diodes are formed on a common substrate.Type: GrantFiled: November 3, 2009Date of Patent: May 27, 2014Assignee: Next Biometrics ASInventor: Matias N. Troccoli
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Patent number: 8735882Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z? about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.Type: GrantFiled: January 14, 2011Date of Patent: May 27, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Chang-jung Kim, I-hun Song, Dong-hun Kang, Young-soo Park
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Publication number: 20140131778Abstract: Pixel Front end circuits particularly applicable to photodetectors requiring wide bias ranges and/or with high background currents. In various versions, wide bias ranges, short protection, and background current subtraction, both predetermined and automatically sampled, are disclosed.Type: ApplicationFiled: November 15, 2012Publication date: May 15, 2014Inventor: Kenton Veeder
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Patent number: 8723278Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.Type: GrantFiled: March 4, 2012Date of Patent: May 13, 2014Assignee: Industrial Technology Research InstituteInventors: Chih-Ming Lai, Yung-Hui Yeh
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Patent number: 8715814Abstract: A method, apparatus and material produced thereby in an amorphous or crystalline form having multiple elements with a uniform molecular distribution of elements at the molecular level.Type: GrantFiled: November 13, 2012Date of Patent: May 6, 2014Inventor: L. Pierre de Rochemont
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Patent number: 8717468Abstract: A solid-state imaging device is disclosed. The solid-state image device has pixels in which an absorption film that absorbs short wavelength-side light is formed on a photoelectric conversion portion for desired color light through an insulation film.Type: GrantFiled: May 12, 2009Date of Patent: May 6, 2014Assignee: Sony CorporationInventor: Kazuichiro Itonaga
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Patent number: 8710559Abstract: A solid-state imaging apparatus includes a transfer gate electrode formed on a semiconductor substrate; a photoelectric conversion unit including an electric charge storage area that is formed from a surface side of the semiconductor substrate in a depth direction, a transfer auxiliary area formed of a second conductive type impurity area that is formed in such a manner as to partially overlap the transfer gate electrode, and a dark current suppression area that is a first dark current suppression area formed in an upper layer of the transfer auxiliary and formed so as to have positional alignment in such a manner that the end portion of the transfer auxiliary area on the transfer gate electrode side is at the same position as the end portion of the transfer auxiliary area; and a signal processing circuit configured to process an output signal output from the solid-state imaging apparatus.Type: GrantFiled: June 20, 2012Date of Patent: April 29, 2014Assignee: Sony CorporationInventors: Mikiko Kobayashi, Sanghoon Ha
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Patent number: 8710558Abstract: There is provided a photoelectric conversion apparatus which is characterized by comprising a plurality of photoelectric conversion regions of a first conductivity type, and a plurality of semiconductor regions of a second conductivity type opposite to the first conductivity type; and in that the plurality of photoelectric conversion regions of the first conductivity type and the plurality of semiconductor regions are alternately arranged, and a voltage controlling unit is further provided to change a width of a depletion layer formed in a semiconductor substrate by controlling a voltage to be applied to the semiconductor region of the second conductivity type provided between the plurality of photoelectric conversion regions of the first conductivity type.Type: GrantFiled: January 19, 2012Date of Patent: April 29, 2014Assignee: Canon Kabushiki KaishaInventors: Daisuke Inoue, Tetsunobu Kochi, Yukihiro Kuroda, Hideo Kobayashi, Kouji Maeda
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Publication number: 20140110771Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor substrate including a pixel area and a peripheral circuit area, a first line provided in the peripheral circuit area and on a first principal surface of the semiconductor substrate, a second line provided in the peripheral circuit area and on a second principal surface of the semiconductor substrate, a first through electrode connected to one end of the first line and one end of the second line and passing through the semiconductor substrate, and a second through electrode connected to the other end of the first line and the other end of the second line and passing through the semiconductor substrate.Type: ApplicationFiled: July 23, 2013Publication date: April 24, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomoyuki YODA, Jiro Hayakawa, Ikuko Inoue, Eiji Sato, Takeshi Kitahara
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Publication number: 20140103408Abstract: In a solid-state imaging device, N regions serving as photoelectric conversion diodes are formed on outer peripheries of P regions in upper portions of island-shaped semiconductors formed on a substrate, and P+ regions connected to a pixel selection line conductive layer are formed on top layer portions of upper ends of the island-shaped semiconductors so as to adjoin the N regions and the P regions. In the P+ regions, a first P+ region has a thickness less than a second P+ region, and the second P+ region has a thickness less than a third P+ region.Type: ApplicationFiled: October 14, 2013Publication date: April 17, 2014Applicant: Unisantis Electronics Singapore Pte. Ltd.Inventors: Fujio MASUOKA, Nozomu HARADA
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Publication number: 20140103409Abstract: An object is to provide an SOI substrate provided with a semiconductor layer which can be used practically even when a glass substrate is used as a base substrate. Another object is to provide a semiconductor device having high reliability using such an SOI substrate. An altered layer is formed on at least one surface of a glass substrate used as a base substrate of an SOI substrate to form the SOI substrate. The altered layer is formed on at least the one surface of the glass substrate by cleaning the glass substrate with solution including hydrochloric acid, sulfuric acid or nitric acid. The altered layer has a higher proportion of silicon oxide in its composition and a lower density than the glass substrate.Type: ApplicationFiled: December 19, 2013Publication date: April 17, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tetsuya KAKEHATA, Hideto OHNUMA, Yoshiaki YAMAMOTO, Kenichiro MAKINO
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Patent number: 8692301Abstract: The present invention provides a photodiode comprising a p-i-n or pn junction at least partly formed by first and second regions (2) made of semiconductor materials having opposite conductivity type, wherein the p-i-n or pn junction comprises a light absorption region (11) for generation of charge carriers from absorbed light. One section of the p-i-n or pn junction is comprises by one or more nanowires (7) that are spaced apart and arranged to collect charge carriers generated in the light absorption region (11). At least one low doped region (10) made of a low doped or intrinsic semiconductor material provided between the nanowires (7) and one of said first region (1) and said second region (2) enables custom made light absorption region and/or avalanche multiplication region of the active region (9).Type: GrantFiled: September 4, 2009Date of Patent: April 8, 2014Assignee: QuNano ABInventors: Lars Samuelson, Federico Capasso, Jonas Ohlsson
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Patent number: 8691615Abstract: An image sensor and a method of manufacturing the same. The image sensor includes a plurality of photoelectric conversion units that are horizontally arranged and selectively emit electric signals by absorbing color beams.Type: GrantFiled: September 16, 2011Date of Patent: April 8, 2014Assignee: Samsung Electronics Co., Ltd.Inventor: Kyu-sik Kim
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Publication number: 20140091374Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.Type: ApplicationFiled: September 28, 2012Publication date: April 3, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H. Khater, Steven M. Shank, Yurii A. Vlasov
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Publication number: 20140091375Abstract: A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate and extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and two end cap hardmasks are between the gate dielectric and the gate electrode over the implant isolation region. The two end cap hardmasks include same dopants as those implanted into the active region.Type: ApplicationFiled: October 1, 2012Publication date: April 3, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Wen-De Wang, Wen-I Hsu
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Publication number: 20140091321Abstract: There is provided a semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.Type: ApplicationFiled: September 4, 2013Publication date: April 3, 2014Applicant: Sony CorporationInventor: Takashi Yokoyama
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Patent number: 8680639Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.Type: GrantFiled: January 23, 2012Date of Patent: March 25, 2014Assignees: Applied Micro Circuits Corporation, Volex PLCInventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
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Publication number: 20140077282Abstract: A TFT flat sensor comprises pixel units each comprising: a common electrode and a common electrode insulating layer on a substrate, wherein a first via hole is provided in the common electrode insulating layer at a location corresponding to the common electrode; a gate electrode on the common electrode insulating layer; a first conductive film layer on the common electrode and the gate electrode wherein the first conductive film layer contacts the common electrode through a first via hole; a gate insulating layer, an active layer, a drain electrode and a source electrode, a second conductive film layer, a protection layer and a third conductive film layer on the first conductive film layer; a second via hole is provided in the protection layer at a location corresponding to the source electrode through which the third conductive film layer contacts the source electrode.Type: ApplicationFiled: September 11, 2013Publication date: March 20, 2014Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Shaoying XU, Zhenyu XIE, Xu CHEN
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Patent number: 8674417Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.Type: GrantFiled: March 21, 2012Date of Patent: March 18, 2014Assignee: Sony CorporationInventor: Isao Hirota
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Publication number: 20140070079Abstract: To provide a photodetector circuit capable of obtaining signals in different periods without being affected by characteristics of a photoelectric conversion element. The photodetector circuit has n signal output circuits (n is a natural number of 2 or more) connected to the photoelectric conversion element. Further, the n signal output circuits each include the following: a transistor whose gate potential varies in accordance with the amount of light entering the photoelectric conversion element; a first switching element which holds the gate potential of the transistor; and a second switching element which controls a signal output from the transistor. Thus, after data based on the amount of light entering the photoelectric conversion elements is held as the gate potentials of the transistors, the second switching elements are turned on, whereby signals in different periods can be obtained without being affected by characteristics of the photoelectric conversion element.Type: ApplicationFiled: September 5, 2013Publication date: March 13, 2014Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiyuki Kurokawa, Takuya Tsurume
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Publication number: 20140070108Abstract: An apparatus for detecting an X-ray includes a photo diode having an anode electrode and a cathode electrode, a switching transistor, and a first storage capacitor that has one end connected to the cathode electrode and another end connected to the switching transistor.Type: ApplicationFiled: July 10, 2013Publication date: March 13, 2014Inventor: Dong Hyuk KIM
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Patent number: 8669598Abstract: A unit pixel of an image sensor and a photo detector are disclosed. The photo detector of the present invention configured to absorb light can include: a light-absorbing part configured to absorb light by being formed in a floated structure; an oxide film being in contact with one surface of the light-absorbing part; a source being in contact with one side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; a drain facing the source so as to be in contact with the other side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; and a channel interposed between the source and the drain and configured to form flow of an electric current between the source and the drain.Type: GrantFiled: September 25, 2013Date of Patent: March 11, 2014Inventor: Hoon Kim
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Patent number: 8669552Abstract: The present invention generally relates to an offset electrode TFT and a method of its manufacture. The offset electrode TFT is a TFT in which one electrode, either the source or the drain, surrounds the other electrode. The gate electrode continues to be below both the source and the drain electrodes. By redesigning the TFT, less voltage is necessary to transfer the voltage from the source to the drain electrode as compared to traditional bottom gate TFTs or top gate TFTs. The offset electrode TFT structure is applicable not only to silicon based TFTs, but also to transparent TFTs that include metal oxides such as zinc oxide or IGZO and metal oxynitrides such as ZnON.Type: GrantFiled: November 4, 2011Date of Patent: March 11, 2014Assignee: Applied Materials, Inc.Inventor: Yan Ye
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Patent number: 8669599Abstract: A unit pixel of an image sensor and a photo detector are disclosed. The photo detector of the present invention configured to absorb light can include: a light-absorbing part configured to absorb light by being formed in a floated structure; an oxide film being in contact with one surface of the light-absorbing part; a source being in contact with one side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; a drain facing the source so as to be in contact with the other side of the other surface of the oxide film and separated from the light-absorbing part with the oxide film therebetween; and a channel interposed between the source and the drain and configured to form flow of an electric current between the source and the drain.Type: GrantFiled: September 25, 2013Date of Patent: March 11, 2014Inventor: Hoon Kim
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Publication number: 20140061737Abstract: A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.Type: ApplicationFiled: August 29, 2012Publication date: March 6, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wen-I Hsu, Min-Feng Kao, Jen-Cheng Liu, Dun-Nian Yaung, Tzu-Hsuan Hsu, Wen-De Wang
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Publication number: 20140054661Abstract: An embodiment relates to a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.Type: ApplicationFiled: October 31, 2013Publication date: February 27, 2014Applicant: Zena Technologies, Inc.Inventors: Young-June YU, Munib WOBER
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Patent number: 8659109Abstract: An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.Type: GrantFiled: January 4, 2011Date of Patent: February 25, 2014Assignee: STMicroelectronics (Crolles 2) SASInventor: François Roy