Matrix Or Array (e.g., Single Line Arrays) Patents (Class 257/443)
  • Patent number: 9024288
    Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 5, 2015
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Tuo Sun
  • Patent number: 9024406
    Abstract: An imaging system may include an image sensor package with an image sensor wafer mounted on a carrier wafer, which may be a silicon substrate. A capacitor may be formed in the carrier wafer. Trenches may be etched in a serpentine pattern in the silicon substrate. Conductive plates of the capacitor may be formed at least partially in the trenches. An insulator material may be formed between the capacitor and the silicon substrate. A dielectric layer may be formed between the conductive plates of the capacitor. The image sensor package may be mounted on a printed circuit board via a ball grid array. Conductive vias may electrically couple the capacitor and the image sensor wafer to the printed circuit board.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Scott Churchwell, Marc Sulfridge, Swarnal Borthakur
  • Publication number: 20150115387
    Abstract: According to one embodiment, the present invention relates to a method for manufacturing a photovoltaic device comprising a photovoltaic cell or a plurality of photovoltaic cells (PV cells) connected to an electronic integrated circuit having at least one electrical contact area. A stack comprising the PV cell(s) is produced separately from the electronic integrated circuit, the electronic integrated circuit is then transferred to said stack comprising the PV cell(s). During this transfer, connection areas carried by the PV cell(s) are brought into contact with matching connection areas carried by the electronic integrated circuit.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 30, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Julien BUCKLEY, Haykel BEN JAMAA
  • Publication number: 20150115386
    Abstract: Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region.
    Type: Application
    Filed: October 25, 2013
    Publication date: April 30, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Tzu-Hsuan Hsu, Feng-Chi Hung, Min-Feng Kao
  • Publication number: 20150108509
    Abstract: The invention relates to a method for producing serially interconnected optoelectronic components as well as optoelectronic components interconnected according to the method. In a first step, an electrically non-conductive layer with optoelectronic material introduced therein and at least one first wire or thread (2) located in the layer is produced. The first wire or thread either is electrically conductive from the outset or can subsequently be treated in such a way that it becomes electrically conductive as a result of the treatment. A first and second electrooptically active region of the layer is electrically connected to the first wire or thread in such a way that they are electrically interconnected to each other in series. By the wire, regions of the layer are subdivided in a simple manner, as a result of which a plurality of optoelectronic components are produced in a technically simple manner. Continuous production is possible.
    Type: Application
    Filed: March 26, 2013
    Publication date: April 23, 2015
    Inventor: Dieter Meissner
  • Publication number: 20150108326
    Abstract: An opto-sensitive device, a pixel configured for use in an opto-sensitive device, and a method of operating an opto-sensitive device are disclosed. The opto-sensitive device illustratively includes a capacitor stacked on top of a photodetector, thereby improving the fill factor of the opto-sensitive device. Transparent properties of the capacitor for a wavelength of interest ensure that the incident light is completely or mostly absorbed only within the photodetector and not within the capacitor.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 23, 2015
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Milos Davidovic, Wolfgang Gaberl, Robert Swoboda
  • Publication number: 20150102445
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.
    Type: Application
    Filed: September 23, 2014
    Publication date: April 16, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Publication number: 20150102207
    Abstract: A display device includes a pixel which includes a first photosensor portion having a first photodiode for detecting visible light, which is provided together with a display element portion; and a pixel which includes a second photosensor portion having a second photodiode for detecting infrared rays, which is provided together with another display element portion. The second photosensor portion detects infrared rays included in external light, and selects an imaging element and adjusts sensitivity in accordance with the amount of infrared rays detected by the second photosensor portion.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 16, 2015
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA
  • Patent number: 9006855
    Abstract: There is provided a solid-state image pickup element including a pixel array part in which a plurality of pixels are arranged on a silicon substrate in arrays, and a drive part driving the pixel. The pixel includes a photoelectric conversion part formed near a second face of the silicon substrate opposite to a first face on which a wiring layer is laminated, for generating a charge corresponding to incident light, an overflow part formed in contact with the second face and fixed to a predetermined voltage, and a potential barrier part formed to be connected with the photoelectric conversion part and the overflow part, for serving as a barrier against a charge overflowed from the photoelectric conversion part on the overflow part.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: April 14, 2015
    Assignee: Sony Corporation
    Inventor: Taiichiro Watanabe
  • Patent number: 9006756
    Abstract: An aggregation of semiconductor devices, comprising: a first layer comprising a first surface and a second surface; a second layer comprising a first region and a second region; and a plurality of semiconductor devices disposed between the first layer and the second region wherein a shape of the second region comprises a curve and a mark.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: April 14, 2015
    Assignee: Epistar Corporation
    Inventors: Hsu-Cheng Lin, Ching-Yi Chiu, Pei-Shan Fang, Chun-Chang Chen
  • Publication number: 20150098482
    Abstract: Methods are provided for using masking techniques and plasma etching techniques to dice a compound semiconductor wafer into dies. Using these methods allows compound semiconductor die to be obtained that have smooth side walls, a variety of shapes and dimensions, and a variety of side wall profiles. In addition, by using these techniques to perform the dicing operations, the locations of features of the die relative to the side walls are ascertainable with certainty such that one or more of the side walls can be used as a passive alignment feature to precisely align one or more of the die with an external device.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 9, 2015
    Inventors: Chee Siong Peh, Chiew Hai NG, David G. McIntyre
  • Publication number: 20150097259
    Abstract: Conductive plug structures suitable for stacked semiconductor device package is provided, wherein large contact region between the conductive plug structures and the corresponding pads of devices can be achieved, to reduce electrical impedance. Therefore, package structures such as photosensitive device packages using the conductive plug structures have superior electrical performance and reliability.
    Type: Application
    Filed: December 15, 2014
    Publication date: April 9, 2015
    Applicant: Industrial Technology Research Institute
    Inventors: Hsiang-Hung CHANG, Wen-Chih CHEN, Chia-Wei JUI, Zhi-Cheng HSIAO, Cheng-Ta KO, Rong-Shen LEE, Sheng-Shu YANG
  • Publication number: 20150091121
    Abstract: An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.
    Type: Application
    Filed: September 19, 2014
    Publication date: April 2, 2015
    Inventors: Shuji Manda, Susumu Hiyama, Yasuyuki Shiga
  • Publication number: 20150090863
    Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 2, 2015
    Inventors: Barmak Mansoorian, Daniel Van Blerkom
  • Patent number: 8994135
    Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p? type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p? type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: March 31, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Kazuhisa Yamamura, Akira Sakamoto, Terumasa Nagano, Yoshitaka Ishikawa, Satoshi Kawai
  • Patent number: 8994138
    Abstract: An image sensor including a pixel array, each pixel including, in a substrate of a doped semiconductor material of a first conductivity type, a first doped region of a second conductivity type at the surface of the substrate; an insulating trench surrounding the first region; a second doped region of the first conductivity type, more heavily doped than the substrate, at the surface of the substrate and surrounding the trench; a third doped region of the second conductivity type, forming with the substrate a photodiode junction, extending in depth into the substrate under the first and second regions and being connected to the first region; and a fourth region, more lightly doped than the second and third regions, interposed between the second and third regions and in contact with the first region and/or with the third region.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: March 31, 2015
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Sebastien Place
  • Patent number: 8994041
    Abstract: This photodiode array module includes a first semiconductor substrate 2 having a first photodiode array that is sensitive to light of a first wavelength band, a second semiconductor substrate 2? having a second photodiode array that is sensitive to light of a second wavelength band, and a third semiconductor substrate 3 which is formed with a plurality of amplifiers AMP and on which the first and second semiconductor substrates 2, 2? are placed side by side without overlapping, and which connects each photodiode to the amplifier AMP via a bump. In adjacent end portions of the first semiconductor substrate 2 and the second semiconductor substrate 2?, stepped portions are formed, which thus allows performing measurement with low noise even when respective pixels are aligned successively over both substrates.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: March 31, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Patent number: 8994137
    Abstract: The invention relates to a sensor matrix (1) with semiconductor components and a process for producing such a device, which sensor matrix comprises a laminar carrier layer (3), a first (4) and at least one second (10) electrode arrangement and a component arrangement (6). The first electrode arrangement (4) is disposed on a surface (2) of the carrier layer (3), and the component arrangement (6) is disposed on the first electrode arrangement (4) in the form of a plurality of organic semiconductor components (7). The second electrode arrangement (10) is arranged on a surface (8) of a top layer (9), and the top layer (9) is arranged over the carrier layer (3) so that the first (4) and second (10) electrode arrangements face one another and the second electrode arrangement (10) is in electrically conductive contact, at least in sections, with the component arrangement (6).
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: March 31, 2015
    Assignee: ASMAG-Holding GmbH
    Inventor: Franz Padinger
  • Publication number: 20150084149
    Abstract: A radiation detector according to an embodiment includes: a semiconductor substrate; a light detecting unit provided on a side of a first surface of the semiconductor substrate; a first insulating film provided covering the light detecting unit; a second insulating film covering the first insulating film; a scintillator provided on the second insulating film; an interconnection provided between the first and second insulating films, and connected to the light detecting unit; a first electrode connected to the interconnection through a bottom portion of the first opening; a second electrode provided on a region in the second surface of the semiconductor substrate, the region opposing at least a part of the light detecting unit; a second opening provided in a region surrounding the first electrode and not surrounding the second electrode; and an insulating resin layer covering the first and second electrodes and the first and second openings.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 26, 2015
    Inventors: Hitoshi YAGI, Rei HASEGAWA, Masaki ATSUTA, Yasuharu HOSONO, Keita SASAKI, Go KAWATA
  • Patent number: 8987855
    Abstract: An image sensor device includes a semiconductor substrate having a front side and a backside. A first dielectric layer is on the front side of the semiconductor substrate. A metal pad is in the first dielectric layer. A second dielectric layer is over the first dielectric layer and on the front side of the semiconductor substrate. An opening penetrates through the semiconductor substrate from the backside of the semiconductor substrate, wherein the opening includes a first portion extending to expose a portion of the metal pad and a second portion extending to expose a portion of the second dielectric layer. A metal layer is formed in the first portion and the second portion of the opening.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: March 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Patent number: 8981515
    Abstract: A solid-state imaging device includes a plurality of photoelectric conversion regions stacked at different depths within a semiconductor substrate of each pixel to photoelectrically convert light of different wavelength bands, and a discharge region formed between the photoelectric conversion regions adjacent to each other in a depth direction of the semiconductor substrate to discharge charges generated by photoelectric conversion in regions between the photoelectric conversion regions.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Keisuke Hatano, Atsushi Toda
  • Publication number: 20150061063
    Abstract: An image sensor may include a substrate having photoelectric conversion regions respectively formed on a plurality of pixels and charge trap regions overlapping with the respective photoelectric conversion regions and having depths or thicknesses that are different, for each of the respective pixel.
    Type: Application
    Filed: December 15, 2013
    Publication date: March 5, 2015
    Applicant: SK hynix Inc.
    Inventors: Yeoun-Soo KIM, Kyoung-Oug RO, Jong-Hyun JE, Do-Hwan KIM
  • Patent number: 8969990
    Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: March 3, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Publication number: 20150054112
    Abstract: A solid-state imaging device includes a dielectric substrate, a solid-state imaging element disposed on the dielectric substrate, and including a photosensitive unit at a portion of a front surface thereof, an adhesive between the dielectric substrate and the solid-state imaging element, connection conductors, a sealant, and an upper package part. The solid-state imaging element includes a photosensitive unit at a portion of a front surface thereof, and is bonded to the dielectric substrate by the adhesive such that the adhesive is in contact with a portion of a rear surface of the solid-state imaging element so as to permit air flow along other portions of the rear surface of the solid-state image element. The connection conductors electrically connect the solid-state imaging element and the dielectric substrate. The upper package part is provided on the front surface of the solid-state imaging element so as to hermetically seal the photosensitive unit.
    Type: Application
    Filed: February 26, 2014
    Publication date: February 26, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsuhiro IWAMA, Yasuhiro KOSHIO
  • Publication number: 20150048474
    Abstract: A solid-state image pickup unit includes substrate; a red pixel including a red charge storage section; a blue pixel including a blue charge storage section; and a green pixel including a plurality of green charge storage sections, the red charge storage section and the blue charge storage section being provided in the substrate. Then, the plurality of green charge storage sections are arranged in the substrate along a thickness direction of the substrate.
    Type: Application
    Filed: February 25, 2013
    Publication date: February 19, 2015
    Inventor: Hiroaki Ishiwata
  • Publication number: 20150048473
    Abstract: An image pickup element includes: a photoelectric conversion film provided on a semiconductor substrate and including a chalcopyrite-based compound; an insulating film provided on a light incident surface side of the photoelectric conversion film; and a conductive film provided on the insulating film.
    Type: Application
    Filed: July 25, 2014
    Publication date: February 19, 2015
    Inventor: Hirotsugu Takahashi
  • Patent number: 8957492
    Abstract: In one embodiment of a method of manufacturing a semiconductor device, a plurality of substantially columnar trenches are formed along a region for forming a dicing line in a semiconductor substrate having first surface and second surfaces opposed to each other, from the first surface. The substrate is subjected to a heat treatment. At least one hollow portion is formed in the substrate by migration of a material which composes the substrate. Semiconductor devices are formed in semiconductor regions of the substrate which are surrounded by the region for forming the dicing line. The semiconductor regions are provided on a side of the first surface. A portion of the substrate is removed from a side of the second surface until the thickness is reduced to a predetermined value. The substrate is divided into chips along a dicing line from at least the one hollow portion as a starting point.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akihiro Takahashi
  • Patent number: 8956899
    Abstract: A display device includes: a substrate; a plurality of light-emission elements arranged, on the substrate, in a first direction and a second direction intersecting each other, each of the light-emission elements having a first electrode layer, an organic layer including a luminous layer, and a second electrode layer which are laminated in that order; and a separation section disposed, on the substrate, between the light-emission elements adjacent to each other in the first direction, the separation section having two or more pairs of steps. The first electrode layers in the light-emission elements are separated from each other, and the organic layers as well as the second electrode layers in the light-emission elements adjacent to each other in the first direction are separated from each other by the steps included in the separation section.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: February 17, 2015
    Assignee: Sony Corporation
    Inventor: Hiroshi Sagawa
  • Patent number: 8952432
    Abstract: Disclosed herein is a solid-state imaging device including a photoelectric conversion element operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof, an electric-charge holding region in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out, and a transfer gate having a complete transfer path through which the electric charge accumulated in the photoelectric conversion element is completely transferred into the electric-charge holding region, and an intermediate transfer path through which the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined charge amount is transferred into the electric-charge holding region. The complete transfer path and the intermediate transfer path are formed in different regions.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: February 10, 2015
    Assignee: Sony Corporation
    Inventors: Yusuke Oike, Takahiro Kawamura, Shinya Yamakawa, Ikuhiro Yamamura, Takashi Machida, Yasunori Sogoh, Naoki Saka
  • Publication number: 20150035109
    Abstract: The present technology relates to a semiconductor device, a manufacturing method of a semiconductor device, a semiconductor wafer, and electronic equipment, which allow a semiconductor device, in which miniaturization is possible, to be provided. A semiconductor device includes a semiconductor substrate, a wiring layer that is formed on the semiconductor substrate, and a drive circuit that is provided in a circuit forming region of the semiconductor substrate. Then, the semiconductor device 110 is configured to include a pad electrode 103 that is electrically connected to the drive circuit and exposed from the side surface of the wiring layer, and an external connection terminal 108 that is provided in side surfaces of the semiconductor substrate and the wiring layer, and is electrically connected to the pad electrode 103.
    Type: Application
    Filed: March 4, 2013
    Publication date: February 5, 2015
    Inventor: Toyotaka Kataoka
  • Publication number: 20150035110
    Abstract: A MEMS sensor for detecting electromagnetic waves in a particular frequency range is provided. In a preferred embodiment, the MEMS sensor comprises a bottom substrate layer; a first electrode layer over the substrate layer; a pyroelectric layer over the first electrode layer; and a second electrode layer over the pyroelectric layer; wherein a top electrode layer is patterned with a periodic structure that has a periodicity less than or equal to target infrared wavelength.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Inventors: Albert Pisano, David Horsley, Kansho Yamamoto
  • Patent number: 8946712
    Abstract: A light blocking member having variable transmittance, a display panel including the same, and a manufacturing method thereof. A light blocking member having a variable transmittance according to one exemplary embodiment includes a polymerizable compound, a binder, and a thermochromic material that exhibits a black color at a temperature below a threshold temperature and becomes transparent at a temperature above the threshold temperature.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byung-Duk Yang, Vladimir Urazaev, Sung-Wook Kang
  • Patent number: 8946839
    Abstract: An absorber is disclosed. The disclosed absorber contains a base layer, and a plurality of pillars disposed above the base layer and composed of material configured to absorb an incident light and generate minority electrical carriers and majority electrical carrier, wherein the height of the pillars is predetermined to provide a common pyramidal outline shared by the pillars in the plurality of pillars.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: February 3, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, James H. Schaffner
  • Patent number: 8946841
    Abstract: Disclosed herein is a solid-state imaging element including: a semiconductor layer; a plurality of photoelectric conversion sections arranged within the semiconductor layer; and a pixel separating section disposed in a shape of a same width from a light receiving surface of the semiconductor layer to an opposite surface of the semiconductor layer from the light receiving surface in a position of separating the photoelectric conversion sections from each other for each pixel, the pixel separating section being formed by a material including an impurity.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventor: Masashi Nakazawa
  • Patent number: 8946610
    Abstract: The present invention provides a CMOS type semiconductor image sensor module in which the aperture ratio of the pixel is improved and at the same time chip use efficiency is attempted to be improved and furthermore, simultaneous shuttering of all the pixels is made possible, and a method of manufacturing the same. The semiconductor image sensor module of the present invention is constituted by laminating a first semiconductor chip including an image sensor in which a plurality of pixels, each constituted by a photoelectric conversion element and transistors, are arranged, and a second semiconductor chip including an A/D converter array. Preferably, a third semiconductor chip including a memory element array is further laminated. Also, a semiconductor image sensor module of the present invention is constituted by laminating a first semiconductor chip provided with the aforesaid image sensor and a fourth semiconductor chip provided with an analog type nonvolatile memory array.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Makoto Motoyoshi
  • Patent number: 8941160
    Abstract: A photoelectric conversion module according to an embodiment of the present invention includes a plurality of units formed on a substrate and disposed parallel to each other, each including a plurality of photoelectric conversion cells formed in one direction, the plurality of units disposed in an orthogonal direction to the one direction, and a first separation region disposed between adjacent units of the units. In the solar cell module, each of the photoelectric conversion cells includes a second separation region, and the second separation region in one of the units is extended beyond the first separation region formed between one of the units and the other unit which is adjacent to the one of units toward a part of the other unit.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: January 27, 2015
    Assignee: KYOCERA Corporation
    Inventor: Koichiro Niira
  • Publication number: 20150015752
    Abstract: A solid-state image sensor provided with a plurality of pixels which photo-electrically convert an object image formed by an imaging optical system, wherein at least a portion of the plurality of pixels are ranging pixels in which a first photoelectric conversion unit, a barrier region and a second photoelectric conversion unit are provided in alignment in a first direction in this sequence; in the peripheral regions where are distanced from a straight line perpendicular to the first direction and passing through the center of the solid-state image sensor, for more than half of the ranging pixels, the barrier region is situated eccentrically in a direction parallel to the first direction.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 15, 2015
    Inventor: Aihiko Numata
  • Publication number: 20150014805
    Abstract: An image pickup module includes: an image pickup chip including a main surface on which a light-receiving portion of an image pickup device and a plurality of electrodes connected to the light-receiving portion are formed; and a wiring board including flying leads bonded to the respective plurality of electrodes.
    Type: Application
    Filed: October 2, 2014
    Publication date: January 15, 2015
    Applicant: OLYMPUS CORPORATION
    Inventor: Masashi YAMADA
  • Patent number: 8933530
    Abstract: An image sensor includes a substrate having a front side and a back side, an insulating structure containing circuits on the front side of the substrate, contact holes extending through the substrate to the circuits, respectively, and a plurality of pads disposed on the backside of the substrate, electrically connected to the circuits along conductive paths extending through the contact holes, and located directly over the circuits, respectively. The image sensor is fabricated by a process in which a conductive layer is formed on the back side of the substrate and patterned to form the pads directly over the circuits.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Kim, Young-Hoon Park
  • Patent number: 8921956
    Abstract: MEMS devices with a rigid backplate and a method of making a MEMS device with a rigid backplate are disclosed. In one embodiment, a device includes a substrate and a backplate supported by the substrate. The backplate includes elongated protrusions.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: December 30, 2014
    Assignee: Infineon Technologies AG
    Inventor: Alfons Dehe
  • Publication number: 20140374867
    Abstract: Described herein is a pinned photodiode pixel architecture having a p-type substrate that is independently biased with respect to a pixel area to provide an avalanche region between an n-type region and a p-type region formed on the substrate. Such a pinned photodiode pixel can be used in imaging sensors that are used in low light level conditions.
    Type: Application
    Filed: June 19, 2014
    Publication date: December 25, 2014
    Applicants: IMEC VZW
    Inventors: Koen De Munck, Tomislav Resetar
  • Publication number: 20140374866
    Abstract: A photo sensing chip and a manufacturing method thereof are disclosed. The photo sensing chip includes a silicon substrate and a plurality of photo sensors formed on the silicon substrate. The photo sensors include a first photo sensor and a second photo sensor. The first photo sensor has a first P-N junction and a first depletion region is formed at first P-N junction for receiving a first light band of an incident light to generate a first photo current. The second photo sensor has a second P-N junction and a second depletion region is formed at second P-N junction for receiving a second light band of the incident light to generate a second photo current. A first process parameter corresponds to the first depletion region and a second process parameter corresponds to the second depletion region, wherein the first process parameter and the second process parameter are different.
    Type: Application
    Filed: June 4, 2014
    Publication date: December 25, 2014
    Applicant: uPI semiconductor corp.
    Inventor: Ping-Yuan Lin
  • Patent number: 8916883
    Abstract: A light emitting device includes a light emitting structure comprising a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; a reflective layer formed under the light emitting structure; and a transparent supporting layer formed between the light emitting structure and the reflective layer, to emit a light generated from the active layer; and a conductive layer formed under the reflective layer, to surround the reflective layer.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: December 23, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hwan Hee Jeong, Sang Youl Lee
  • Patent number: 8916877
    Abstract: A thin film transistor (TFT) comprises: an active layer formed on a substrate; a gate insulating layer formed on the active layer; a gate electrode including a first gate region and a second gate region formed on portions of the gate insulating layer and spaced apart with a separation region interposed therebetween; an interlayer insulating layer formed on the gate insulating layer and the gate electrode, and having an opening formed to expose portions of the gate insulating layer and the gate electrode around the separation region; a gate connection electrode formed on the interlayer insulating layer and connected to the first gate region and the second gate region through the opening; and source and drain electrodes formed on the interlayer insulating layer. The TFT and the OLED display device have excellent driving margin without a spatial loss.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: December 23, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Ho Yang, Seung-Gyu Tae
  • Publication number: 20140367822
    Abstract: Systems and methods for dry eteching a photodetector array based on InAsSb are provided. A method for fabricating an array of photodetectors includes receiving a pattern of an array of photodetectors formed from InAsSb, the pattern including at least one trench defined between adjacent photodetectors, and dry etching the at least one trench with a plasma including BrCl3 and Ar.
    Type: Application
    Filed: June 17, 2013
    Publication date: December 18, 2014
    Inventor: Pierre-Yves Delaunay
  • Patent number: 8912615
    Abstract: The present invention is a photodiode or photodiode array having improved ruggedness for a shallow junction photodiode which is typically used in the detection of short wavelengths of light. In one embodiment, the photodiode has a relatively deep, lightly-doped P zone underneath a P+ layer. By moving the shallow junction to a deeper junction in a range of 2-5 ?m below the photodiode surface, the improved device has improved ruggedness, is less prone to degradation, and has an improved linear current.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: December 16, 2014
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20140361394
    Abstract: Disclosed is an integrated sensor chip package comprising an integrated sensor chip enveloped in a packaging layer (30), the integrated circuit comprising a substrate (10) having a major surface; and a light sensor comprising a plurality of photodetectors (12a-d) on a region of said major surface; the packaging layer comprising an opening (32) exposing said region, the integrated sensor chip package further comprising a light blocking member (20) over said opening, the light blocking member defining an aperture (22) exposing a first set of photodetectors to light from a first range of directions and exposing a second set of photodetectors to light from a second range of directions, wherein the first range is different to the second range. An apparatus including such an integrated sensor chip package and a method of manufacturing such an integrated sensor chip package are also disclosed.
    Type: Application
    Filed: June 9, 2014
    Publication date: December 11, 2014
    Applicant: NXP B.V.
    Inventors: Zoran Zivkovic, Coenraad Cornelis Tak
  • Publication number: 20140346539
    Abstract: The invention relates to a device comprising a substrate supporting a matrix (70) of diodes (Di) organised in rows and columns, and a peripheral substrate contact (75) is arranged on at least one side of the matrix (70), characterised in that the substrate comprises one or several buried conducting lines (73) having no direct electrical connection with the peripheral substrate contact and being positioned between at least two adjacent columns of diodes and between at least two adjacent rows of diodes.
    Type: Application
    Filed: May 20, 2014
    Publication date: November 27, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Laurent Mollard, Nicolas Baier, Johan Rothman
  • Publication number: 20140346632
    Abstract: A photodetector circuit is provided that includes: a first wiring connected to an input terminal; a second wiring connected to an output terminal; and first and second photosensors each including a first terminal connected to the first wiring and a second terminal connected to the second wiring, wherein the first wiring and the second wiring are arranged in parallel, and the sum of resistance values of a first path from the input terminal to the output terminal via the first wiring, the first photosensor, and the second wiring is identical to the sum of resistance values of a second path from the input terminal to the output terminal via the first wiring, the second photosensor, and the second wiring.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 27, 2014
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura
  • Patent number: 8895965
    Abstract: Provided is a photoelectric conversion element including a photoconductor containing a complex of a conductive polymer and/or polymer semiconductor and a protein containing at least one dye having a long-lived excited state.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Wei Luo, Yuichi Tokita, Yoshio Goto, Seiji Yamada, Satoshi Nakamaru