Abstract: An imaging device which can perform imaging with a global shutter system and in which transistors are shared by pixels is provided. The imaging device includes first and second photoelectric conversion elements and first to sixth transistors. Active layers of the first to fourth transistors each include an oxide semiconductor. The imaging device has a configuration in which a reset transistor and an amplifier transistor are shared by a plurality of pixels and can perform imaging with a global shutter system. In addition, the imaging device can be used as a high-speed camera.

Abstract: Provided is an ion sensor including a supporting substrate, a plurality of cells, a silicon substrate, a plurality of transistors, and an analog-digital conversion circuit. The plurality of cells, the plurality of transistors, and the analog-digital conversion circuit are provided above the supporting substrate. Each of the plurality of transistors has a corresponding gate provided on a first surface of the silicon substrate. The analog-digital conversion circuit is provided on the silicon substrate. The ion-sensing surface is provided on a second surface of the silicon substrate. The second surface is opposite to the first surface.

Abstract: A first surface of a first substrate included in a semiconductor device includes a first area in which a plurality of first connecting portions are disposed and a second area in which a plurality of second connecting portions are disposed. A second surface of a second substrate included in the semiconductor device includes a third area in which the plurality of first connecting portions are disposed and a fourth area in which the plurality of second connecting portions are disposed. The second area surrounds the first area on the first surface. The fourth area surrounds the third area on the second surface. A height of the second base electrode in a thickness direction of the first substrate is greater than a height of the first base electrode in the thickness direction.

Abstract: Structures that include thermoelectric couples and methods for fabricating such structures. A device level and a back-end-of-line (BEOL) interconnect structure are fabricated at a front side of a substrate. A thermoelectric couple is formed that is coupled with the substrate. The thermoelectric couple includes a first through-silicon via extending through the device level and the substrate to a back side of the substrate, a second through-silicon via extending through the device level and the substrate to the back side of the substrate, an n-type thermoelectric pillar coupled with the first through-silicon via, and a p-type thermoelectric pillar coupled with the second through-silicon via. The BEOL interconnect structure includes a wire that couples the first through-silicon via in series with the second through-silicon via.

Abstract: A photoelectric conversion device includes a photoelectric conversion unit including a first and second electrodes, a photoelectric conversion layer between the first and second electrodes, and an insulating layer between the photoelectric conversion layer and the second electrodes, an amplifier unit connected to the second electrode and outputs a signal generated in the photoelectric conversion unit, and a reset unit for resetting a voltage of the second electrode. An accumulating operation for accumulating signal charges in the photoelectric conversion unit and a charge removing operation for removing the signal charges from the photoelectric conversion unit are alternately executed in accordance with a voltage applied between the first and second electrodes, and the charge removing operation is executed multiple times between a first accumulating operation and a second accumulating operation which is executed after the first accumulating operation.

Abstract: A semiconductor device for converting incident light into an electric current includes a semiconductor substrate; an electrode embedded in the semiconductor substrate; an insulation film contacting the electrode in the semiconductor substrate; a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and a third semiconductor region of the first conductivity type, formed sequentially in a depth direction from a side of a front face of the semiconductor substrate; and a fourth semiconductor region of the second conductivity type contacting the insulation film and the second semiconductor region. An impurity concentration of the fourth semiconductor region is greater than an impurity concentration of the second semiconductor region.

Abstract: The present disclosure relates to a solid state imaging device in which, in phase difference pixels that do not include a light blocking layer for forming a phase difference, the phase difference detection characteristics can be made uniform regardless of the image height. Provided is a solid state imaging device including a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix configuration. Part of the pixels in the pixel array unit include a first photoelectric conversion element and a second photoelectric conversion element configured to receive and photoelectrically convert incident light. A center position of a light receiving characteristic distribution of the first photoelectric conversion element and a center position of a light receiving characteristic distribution of the second photoelectric conversion element are configured so as to be the same between a central portion and a peripheral portion of the pixel array unit.

Abstract: An imaging device having phototransistors in photodetectors of pixels is disclosed. The imaging device includes an implanted electrode configured to separate the pixels, a first emitter disposed at a position adjacent to the implanted electrode, and a second emitter disposed such that a distance from the implanted electrode to the second emitter is longer than a distance from the implanted electrode to the first emitter.

Abstract: A photoelectric conversion device has an insulator film disposed on a silicon layer having a photoelectric conversion region, the insulator film having a portion overlapped with the photoelectric conversion region, a silicon oxide film disposed on the insulator film, the silicon oxide film having a portion overlapped with the photoelectric conversion region, an electroconductive member disposed between the insulator film and the silicon oxide film, and a silicon oxide layer disposed between the electroconductive member and the silicon oxide film, in which the portion overlapped with the photoelectric conversion region of the silicon oxide film is in contact with the portion overlapped with the photoelectric conversion region of the insulator film and the hydrogen concentration of the silicon oxide film is greater than the hydrogen concentration of the silicon oxide layer.

Abstract: In an image pickup element, a plurality of unit pixels constituted by one micro lens and a photodiode arranged underneath the micro lens are arranged in rows and columns. The image pickup element includes first unit pixels in which a plurality of photodiodes are arranged underneath one micro lens, second unit pixels different from the first unit pixels, m first output lines per column from which signals of the first unit pixels are output, and n second output lines per column from which signals of the second unit pixels are output.

Abstract: A backside illuminated (BSI) image sensor device includes a device layer, a doped isolation region and a doped radiation sensing region. The device layer has a front side and a backside, in which the device layer has a thickness greater than or equal to 4 ?m. The doped isolation region having a first dopant of a first conductivity is through the device layer to define a plurality of pixel regions of the device layer, in which the doped isolation region includes a first upper region adjacent to the front side and a first lower region between the first upper region and the backside, and the first upper region has a width less than a width of the first lower region. The doped radiation sensing region having a second dopant of a second conductivity opposite to the first conductivity is in one of the pixel regions of the device layer.

Abstract: There is provided an imaging apparatus including: a lens group including one or more lens elements; and an image sensor having a light-receiving surface onto which an image of an object is formed by the lens group. The light-receiving surface of the image sensor is curved concavely toward the lens group. A distance from a lens surface closest to the light-receiving surface of the lens group to the light-receiving surface is a half or more of a distance from a lens surface closest to the object of the lens group to the light-receiving surface.

Abstract: A dummy trace portion is provided in a region between at least a suspension board with circuit on one end side and a support frame of a suspension board assembly sheet with circuits. A base insulating layer is formed on a support substrate in the dummy trace portion. A plurality of conductor traces are formed on the base insulating layer, and a cover insulating layer is formed on the base insulating layer to cover each conductor trace. At least one of the base insulating layer and the cover insulating layer in the dummy trace portion has a groove.

Abstract: An electro-optical device can include a plurality of nanocrystals positioned between a first electrode and a second electrode.

Abstract: A method for manufacturing a thin-film solar cell module includes a rear surface electrode layer deposition step for depositing a rear surface electrode layer on a substrate, an alkali metal adding step for adding an alkali metal to the rear surface electrode layer, a light absorbing layer deposition step for depositing a light absorbing layer on the rear surface electrode layer, a division groove forming step for forming a division groove that divides the light absorbing layer and exposing a front surface of the rear surface electrode layer in the division groove, an alloying step for alloying the rear surface electrode layer and the alkali metal on the front surface of the rear surface electrode layer exposed in the division groove, and a transparent conductive film deposition step for depositing a transparent conductive film on the light absorbing layer and in the division groove.

Abstract: A method of detecting a change in current is provided which includes irradiating light on at least one photoelectric conversion material layer, and detecting an increased change in current generated in the photoelectric conversion material layer. A photoelectric conversion apparatus is also provided and includes a photoelectric conversion element including a photoelectric conversion material layer, and a current detection circuit electrically connected to the photoelectric conversion element. In the photoelectric conversion apparatus, the current detection circuit detects an increased change in current generated in the photoelectric conversion material layer.

Abstract: An image processing apparatus that comprises a plurality of read out rows in an imaging unit of the apparatus. The imaging region comprises of a plurality of pixels which are equipped with color filters of the red, blue and green type. The apparatus comprises a controller configured to set a frame rate for a first row scanning unit and a second frame rate for a second row scanning unit. The apparatus is further configured to perform image interpolation and perform the auto focus, auto exposure, auto black white or the like functions and display an image with a high resolution on a display unit.

Abstract: Aspects relate to an integrated system that is electrically powered. The integrated system includes a circuit board and a photovoltaic device. The circuit board includes one or more on-board electronic components and an upper surface configured as a substrate. The photovoltaic device is integrally deposited on the upper surface of the circuit board and electrically connected to the one or more on-board electronic components, wherein the upper surface of the circuit board is a photovoltaic device substrate.

Abstract: An image sensor includes a row driver, a pixel array, an analog-to-digital converter, and an output compensating circuit. The row driver generates a photo-gate control signal, a storage control signal, a transfer control signal, a reset control signal and a row selecting signal. The pixel array includes a plurality of pixels, and each pixel uses a deep trench isolation (DTI) region as a photo gate. The pixel array receives optical signals, converts the optical signals to electric signals, and outputs the electric signals as image signals in response to the photo-gate control signal, the storage control signal, the transfer control signal, the reset control signal, and the row selecting signal. The analog-to-digital converter performs an analog-to-digital conversion on the image signals to generate first signals, and the output compensating circuit compensates the first signals.

Abstract: A sensor comprising a silicon substrate having a first and a second surface, integrated circuitry provided on the first surface of the silicon substrate, and a sensor structure provided on the second surface of the silicon substrate. The sensor structure and the integrated circuitry are electrically coupled to each other.

Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.

Abstract: The present invention provides an array substrate of LCD display and a manufacturing method thereof, the array substrate comprises a transparent substrate, gate lines and data lines which are disposed on the transparent substrate, wherein the array substrate further comprises: a transparent conducting bar and a gate short-circuit bar which are disposed on the transparent substrate, said transparent conducting bar is disposed below said gate short-circuit bar, said gate short-circuit bar and said data lines are arranged in a same layer. The present invention can avoid the problem of burning the gate short-circuit bar due to the occurrence of static discharge, the electrical defects in the array substrate can be normally detected and repaired in the array test process, thus the qualified product rate of the array substrate of LCD display is improved.

Abstract: A method of manufacturing a composite quantum-dot photodetector formed by alternatively dipping a substrate into a colloidal solution containing at least one type of a quantum dot, thereby forming a monolayer of the quantum dots and then dipping the substrate with the monolayer of the quantum dots into a ligand spacing solution to build a film of the quantum dots and then alternatively exposing the film of the quantum dots to a vapor and an infill material.

Abstract: A planar photodiode array including a useful layer made of CdxHg1-xTe. The useful layer includes at least two superimposed doped layers, each interface between two doped layers forming a single PN junction; the useful layer has at least one separation region, extending from the upper face of the useful layer, and separating at least two useful volumes while going through the PN junction; and beyond a predetermined depth in the useful layer, the average cadmium concentration in the useful volumes is less than the average cadmium concentration in the separation region.

Abstract: The present disclosure illustrates a pre-flash time adjusting circuit. The pre-flash time adjusting circuit comprises a first pre-flash time adjusting unit coupled to an image sensing array. The image sensing array comprises a plurality of pixel units. The first pre-flash time adjusting unit comprises a switching module and a storage capacitor. When the image sensing array senses a light beam, the switching module selectively connects a first switch and the storage capacitor, such that the storage capacitor starts to charge the first pixel units of the first pixel group, until base-emitter voltages of a plurality of bipolar junction transistors disposed in the first pixel units reaches a stable state.

Abstract: A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device forming regions in a semiconductor substrate; a process of forming an impurity-doped layer of a second conductivity type in each of the device forming regions; a process of forming a trench extending in a direction of thickness of the semiconductor substrate from a principal surface, at a position of a boundary between adjacent device forming regions, by etching to expose side faces of the device forming regions; a process of forming an insulating film on the exposed side faces of the device forming regions; a process of forming an electrode for each corresponding impurity-doped layer on the principal surface side of the semiconductor substrate; and a process of implementing singulation of the semiconductor substrate into the individual device forming regions.

Abstract: A photodetector includes a substrate and an insulating arrangement formed in the substrate. The insulating arrangement electrically insulates a confined region of the substrate. The confined region is configured to generate free charge carriers in response to an irradiation. The photodetector further includes a read-out electrode arrangement configured to provide a photocurrent formed by at least a portion of the free charge carriers that are generated in response to the irradiation. The photodetector also includes a biasing electrode arrangement that is electrically insulated against the confined region by means of the insulating arrangement. The biasing electrode arrangement is configured to cause an influence on a spatial charge carrier distribution within the confined region so that fewer of the free charge carriers recombine at boundaries of the confined region compared to an unbiased state.

Abstract: Apparatus and method for generating a wide dynamic range image by executing a pixel value combination process of a plurality of different exposure time setting pixels. Control of a different exposure time is performed for each of a plurality of pixels of the same colors configuring a pixel block and an addition pixel value obtained by adding outputs of the plurality of pixels of the same colors of the pixel block is generated. The generation of the addition pixel value is executed by an adding unit that adds the outputs of the plurality of pixels of the same colors of the pixel block. Or, the generation of the addition pixel value is executed by a floating diffusion set in a pixel block unit and a charge output from each of the plurality of pixels of the same colors configuring the pixel block is accumulated and output in the floating diffusion.

Abstract: A solid-state imaging device and the production method capable of effectively suppressing color mixture between sensor portions, and a camera provided with the solid-state imaging device are provided: wherein the solid-state imaging device includes a first conductivity type semiconductor substrate, a second conductivity type epitaxial layer formed on the first conductivity type semiconductor substrate, a first conductivity type sensor portion formed in the epitaxial layer, and an active element formed in the epitaxial layer and for reading charges obtained by photoelectric conversion at the sensor portion.

Abstract: A light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a buffer layer located in contact with the InP substrate, and a light-receiving layer having a multiple quantum well structure, the light-receiving layer having a cutoff wavelength of 3 ?m or more and being lattice-matched with the buffer layer. In the light receiving element, the buffer layer is epitaxially grown on the InP substrate while the buffer layer and the InP substrate exceed a range of a normal lattice-matching condition, and the buffer layer is constituted by a GaSb layer.

Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.

Abstract: The present application is directed to novel front side illuminated, back side contact photodiodes and arrays thereof. In one embodiment, the photodiode has a substrate with at least a first and a second side and a plurality of electrical contacts physically confined to the second side. The electrical contacts are in electrical communication with the first side through a doped region of a first type and a doped region of a second type, each of the regions substantially extending from the first side through to the second side. In another embodiment, the photodiode includes a wafer with at least a first and a second side; and a plurality of electrical contacts physically confined to the second side, where the electrical contacts are in electrical communication with the first side through a diffusion of a p+region through the wafer and a diffusion of an n+region through the wafer.

Abstract: A device includes a substrate carrying an array of diodes, organized in rows and columns, and a peripheral substrate contact is arranged on at least one side of the array. The substrate includes one or more buried conducting lines electrically connected to the peripheral substrate contact and being positioned between at least two neighboring columns of diodes and/or between at least two neighboring rows of diodes.

Abstract: This application relates to a photoelectric conversion apparatus which performs photoelectric conversion on incident light, a method for driving a photoelectric conversion apparatus, and an imaging system having a photoelectric conversion apparatus. The potential of one main node is prevented from approaching a predetermined potential which controls the voltage between a control node of a switch Metal Oxide Semiconductor (MOS) transistor and the one main node of the switch MOS transistor within a threshold voltage in a period when the predetermined potential is given and a signal based on the charge in the photoelectric converting unit is given to the one input node.

Abstract: Semiconductor avalanche photo transistors and methods of manufacturing the same, operable for internal amplification of a photo signal and for use in detection of weak light signals, gamma rays and nuclear particles. The multi-pixel avalanche photo transistor devices can comprise a semiconductor layer, a plurality of semiconductor areas (pixels) forming a p-n-junction with the semiconductor layer, a common conductive grid separated from the semiconductor layer by a dielectric layer and individual micro-resistors connected to said semiconductor areas with the common conductive grid. Systems and methods described can be operable to decrease optical crosstalk at high signal amplification and the special capacity of the multi-pixel avalanche photo transistor, as well as improve speed of its photo response.

Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.

Abstract: A solid-state imaging element includes pixel cells in which apertures of light shielding films are off-centered in opposite directions. The pixel cells includes a pixel cell which detects a R light component, a pixel cell which detects a G light component, and a pixel cell which detects a B light component. In the pixel cells, a relationship among an off-centered amount Or of the aperture in the pixel cell which detects the R light component, an off-centered amount Og of the aperture in the pixel cell which detects the G light component, and an off-centered amount Ob of the aperture in the pixel cell which detects the B light component is Or>Og>Ob.

Abstract: Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.

Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.

Abstract: A solid-state image pick-up device is provided which includes a semiconductor substrate main body which has an element forming layer and a gettering layer provided on an upper layer thereof; photoelectric conversion elements, each of which includes a first conductive type region, provided in the element forming layer; and a dielectric film which is provided on an upper layer of the gettering layer and which induces a second conductive type region in a surface of the gettering layer.

Abstract: A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.

Abstract: It is an object to provide a gas sensor which is formed by a simple manufacturing process. Another object is to provide a gas sensor whose manufacturing cost is reduced. A transistor which includes an oxide semiconductor layer in contact with a gas and which serves as a detector element of a gas sensor, and a transistor which includes an oxide semiconductor layer in contact with a film having a gas barrier property and which forms a detection circuit are formed over one substrate by the same process, whereby a gas sensor using these transistors may be formed.

Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element including a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with at least one through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the one electrode is exposed out of the one through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of embedding a conductive member in the through hole after the third step.

Abstract: An infrared sensor device includes a semiconductor substrate, at least one sensor element that is micromechanically formed in the semiconductor substrate, and at least one calibration element, which is micromechanically formed in the semiconductor substrate, for the sensor element. An absorber material is arranged on the semiconductor substrate in the area of the sensor element and the calibration element. One cavern each is formed in the semiconductor substrate substantially below the sensor element and substantially below the calibration element. The sensor element and the calibration element are thermally and electrically isolated from the rest of the semiconductor substrate by the caverns. The infrared sensor device has high sensitivity, calibration functionality for the sensor element, and a high signal-to-noise ratio.

Abstract: An active matrix image sensing panel includes a substrate and an image sensing pixel. The image sensing pixel is disposed on the substrate and includes a data line, a first thin film transistor (TFT) device and a second TFT device. The first TFT device includes a first electrode, a second electrode and a first gate electrode. The second electrode is coupled to the data line through a first via. The second TFT device includes a third electrode, a fourth electrode and a second gate electrode. The fourth electrode is electrically connected to the data line through a second via. The second electrode and the fourth electrode are connected with each other and overlap the data line.

Abstract: An image sensor package may include: a package substrate including a chip attachment area on an upper surface thereof, a pad area having a plurality of pads around the chip attachment area, and a holder attachment area at an outside of the pad area, wherein an upper surface of the holder attachment area is at a lower level than an upper surface of the pad area; an image sensor chip mounted on the chip attachment area of the package substrate; a transparent member above the package substrate and configured to cover the image sensor chip; and a holder on the holder attachment area of the package substrate and configured to fix the transparent member.

Abstract: A dual pixel-size color image sensor, including an imaging surface, for imaging of incident light, and a plurality of color pixels, each color pixel including (a) four large photosites, including two large first-color photosites sensitive to a first color of the incident light, and (b) four small photosites including two small first-color photosites sensitive to the first color of the incident light. The large and small first-color photosites are arranged such that connected regions of the imaging surface, not associated with large and/or small first-color photosites, are not continuous straight lines. A method for manufacturing a color filter array on an imaging surface of a dual pixel-size image sensor includes forming a first-color coating on first portions of the imaging surface to form large and small first-color photosites sensitive to a first color, wherein connected portions of the imaging surface, different from the first portions, are not continuous straight lines.

Abstract: Photo-field-effect transistor devices and associated methods are disclosed in which a photogate, consisting of a quantum dot sensitizing layer, transfers photoelectrons to a semiconductor channel across a charge-separating (type-II) heterointerface, producing a sustained primary and secondary flow of carriers between source and drain electrodes. The light-absorbing photogate thus modulates the flow of current along the channel, forming a photo-field effect transistor.

Abstract: Embodiments of the present disclosure include an image sensor device and methods of forming the same. An embodiment is an image sensor device including a first plurality of pickup regions in a photosensor array area of a substrate, each of first plurality of pickup regions having a first width and a first length, a second plurality of pickup regions in a periphery area of the substrate, the periphery area along at least one side of the photosensor array area, each of second plurality of pickup regions having a second width and a second length.

Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.