Abstract: In a resist reflow measurement key, and method of fabricating a fine pattern of a semiconductor device using the same, the resist reflow measurement key includes a first reflow key including a plurality of first pattern elements each having a first pattern with a first radius of curvature located on a first side of a first center line and a second pattern with a second radius of curvature located on a second side of the first center line, and a second reflow key including a plurality of second pattern elements each having a third pattern with a third radius of curvature located on a first side of a second center line and a fourth pattern with a fourth radius of curvature located on a second side of the second center line, the second reflow key being formed on a same plane of a substrate as the first reflow key.

Abstract: Disclosed herein is a method for manufacturing a semiconductor device that includes performing an O2 plasma treatment step after forming a Si-containing photoresist film.

Abstract: According to a method of manufacturing a thin-film transistor (TFT) substrate, a gate insulation layer, a semiconductor layer, an ohmic contact layer, and a data metal layer are sequentially formed on a substrate. A photoresist pattern is formed in a source electrode area and a drain electrode area. A data metal layer is etched using the photoresist pattern as an etch-stop layer to form a data wire including a source electrode and a drain electrode. A photoresist pattern is reflowed to cover a channel region between a source electrode and the drain electrode. An ohmic contact layer and the semiconductor layer are etched using the reflowed photoresist pattern as an etch-stop layer to form an active pattern including an ohmic contact pattern and a semiconductor pattern. The reflowed photoresist pattern is etched back to expose a portion of the ohmic contact pattern in the channel region. The ohmic contact pattern is etched using the etched-back photoresist pattern as an etch-stop layer.

Abstract: A method for forming a fine photoresist pattern of a semiconductor device, the method comprising the steps of forming a chemically amplified photoresist film over an underlying layer formed over a semiconductor substrate to form a first photoresist pattern; exposing the first photoresist pattern without exposure mask to bake the resulting structure; and flowing the photoresist of the first photoresist pattern to obtain a second photoresist pattern.

Abstract: A plasma processing operation uses a gas mixture of N2 and H2 to both remove a photoresist film and treat a low-k dielectric material. The plasma processing operation prevents degradation of the low-k material by forming a protective layer on the low-k dielectric material. Carbon from the photoresist layer is activated and caused to complex with the low-k dielectric, maintaining a suitably high carbon content and a suitably low dielectric constant. The plasma processing operation uses a gas mixture with H2 constituting at least 10%, by volume, of the gas mixture.

Abstract: The present invention relates to a method for removing residues from open areas of a patterned substrate involving the steps of providing a layer of a developable anti-reflective coating (DBARC) over a substrate; providing a layer of a photoresist over said DBARC layer; pattern-wise exposing said photoresist layer and said DBARC layer to a radiation; developing said photoresist layer and said DBARC layer with a first developer to form patterned structures in said photoresist and DBARC layers; depositing a layer of a developer soluble material over said patterned structures; and removing said developer soluble material with a second developer.

Abstract: Methods for circuit material processing are provided. In at least one such method, a substrate is provided with a plurality of overlying spacers. The spacers have substantially straight inner sidewalls and curved outer sidewalls. An augmentation material is formed on the plurality of spacers such that the inner or the outer sidewalls of the spacers are selectively expanded. The augmentation material can bridge the upper portions of pairs of neighboring inner sidewalls to limit deposition between the inner sidewalls. The augmentation material is selectively etched to form a pattern of augmented spacers having a desired augmentation of the inner or outer sidewalls. The pattern of augmented spacers can then be transferred to the substrate through a series of selective etches such that features formed in the substrate achieve a desired pitch.

Abstract: A non-volatile memory device includes a semiconductor substrate including a cell array region and a peripheral circuit region. A first cell unit is on the semiconductor substrate in the cell array region, and a cell insulating layer is on the first cell unit. A first active body layer is in the cell insulating layer and over the first cell unit, and a second cell unit is on the first active body layer. The device further includes a peripheral transistor on the semiconductor substrate in the peripheral circuit region. The peripheral transistor has a gate pattern and source/drain regions, and a metal silicide layer is on the gate pattern and/or on the source/drain regions of the peripheral transistor. A peripheral insulating layer is on the metal silicide layer and the peripheral transistor, and an etching protection layer is between the cell insulating layer and the peripheral insulating layer and between the metal silicide layer and the peripheral insulating layer.

Abstract: A photoresist composition includes; a novolac resin prepared from a phenol compound, wherein the m-cresol constitutes about 70% to about 85% by weight of the weight of the phenol compound, a diazide compound, and an organic solvent.

Abstract: A thin film of organic resin material (17), such as novolac, is used as an etch mask and openings (32) are formed in the mask in a predetermined pattern to allow processing in selected areas defined by the openings. The openings (32) are formed by applying a pattern of droplets (76) of caustic etchant, such as sodium hydroxide (NaOH) or potassium hydroxide (KOH) in the areas where the openings are to be formed. The droplets (76) are applied using a inkjet printer (90) which is scanned over the surface of the organic resin as the droplets are applied. The droplets (76) are of a size which defines the dimension of the openings (32) and allows the organic resin (17) under the droplet (76) to be completely removed. After the etchant has etched through the organic resin to expose an underlying surface (12), the etchant is washed from the organic resin and the openings (32).

Abstract: Embodiments relate to a method for forming a wiring in a semiconductor device, that may include laminating a conductive layer for wiring formation on a semiconductor substrate, forming a photoresist layer pattern on the conductive layer, performing primary dry etching for the conductive layer after employing the photoresist layer pattern as a mask, thereby forming a wiring pattern, partially removing the photoresist layer pattern through secondary dry etching, thereby forming a passivation layer on a surface of the wiring pattern, performing tertiary dry etching for the wiring pattern and a diffusion barrier after employing the photoresist layer pattern as a mask, thereby forming a metal wiring, and removing the photoresist layer pattern.

Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

Abstract: A method of forming a pattern of a semiconductor device comprises forming a first hard mask film, a first resist film, and a second hard mask film over an underlying layer of a semiconductor substrate; forming a second resist pattern over the second hard mask film; etching the second hard mask film using the second resist pattern as an etching mask to form a second hard mask pattern; performing an ion-implanting process on the first resist film with the second hard mask pattern as an ion implanting mask to form an ion implanting layer in a portion of the first resist film, and selectively etching the first resist film with the second hard mask pattern and an ion implanting layer as an etching mask to form a first resist pattern.

Abstract: System and method for direct etching. According to an embodiment, the present invention provides a method for manufacturing an integrated circuit device. The method includes a step for providing a substrate having a contact region, which is provided between a first word line and a second word line. The contact region has an overlying plug structure, which is provided within a thickness of a first dielectric layer. The first dielectric layer includes a portion overlying the plug structure. The first dielectric layer has a planarized surface region. The method also includes a step for forming a first line and a second line and a space provided between the first word line and the second world line. The space is provided within a region overlying the plug structure.

Abstract: Provided is a method of manufacturing a nitride-based semiconductor light-emitting device having an improved structure in which optical extraction efficiency is improved. The method of manufacturing a nitride-based semiconductor light-emitting device including an n-doped semiconductor layer, an active layer, a p-doped semiconductor layer, an n-electrode and a p-electrode includes: forming an azobenzene-functionalized polymer film on a base layer by selecting one layer from the group consisting of the n-doped semiconductor layer, the p-doped semiconductor layer, the n-electrode and the p-electrode as the base layer; forming surface relief gratings of a micro-pattern caused by a photophysical mass transport property of azobenzene-functionalized polymer by irradiating interference laser beams onto the azobenzene-functionalized polymer film; forming a photonic crystal layer using a metal oxide on a recessed gap of the azobenzene-functionalized polymer film, and removing the azobenzene-functionalized polymer film.

Abstract: A method of creating metal caps on copper lines within an inter-line dielectric (ILD) deposits a thin (e.g., 5 nm) metal blanket film (e.g., Ta/TaN) on top the copper lines and dielectric, after the wafer has been planarized. Further a thin dielectric cap is formed over the metal blanket film. A photoresist coating is deposited over the thin dielectric cap and a lithographic exposure process is performed, but without a lithographic mask. A mask is not needed in this situation, because due to the reflectivity difference between copper and the ILD lying under the two thin layers, a mask pattern is automatically formed for etching away the Ta/TaN metal cap between copper lines. Thus, this mask pattern is self-aligned above the copper lines.

Abstract: A method of lithography patterning includes forming a first material layer on a substrate, the first material layer being substantially free of silicon, and forming a patterned resist layer including at least one opening therein above the first material layer. A second material layer containing silicon is formed on the patterned resist layer and an opening is formed in the first material layer using the second material layer as a mask.

Abstract: Embodiments relate to a semiconductor device mask in which an optical proximity correction (OPC) process is performed to compensate for varying degrees of planarization of a lower layer and a method of forming a mask pattern. In embodiments, a method of forming a semiconductor device mask includes dividing a semiconductor substrate into a plurality of local regions. Densities of patterns of the local regions are determined. A degree of dishing of the local regions is also determined. The local regions are classified into a first group in case where the degree dishing of the local regions are within an error range and a second group in case where the degree of dishing of the local regions exceed the error range. A mask data preparation process is performed with a size retrieved from a basic database in the first group. A mask data preparation sizing rule different from the mask data preparation process is applied to the second group.

Abstract: Methods of fabricating a microelectromechanical structure are provided. An exemplary embodiment of a method of fabricating a microelectromechanical structure comprises providing a substrate. A first patterned sacrificial layer is formed on portions of the substrate, the first patterned sacrificial layer comprises a bulk portion and a protrusion portion. A second patterned sacrificial layer is formed over the first sacrificial layer, covering the protrusion portion and portions of the bulk portion of the first patterned sacrificial layer, wherein the second patterned sacrificial layer does not cover sidewalls of the first patterned sacrificial layer. An element layer is formed over the substrate, covering portions of the substrate, the first patterned sacrificial layer and second patterned sacrificial layer. The first and second patterned sacrificial layers are removed, leaving a microstructure on the substrate.

Abstract: Disclosed are radiation-resistant zone plates for use in laser-produced plasma (LPP) devices, and methods of manufacturing such zone plates. In one aspect, a method of manufacturing a zone plate provides for forming a masking layer over a supporting membrane, and creating openings through the masking layer in a diffractive grating pattern. Such a method also provides depositing radiation absorbent material in the openings in the masking layer and on the supporting membrane, and then stripping the remaining portions of the masking layer. Then, portions of the supporting membrane not covered by the absorbent material are removed, wherein the remaining portions of the supporting membrane covered by the absorbent material form separate grates. Also in such methods, cross-members are coupled to the grates for holding positions of the grates with respect to each other.

Abstract: In a resist reflow measurement key, and method of fabricating a fine pattern of a semiconductor device using the same, the resist reflow measurement key includes a first reflow key including a plurality of first pattern elements each having a first pattern with a first radius of curvature located on a first side of a first center line and a second pattern with a second radius of curvature located on a second side of the first center line, and a second reflow key including a plurality of second pattern elements each having a third pattern with a third radius of curvature located on a first side of a second center line and a fourth pattern with a fourth radius of curvature located on a second side of the second center line, the second reflow key being formed on a same plane of a substrate as the first reflow key.

Abstract: A method for forming a self-aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material being either photo or thermally sensitive; performing a blanket exposure of the substrate; and allowing at least a portion of the masking material to preferential develop in a fashion that is replicates the existing pattern of the substrate. The existing pattern may be comprised of a first set of regions of the substrate having a first reflectivity and a second set of regions of the substrate having a second reflectivity different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. Structures made in accordance with the method.

Abstract: A method of reducing critical dimensions of a feature in a anti-reflective coating layer structure can utilize a polymerizing agent. The anti-reflective coating structure can be utilized to form various integrated circuit structures. The anti-reflective coating can be utilized to form gate stacks comprised of polysilicon and a dielectric layer, conductive lines, or other IC structure. The polymerizing agent can include carbon, hydrogen and fluorine.

Abstract: A method of manufacturing a field emission device (FED) using a photoresist for performing multi-patterning processes, whereby different structures can be multi-patterned using a single photoresist mask. The photoresist has a solubility to a solvent by post-exposure heat-treatment, and a complicated structure can be formed using the photoresist.

Abstract: A method of processing a substrate, comprising forming a chemically amplified resist film on a substrate, irradiating energy beams to the chemically amplified resist film to form a latent image therein, carrying out heat treatment with respect to the chemically amplified resist film, heating treatment being carried out in a manner of relatively moving a heating section for heating the chemically amplified resist film and the substrate forming a gas stream flowing reverse to the relatively moving direction of the heating section between the lower surface of the heating section and the chemically amplified resist film.

Abstract: A method for smoothing areas of a structure made of a first material having a predetermined first glass transition temperature on a carrier includes the steps of: (1) applying a second material having a predetermined second glass transition temperature, so that the surface of the structure of the first material is at least partially covered by the second material; (2) increasing the temperature of the first material to a first predeterminable temperature, which is greater than the first glass transition temperature; and (3) lowering the temperature of the first material below the first glass transition temperature of the first material.

Abstract: An ion implanting method includes forming a pair of spaced and adjacent features projecting outwardly from a substrate. At least outermost portions of the pair of spaced features are laterally pulled away from one another with a patterned photoresist layer received over the features and which has an opening therein received intermediate the pair of spaced features. While such spaced features are laterally pulled, a species is ion implanted into substrate material which is received lower than the pair of spaced features. After the ion implanting, the patterned photoresist layer is removed from the substrate. Other aspects and implementations are contemplated.

Abstract: Methods of fabricating a microelectromechanical structure are provided. An exemplary embodiment of a method of fabricating a microelectromechanical structure comprises providing a substrate. A first patterned sacrificial layer is formed on portions of the substrate, the first patterned sacrificial layer comprises a bulk portion and a protrusion portion. A second patterned sacrificial layer is formed over the first sacrificial layer, covering the protrusion portion and portions of the bulk portion of the first patterned sacrificial layer, wherein the second patterned sacrificial layer does not cover sidewalls of the first patterned sacrificial layer. An element layer is formed over the substrate, covering portions of the substrate, the first patterned sacrificial layer and second patterned sacrificial layer. The first and second patterned sacrificial layers are removed, leaving a microstructure on the substrate.

Abstract: A method of processing a substrate, comprising forming a chemically amplified resist film on a substrate, irradiating energy beams to the chemically amplified resist film to form a latent image therein, carrying out heat treatment with respect to the chemically amplified resist film, heating treatment being carried out in a manner of relatively moving a heating section for heating the chemically amplified resist film and the substrate forming a gas stream flowing reverse to the relatively moving direction of the heating section between the lower surface of the heating section and the chemically amplified resist film.

Abstract: A reflow method includes preparing a to-be-processed object, which includes a first layer, a second layer formed in an upper layer to the first layer, and a resist film, which is directly on the second layer and has a pattern allowing formation of an exposure region in which the first layer is exposed and a coverage region in which the first layer is covered, wherein said resist film has an end thereof protruding out further above the exposure region than the edge of the second layer. The resist film has a shape protruding out further above the exposure region than the edge of the second layer. The method also includes covering a part or all of the exposure region by softening and reflowing the resist film.

Abstract: A method for removing mottled etch in a semiconductor fabricating process, prevents mottled etch from being generated after etching, by performing ashing using an oxide plasma, prior to performing wet etching using a photoresist pattern. The method for removing the mottled etch includes the steps of forming a gate oxide film on a semiconductor substrate; forming a photoresist pattern on the substrate; performing ashing using an oxygen plasma; and removing the oxide film consequently by wet etching, the oxide film being opened by the pattern.

Abstract: A method for forming a semiconductor device having a reduced pitch is provided. The method includes providing a substrate, forming a material layer over the substrate, forming a photoresist layer over the material layer, exposing a top surface of the photoresist layer to radiation, and forming a silylated layer over the photoresist layer. The method further includes removing a portion of the silylated layer to expose the photoresist layer, removing the photoresist layer, removing portions of the material layer using the silylated layer as a mask, and removing another portion of the silylated layer.

Abstract: An isotropic-diffusion filling method uses a thermal process on a result structure comprising a photoresist layer and an organic material layer to create a cross-linking layer there between, which minimizes step height differences between isolated and dense via-pattern regions for optimizing a subsequent trench process and simplifying process steps.

Abstract: A method of forming a feature in a low-k dielectric layer is provided. A low-k dielectric layer is placed over a substrate. A patterned photoresist mask is placed over the low-k dielectric layer. At least one feature is etched into the low-k dielectric layer. A CO conditioning is preformed on the at least one feature after the at least one feature is etched. The patterned photoresist mask is stripped after the CO conditioning.

Abstract: A semiconductor device is made by patterning a conductive layer for forming gates of transistors. The process for forming the gates has a step of patterning photoresist that overlies the conductive layer. The patterned photoresist is trimmed so that its width is reduced. Fluorine, preferably F2, is applied to the trimmed photoresist to increase its hardness and its selectivity to the conductive layer. Using the trimmed and fluorinated photoresist as a mask, the conductive layer is etched to form conductive features useful as gates. Transistors are formed in which the conductive pillars are gates. Other halogens, especially chlorine, may be substituted for the fluorine.

Abstract: A high-precision patterning is conducted with a half-tone resist thickness being prevented from varying due to the presence/absence of a base film. A transmitting portion and two kinds of semi-transmitting portions, providing different quantities of transmitted light, are provided in a photomask for exposing a resist, and a smaller-transimitting-light-quantity semi-transmitting portion is used in a base film-present area and a large-transmitting light-quantity semi-transmitting portion is used in a base-film-free area to regulate luminous exposure while exposing, thereby forming a half-tone resist having uniform thickness.

Abstract: A method of manufacturing an organic electroluminescent display device, an organic electroluminescent display device, and a display device equipped with an organic electroluminescent display device are provided that enable a microlens to be formed without affecting an organic luminescent layer during the manufacturing process and to easily manufacture an organic electroluminescent display device with increased light output efficiency. According to the method, a lens pattern corresponding to a microlens that refracts the light from an organic luminescent layer is formed by performing photolithography treatment on a first transparent resin film formed on a substrate, and the microlens is formed by performing reflow treatment on the lens pattern.

Abstract: A silicone hyper-branched polymer surfactant is included in a rinsing solution which may be used to remove photoresist residues.