Abstract: After trench line pattern openings and via pattern openings are formed in a inter-metal dielectric insulation layer of a semiconductor wafer using trench-first dual damascene process, the wafer is wet cleaned in a single step wet clean process using a novel wet clean solvent composition. The wet clean solvent effectively cleans the dry etch residue from the plasma etching of the dual damascene openings, etches back the TiN hard mask layer along the dual damascene openings and forms a recessed surface at the conductor metal from layer below exposed at the bottom of the via openings of the dual damascene openings.

Abstract: A spin-on formulation that is useful in stripping an ion implanted photoresist is provided that includes an aqueous solution of a water soluble polymer containing at least one acidic functional group, and at least one lanthanide metal-containing oxidant. The spin-on formulation is applied to an ion implanted photoresist and baked to form a modified photoresist. The modified photoresist is soluble in aqueous, acid or organic solvents. As such one of the aforementioned solvents can be used to completely strip the ion implanted photoresist as well as any photoresist residue that may be present. A rinse step can follow the stripping of the modified photoresist.

Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit which holds a semiconductor substrate with a surface having a convex pattern formed thereon and rotates the semiconductor substrate, a first supply unit which supplies a chemical and/or pure water to the surface of the semiconductor substrate, and a second supply unit which supplies a diluted water repellent to the surface of the semiconductor substrate to form a water-repellent protective film on the surface of the convex pattern. The second supply unit comprises a buffer tank which stores the water repellent, a first supply line which supplies a purge gas to the buffer tank, a second supply line which supplies a diluent, a pump which sends off the water repellent within the buffer tank, a third supply line which supplies the water repellent sent off from the pump, and a mixing valve which mixes the diluent and the water repellent to produce the diluted water repellent.

Abstract: After a water film is formed on a wafer front surface in a chamber, the water film is supplied sequentially with an oxidizing component of an oxidation gas, an organic acid component of an organic acid mist, an HF component of an HF gas, the organic acid mist, and the oxidizing component of the oxidation gas. As a result, the HF component and the organic acid component provide cleaning effect on the wafer surface, and a concentration of the cleaning components in the water film within a wafer surface can be even.

Abstract: A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist (114) which includes resist openings formed (117) over the active circuit areas (13, 14) as well as additional resist openings (119) formed over inactive areas (15) in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings (119) are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures (e.g., 152) for use in manufacturing the final structure.

Abstract: Even for the case where a CVD oxide film is interposed at a bonding interface, as a pre-processing of bonding a first wafer and a second wafer, at least the surface roughness of the CVD oxide film of the first wafer is made small after removing organic substances. Therefore, it is possible to prevent void occurrence which is caused by the organic substances existing at and the roughness of the bonding interface of the two wafers.

Abstract: A cleaning composition for removing plasma etching residue and/or ashing residue formed above a semiconductor substrate is provided that includes (component a) water, (component b) a hydroxylamine and/or a salt thereof, (component c) a basic organic compound, and (component d) an organic acid and has a pH of 7 to 9. There are also provided a cleaning process and a process for producing semiconductor device employing the cleaning composition.

Abstract: The present invention provides an interconnect structure which has a high leakage resistance and substantially no metallic residues and no physical damage present at an interface between the interconnect dielectric and an overlying dielectric capping layer. The interconnect structure of the invention also has an interface between each conductive feature and the overlying dielectric capping layer that is substantially defect-free. The interconnect structure of the invention includes a non-plasma deposited dielectric capping layer which is formed utilizing a process including a thermal and chemical-only pretreatment step that removes surface oxide from atop each of the conductive features as well as metallic residues from atop the interconnect dielectric material. Following this pretreatment step, the dielectric capping layer is deposited.

Abstract: There is provided a method for cleaning a semiconductor device capable of making compatible the inhibition of dissolution of a gate metal material and the acquisition of a favorable contact resistance.

Abstract: A method and system for removing volatile residues from a substrate are provided. In one embodiment, the volatile residues removal process is performed en-routed in the system while performing a halogen treatment process on the substrate. The volatile residues removal process is performed in the system other than the halogen treatment processing chamber and a FOUP. In one embodiment, a method for volatile residues from a substrate includes providing a processing system having a vacuum tight platform, processing a substrate in a processing chamber of the platform with a chemistry comprising halogen, and treating the processed substrate in the platform to release volatile residues from the treated substrate.

Abstract: In a production method for a semiconductor device relating to the present invention, first, a pattern of a resist film made of organic polymers is formed on a semiconductor substrate. Next, impurity ions with 1×1014 cm?2 or greater of dose amount are implanted into the semiconductor substrate using the resist film pattern as a mask. The resist film pattern mask is removed sequentially through an oxidation treatment, swelling treatment and removal treatment. In the oxidation treatment, a treatment to oxidize a hardened layer formed in a surface portion of the resist film pattern by the ion implantation is implemented. In the swelling treatment, a treatment to swell the organic polymers composing the resist film pattern where the hardened layer has been oxidized using a chemical solution is implemented. In the removal treatment, the swollen resist film pattern is removed using the chemical solution used for the swelling treatment.

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method of processing a substrate may include providing a substrate having at least one of a defect or a contaminant disposed on or near a surface of the substrate; and selectively annealing a portion of the substrate with a laser beam in the presence of a process gas comprising hydrogen. The laser beam may be moved over the substrate or continuously, or in a stepwise fashion. The laser beam may be applied in a continuous wave or pulsed mode. The process gas may further comprise an inert gas, such as, at least one of helium, argon, or nitrogen. A layer of material may be subsequently deposited atop the annealed substrate.

Abstract: The present invention relates to control of copper contamination to semiconductor substrates upon operation of a heat treatment apparatus which is a semiconductor manufacturing apparatus and which is constructed with quartz products having been contaminated with copper when machined. The quartz product is placed in a heating atmosphere on the stage where it is not still used for a heat treatment for semiconductor substrates. Baking gases including a hydrogen chloride gas and a gas for enhancing activity of the hydrogen chloride gas, for example, an oxygen gas, are then supplied to the quartz product. Consequently, the copper concentration in the region from the surface to the 30 ?m depth of the quartz product can be controlled below 20 ppb, preferably below 3 ppb. The baking process may be carried out before or after assembling the quartz product into the heat treatment apparatus.

Abstract: A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for epitaxial growth. The process includes cleaning the hydrophobic surface of the semiconductor substrate with an aqueous solution containing hydrofluoric acid (HF) and an additional acid having a pKa of less than 3, preferably hydrochloric acid (HCl), wherein the additional acid is present in the solution at a concentration by weight that is less than that of the HF; and final rinsing the cleaned hydrophobic surface of the semiconductor substrate with deionised water while subjecting the hydrophobic surface of the semiconductor substrate to megasonic waves for a time sufficient to reduce or suppress watermarks that could otherwise occur on the hydrophobic surface if the megasonic waves were not applied.

Abstract: One embodiment of the present invention is a method for cleaning an electron beam treatment apparatus that includes: (a) generating an electron beam that energizes a cleaning gas in a chamber of the electron beam treatment apparatus; (b) monitoring an electron beam current; (c) adjusting a pressure of the cleaning gas to maintain the electron beam current at a substantially constant value; and (d) stopping when a predetermined condition has been reached.

Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.

Abstract: The present invention relates to methods of fabricating semiconductor devices, including forming a trench in a semiconductor substrate by a reactive ion etching (RIE) method with a reactive product of film stack of a carbon film/silicon oxide film/carbon-containing silicon oxide film, the trench having an inner surface; and removing the reactive product, by treating the trench with diluted hydrofluoric acid to remove the carbon film and the silicon oxide film followed by treating the film by a hydrofluoric acid vapor phase cleaning (HFVPC) method to remove the carbon-containing silicon oxide film.

Abstract: A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.

Abstract: The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first silicon layer by an in-situ deposition process, patterning the first silicon layer to remove a portion overlying the second region, patterning the first metal layer using the patterned first silicon layer as a mask, and removing the patterned first silicon layer including applying a solution. The solution includes a first component having an [F-] concentration greater than 0.01M, a second component configured to adjust a pH of the solution from about 4.3 to about 6.7, and a third component configured to adjust a potential of the solution to be greater than ?1.4 volts.

Abstract: A composition for cleaning and corrosion inhibition which is used in a step of manufacturing a semiconductor device or a display device having a copper-containing metallic wiring is provided, wherein the corrosion inhibitor component is any one of pyrazole, a pyrazole derivative such as 3,5-dimethylpyrazole, a triazole derivative such as 1,2,4-triazole, an aminocarboxylic acid such as iminodiacetic acid or ethylenediaminedipropionic acid hydrochloride, or a disulfide compound such as diisopropyl disulfide or diethyl disulfide; and the cleaning agent component is any one of ammonium fluoride, tetramethylammonium fluoride, ammonium acetate, acetic acid, glyoxylic acid, oxalic acid, ascorbic acid, 1,2-diaminopropane or dimethylacetamide. Also, a method for manufacturing a semiconductor device or the like using the composition for cleaning and corrosion inhibition is provided.

Abstract: A method of cleaning for removing metal compounds attached to a surface of a substrate, wherein the cleaning is conducted by supplying a supercritical fluid of carbon dioxide comprising at least one of triallylamine and tris(3-aminopropyl)amine to the surface of the substrate and a process for producing a semiconductor device using the method of cleaning are provided. In accordance with the method of cleaning and the method for producing a semiconductor device using the method, etching residues or polishing residues containing metal compounds are efficiently removed selectively from the electroconductive material forming the electroconductive layer. When the electroconductive layer is a wiring, an increase in resistance due to residual metal compounds can be suppressed, and an increase in the leak current due to diffusion of the metal from the metal compounds to the insulating film can be prevented. Therefore, reliability on the wiring is improved, and the yield of the semiconductor device can be increased.

Abstract: Methods and apparatuses for removing polysilicon material from a semiconductor workpiece are disclosed. A particular method includes contacting a polishing pad with a semiconductor workpiece having a surface polysilicon material. The method also includes disposing a polishing liquid between the polysilicon material and the polishing pad. The polishing liquid contains an oxidizer that does not include metal elements. The method further includes moving at least one of the semiconductor workpiece and the polishing pad relative to the other while the semiconductor workpiece contacts the polishing pad and the polishing liquid. At least some of the polysilicon material is removed while the polysilicon material contacts the oxidizer in the polishing liquid, as at least one of the semiconductor workpiece and the polishing pad moves relative to the other.

Abstract: A method that includes forming a gate of a semiconductor device on a substrate, and etching sidewall spacers on sides of the gate to provide a proximity value, where the proximity value is defined as a distance between the gate and an edge of a performance-enhancing region. The sidewall spacers are used to define the edge of the region during formation of the region in the substrate. The method also includes pre-cleaning the gate and the substrate in preparation for formation of the region, where the etching and the pre-cleaning are performed in a continuous vacuum.

Abstract: Removal compositions and processes for removing at least one material layer from a rejected microelectronic device structure having same thereon. The removal composition includes hydrofluoric acid. The composition achieves substantial removal of the material(s) to be removed while not damaging the layers to be retained, for reclaiming, reworking, recycling and/or reuse of said structure.

Abstract: To improve a step coverage and a loading effect, without inviting a deterioration of throughput and an increase of cost, in a method for forming a thin film by alternately flowing a raw material and alcohol to a processing chamber.

Abstract: A method of manufacturing a semiconductor element, includes forming a lower metal wiring layer and an interlayer insulating film on a substrate, forming an opening through the interlayer insulating film, such that the opening is in communication with an upper surface of the lower metal wiring layer, cleaning the opening, forming a metal wiring line protecting film in the opening, such that the metal wiring line protecting film covers the lower metal wiring layer, washing the opening to remove the metal wiring line protecting film, such that a top surface of the lower metal wiring layer is exposed, and drying the substrate.

Abstract: A process for reconditioning a multi-component electrode comprising a silicon electrode bonded to an electrically conductive backing plate is provided. The process comprises: (i) removing metal ions from the multi-component electrode by soaking the multi-component electrode in a substantially alcohol-free DSP solution comprising sulfuric acid, hydrogen peroxide, and water and rinsing the multi-component electrode with de-ionized water; (ii) polishing one or more surfaces of the multi-component electrode following removal of metal ions there from; and (iii) removing contaminants from silicon surfaces of the multi-component electrode by treating the polished multi-component electrode with a mixed acid solution comprising hydrofluoric acid, nitric acid, acetic acid, and water and by rinsing the treated multi-component electrode with de-ionized water. Additional embodiments of broader and narrower scope are contemplated.

Abstract: The disclosure concerns a manufacturing method of a semiconductor device includes dry-etching a semiconductor substrate or a structure formed on the semiconductor substrate; supplying a solution onto the semiconductor substrate; measuring a specific resistance or a conductivity of the supplied solution; and supplying a removal solution for removing the etching residual material onto the semiconductor substrate for a predetermined period of time based on the specific resistance or the conductivity of the solution, when an etching residual material adhering to the semiconductor substrate or the structure is removed.

Abstract: A method that includes forming a gate of a semiconductor device on a substrate, and etching sidewall spacers on sides of the gate to provide a proximity value, where the proximity value is defined as a distance between the gate and an edge of a performance-enhancing region. The sidewall spacers are used to define the edge of the region during formation of the region in the substrate. The method also includes pre-cleaning the gate and the substrate in preparation for formation of the region, where the etching and the pre-cleaning are performed in a continuous vacuum.

Abstract: A CMOS image sensor and a method of fabricating the same are provided. The CMOS image sensor includes: an epitaxial layer of a first conductivity type, formed in a semiconductor substrate of the first conductivity type; a blue photodiode region of a second conductivity type, formed in the epitaxial layer at a first depth; a green photodiode region of the second conductivity type, spaced apart from the blue photodiode region and formed in the epitaxial layer at a second depth larger than the first depth; and a red photodiode region of the second conductivity type, spaced apart from the green photodiode region and formed in the epitaxial layer at a third depth larger than the second depth.

Abstract: The present invention provides an interconnect structure which has a high leakage resistance and substantially no metallic residues and no physical damage present at an interface between the interconnect dielectric and an overlying dielectric capping layer. The interconnect structure of the invention also has an interface between each conductive feature and the overlying dielectric capping layer that is substantially defect-free. The interconnect structure of the invention includes a non-plasma deposited dielectric capping layer which is formed utilizing a process including a thermal and chemical-only pretreatment step that removes surface oxide from atop each of the conductive features as well as metallic residues from atop the interconnect dielectric material. Following this pretreatment step, the dielectric capping layer is deposited.

Abstract: Methods for fabricating a FIN structure with a semicircular top surface and rounded top surface corners and edges are disclosed. As a part of a disclosed method, a FIN structure is formed in a semiconductor substrate. The FIN structure includes a top surface having corners and edges. The FIN structure is annealed where the annealing causes the top surface to have a semicircular shape and the top surface corners and edges to be rounded.

Abstract: This invention provides a method for manufacturing a semiconductor silicon substrate by use of carbon dioxide in a supercritical state, which method is capable of making the semiconductor silicon substrate highly reliable one. Specifically, this invention provides a method for manufacturing a semiconductor silicon substrate including at least two of: a cleaning step of cleaning a substrate to be treated in a presence of carbon dioxide in a supercritical state; a film forming step of forming at least one of a conducting film, an insulating film and barrier film on the substrate to be treated in the presence of carbon dioxide in the supercritical state; an etching step of etching the substrate to be treated in the presence of carbon dioxide in the supercritical state; and a resist removing step of removing a resist on the substrate to be treated in the presence of carbon dioxide in the supercritical state.

Abstract: The present invention provides a surface grinding method for a semiconductor wafer, which performs surface grinding with respect to a semiconductor wafer sliced into a thin plate shape, wherein at least a cleaning process for removing a heavy metal is performed before carrying out surface grinding of the semiconductor wafer, and a surface grinding process is carried out after performing the cleaning process. As a result, there are provided the surface grinding method and a manufacturing method for a semiconductor wafer, which can effectively reduce a contaminant, which has adhered to a surface of the semiconductor wafer, e.g., a heavy metal such as Cu.

Abstract: The present invention provides a method of forming metal lines in a semiconductor device having advantages of preventing an “explosion” phenomenon during a dual damascene process so as to improve the yield of the device. An exemplary embodiment of the present invention includes removing etching residues by wet cleaning the semiconductor substrate after forming the via hole, dry cleaning the semiconductor substrate after the wet cleaning, and forming a second metal line that is electrically connected with the first metal line through the via hole.

Abstract: A method for manufacturing a semiconductor substrate includes forming a first semiconductor layer on a predetermined region of a semiconductor base, forming a second semiconductor layer whose etching selective ratio is smaller than that of the first semiconductor layer on the first semiconductor layer, forming a support member to support the second semiconductor layer on the semiconductor base so as to cover the second semiconductor layer, forming an opening face in the support member to expose a portion of an edge of the first semiconductor layer, etching the first semiconductor layer through the opening face so as to form a cavity between the second semiconductor layer and the semiconductor base, cleaning between the second semiconductor layer and the semiconductor base through the opening face in a condition to remove a residue of the first semiconductor layer, and forming an insulating film in the cavity after cleaned.

Abstract: In a cleaning composition, a method of cleaning a semiconductor substrate and a method of manufacturing a semiconductor device, the cleaning composition includes about 0.5 to about 5% by weight of an organic ammonium hydroxide compound, about 0.1 to about 3% by weight of a fluoride compound, about 0.1 to about 3% by weight of a buffering agent, about 0.5 to about 5% by weight of an etching accelerant, and a remainder of water.

Abstract: The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a metal interconnect on a substrate; forming a refractory metal layer containing titanium (Ti) or tantalum (Ta) on a surface of the metal interconnect; forming an insulating interlayer so as to cover the refractory metal layer; selectively etching the insulating interlayer with an etchant gas containing an organic fluoride to form a hole, in which the refractory metal layer is exposed; treating an interior of the hole with an organic chemical solution to remove fluorinated compounds of Ti or Ta while leaving fluorocarbons on the surface of the refractory metal layer, the fluorinated compounds of Ti or Ta and the fluorocarbons being created during the etching step and present in the interior of the hole; and performing plasma-treatment for the interior of said hole to remove the fluorocarbon.

Abstract: The present invention is directed to compositions for copper passivation and methods of use of such compositions.

Abstract: Methods are provided for producing a pristine hydrogen-terminated silicon wafer surface with high stability against oxidation. The silicon wafer is treated with high purity, heated dilute hydrofluoric acid with anionic surfactant, rinsed in-situ with ultrapure water at room temperature, and dried. Alternatively, the silicon wafer is treated with dilute hydrofluoric acid, rinsed with hydrogen gasified water, and dried. The silicon wafer produced by the method is stable in a normal clean room environment for greater than 3 days and has been demonstrated to last without significant oxide regrowth for greater than 8 days.

Abstract: Methods are provided for producing a pristine hydrogen-terminated silicon wafer surface with high stability against oxidation. The silicon wafer is treated with high purity, heated dilute hydrofluoric acid with anionic surfactant, rinsed in-situ with ultrapure water at room temperature, and dried. Alternatively, the silicon wafer is treated with dilute hydrofluoric acid, rinsed with hydrogen gasified water, and dried. The silicon wafer produced by the method is stable in a normal clean room environment for greater than 3 days and has been demonstrated to last without significant oxide regrowth for greater than 8 days.

Abstract: There are provided the steps of loading a substrate into a reaction vessel; forming a film on the substrate while supplying a film forming gas into the reaction vessel; unloading the substrate after film formation from the reaction vessel; supplying a cleaning gas into the reaction vessel while lowering a temperature in the reaction vessel and removing a deposit deposited on at least an inner wall of the reaction vessel in the film forming step.

Abstract: A method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film; forming a bank including a first bank portion and a second bank portion, the first bank portion being located at substantially a central portion of the semiconductor layer, the second bank portion having a thin film portion for surrounding the semiconductor layer and a thick film portion for surrounding the thin film portion at a periphery of the semiconductor layer; arranging first functional liquid containing a conductive material in a region surrounded by the thin film portion and the first bank portion such that the first functional liquid covers the semiconductor layer; drying the first functional liquid to obtain a first conductive film; removing the thin film portion selectively after drying the first functional liquid; arranging second functional liquid including a conductive material on a reg

Abstract: To provide a manufacturing method of a semiconductor device capable of performing a selective growth at a low temperature. A manufacturing method of a semiconductor device for placing in a processing chamber a substrate having at least a silicon surface and an insulating film surface on a surface; and allowing an epitaxial film to selectively grow only on the silicon surface by using a substrate processing apparatus for heating an atmosphere in the processing chamber and the substrate, using a hearting unit disposed outside of the processing chamber, includes a substrate loading step of loading the substrate into the processing chamber; a pre-processing step of supplying dichlorsilane gas and hydrogen gas into the processing chamber while maintaining a temperature in the substrate processing chamber to a prescribed temperature of 700° C.

Abstract: Methods are provided for cleaning a microelectronic device, and one method includes providing a substrate having a patterned SOG/anti-reflective material; performing a process to cure the patterned SOG/anti-reflective material; and performing a cleaning process to remove the cured SOG/anti-reflective material. An apparatus for cleaning a microelectronic device is provided that includes a processing chamber; means for performing a SOG/anti-reflective material curing process within the processing chamber, means for performing a cleaning process within the processing chamber and means for venting the processing chamber.

Abstract: The invention includes methods of forming films over substrates. A substrate is provided within a reaction chamber, and a mixture is also provided within the chamber. The mixture includes a precursor of a desired material within a supercritical fluid. The precursor is relatively reactive under one set of conditions and is relatively non-reactive under another set of conditions. The precursor and supercritical fluid mixture is initially provided in the chamber under the conditions at which the precursor is relatively non-reactive. Subsequently, and while maintaining the supercritical state of the supercritical fluid, the conditions within the reaction chamber are changed to the conditions under which the precursor is relatively reactive. The precursor reacts to form the desired material, and at least some of the desired material forms a film on the substrate.

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Abstract: A method and apparatus for locally etching a substrate area the method including providing a substrate comprising a process surface; depositing a material layer over the process surface; and, applying a wet etchant to cover a targeted etching portion of the process surface while excluding an adjacent surrounding area to selectively etch the material layer overlying the targeted etching portion.

Abstract: The present invention is a reliable method of electroless-plating integrated circuit die that achieves high yield. Die are attached to a holder using a polyimide adhesive to eliminate voltage differences on bond pads which would otherwise interfere with the plating. The die are aggressively cleaned using multiple cleaning solutions, one heated to a user-defined temperature. Each cleaning is followed by an aggressive rinse in de-ionized water. Die are immersed into multiple metal solutions at user-definable temperatures. Each immersion is followed by an aggressive rinse in de-ionized water, one with heated de-ionized water.

Abstract: The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.