Deposition Of Carbon Doped Silicon Oxide, E.g., Sioc (epo) Patents (Class 257/E21.277)
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Patent number: 7602048Abstract: The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and gap-filling characteristics of the organic material of low dielectric constant, and for that purpose there is provided a wiring structure with the copper film embedded in the insulation film of the wiring layer, wherein the insulation film of the wiring layer is of a multi-layered structure with the laminated methyl silsesquioxane (MSQ) film, methylated hydrogen silsesquioxane (MHSQ) film and silicon oxide film.Type: GrantFiled: May 9, 2001Date of Patent: October 13, 2009Assignee: NEC Electronics CorporationInventor: Tatsuya Usami
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Patent number: 7585752Abstract: Chemical vapor deposition processes utilize chemical precursors that allow for the deposition of thin films to be conducted at or near the mass transport limited regime. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, a higher order silane is employed to deposit thin films containing silicon that are useful in the semiconductor industry in various applications such as transistor gate electrodes.Type: GrantFiled: October 12, 2004Date of Patent: September 8, 2009Assignee: ASM America, Inc.Inventors: Michael A. Todd, Mark Hawkins
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Patent number: 7582555Abstract: The present invention meets these needs by providing improved methods of filling gaps. In certain embodiments, the methods involve placing a substrate into a reaction chamber and introducing a vapor phase silicon-containing compound and oxidant into the chamber. Reactor conditions are controlled so that the silicon-containing compound and the oxidant are made to react and condense onto the substrate. The chemical reaction causes the formation of a flowable film, in some instances containing Si—OH, Si—H and Si—O bonds. The flowable film fills gaps on the substrates. The flowable film is then converted into a silicon oxide film, for example by plasma or thermal annealing. The methods of this invention may be used to fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.Type: GrantFiled: December 29, 2005Date of Patent: September 1, 2009Assignee: Novellus Systems, Inc.Inventors: Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Patent number: 7582970Abstract: A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum.Type: GrantFiled: July 28, 2008Date of Patent: September 1, 2009Assignee: NEC Electronics CorporationInventors: Sadayuki Ohnishi, Kouichi Owto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki
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Patent number: 7582575Abstract: A method for forming an insulation film on a semiconductor substrate by plasma reaction includes: vaporizing a silicon-containing hydrocarbon having a Si—O bond compound to provide a source gas; introducing the source gas and a carrier gas without an oxidizing gas into a reaction space for plasma CVD processing; and forming an insulation film constituted by Si, C, O, and H on a substrate by plasma reaction using a combination of low-frequency RF power and high-frequency RF power in the reaction space. The plasma reaction is activated while controlling the flow of the reaction gas to lengthen a residence time, Rt, of the reaction gas in the reaction space.Type: GrantFiled: December 5, 2005Date of Patent: September 1, 2009Assignee: ASM Japan K.K.Inventors: Atsuki Fukazawa, Kenichi Kagami
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Patent number: 7531891Abstract: A semiconductor device having improved adhesiveness between films composing an interlayer insulating film is presented by providing multilayered films in the interlayer insulating films having film density distribution, in which the film density is gradually changes. A SiOC film is deposited to a thickness of 300 nm via a plasma CVD process, in which a flow rate of trimethylsilane gas is stepwise increased. In this case, the film density of the deposited SiOC film is gradually decreased by stepwise increasing the flow rate of trimethylsilane gas. Since trimethylsilane contains methyl group, trimethylsilane has more bulky molecular structure in comparison with monosilane or the like. Thus, the film density is decreased by increasing the amount of trimethylsilane in the reactant gas.Type: GrantFiled: December 8, 2004Date of Patent: May 12, 2009Assignee: NEC Electronics CorporationInventors: Koichi Ohto, Tatsuya Usami, Yoichi Sasaki
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Patent number: 7498273Abstract: Methods of depositing a dielectric layer in a gap formed on a substrate are described. The methods include introducing an organo-silicon precursor and an oxygen precursor to a deposition chamber. The organo-silicon precursor has a C:Si atom ratio of less than 8, and the oxygen precursor comprises atomic oxygen that is generated outside the deposition chamber. The precursors are reacted to form the dielectric layer in the gap. Methods of filling gaps with dielectric materials are also described. These methods include providing an organo-silicon precursor having a C:Si atom ratio of less than 8 and an oxygen precursor, and generating a plasma from the precursors to deposit a first portion of the dielectric material in the gap. The dielectric material may be etched, and a second portion of dielectric material may be formed in the gap. The first and second portions of the dielectric material may be annealed.Type: GrantFiled: October 16, 2006Date of Patent: March 3, 2009Assignee: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Jeffrey C. Munro, Srinivas D. Nemani
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Patent number: 7491658Abstract: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.Type: GrantFiled: October 13, 2004Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Son Van Nguyen, Stephen McConnell Gates, Deborah A. Neumayer, Alfred Grill
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Patent number: 7459388Abstract: Methods of forming interconnect structures include forming a first metal wiring pattern on a first dielectric layer and forming a capping layer (e.g., SiCN layer) on the first copper wiring pattern. An adhesion layer is deposited on the capping layer, using a first source gas containing octamethylcyclotetrasilane (OMCTS) at a volumetric flow rate in a range from about 500 sccm to about 700 sccm and a second gas containing helium at a volumetric flow rate in a range from about 1000 to about 3000 sccm. The goal of the deposition step is to achieve an adhesion layer having an internal compressive stress of greater than about 150 MPa therein, so that the adhesion layer is less susceptible to etching/cleaning damage and moisture absorption during back-end processing steps. Additional dielectric and metal layers are then deposited on the adhesion layer.Type: GrantFiled: September 6, 2006Date of Patent: December 2, 2008Assignees: Samsung Electronics Co., Ltd., Chartered Semiconductor Manufacturing, Ltd., International Business Machines CorporationInventors: Jaehak Kim, Darryl D. Restaino, Johnny Widodo
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Patent number: 7439185Abstract: A method of fabricating a semiconductor device having an air-gapped multilayer interconnect wiring structure is disclosed. After having formed a first thin film on or above a substrate, define a first opening in the first thin film. Then, deposit a conductive material in the first opening. Then form a second thin film made of a porous material above the first thin film with the conductive material being deposited in the first opening. Next, define in the second thin film a second opening extending therethrough, followed by deposition of a conductive material in the second opening. The first thin film is removed through voids in the second thin film after having deposited the conductive material in the second opening. An integrated semiconductor device as manufactured thereby is also disclosed.Type: GrantFiled: February 3, 2006Date of Patent: October 21, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Akihiro Kojima
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Patent number: 7420279Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.Type: GrantFiled: June 28, 2006Date of Patent: September 2, 2008Assignee: NEC Electronics CorporationInventors: Sadayuki Ohnishi, Kouichi Ohto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki
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Patent number: 7416992Abstract: By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be applied to via first-trench last, trench first-via last schemes.Type: GrantFiled: November 28, 2005Date of Patent: August 26, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Matthias Lehr, Peter Huebler, Christian Zistl
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Patent number: 7368381Abstract: The invention includes methods of forming films over substrates. A substrate is provided within a reaction chamber, and a mixture is also provided within the chamber. The mixture includes a precursor of a desired material within a supercritical fluid. The precursor is relatively reactive under one set of conditions and is relatively non-reactive under another set of conditions. The precursor and supercritical fluid mixture is initially provided in the chamber under the conditions at which the precursor is relatively non-reactive. Subsequently, and while maintaining the supercritical state of the supercritical fluid, the conditions within the reaction chamber are changed to the conditions under which the precursor is relatively reactive. The precursor reacts to form the desired material, and at least some of the desired material forms a film on the substrate.Type: GrantFiled: April 28, 2006Date of Patent: May 6, 2008Assignee: Micron Technology, Inc.Inventors: Demetrius Sarigiannis, Garo J Derderian, Cem Basceri
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Patent number: 7357977Abstract: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.Type: GrantFiled: January 13, 2005Date of Patent: April 15, 2008Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Stephen McConnell Gates, Alfred Grill, Michael Wayne Lane, Eric Gerhard Liniger, Xiao Hu Liu, Son Van Nguyen, Deborah Ann Neumayer, Thomas McCarroll Shaw
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Patent number: 7352053Abstract: A method of manufacturing a mechanically robust insulating layer, including forming a low-k dielectric layer having a first dielectric constant on a substrate and forming a carbon nitride cap layer on the low-k dielectric layer, the insulating layer thereby having a second dielectric constant that is less than the first dielectric constant.Type: GrantFiled: October 29, 2003Date of Patent: April 1, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Hui Lin Chang
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Patent number: 7319068Abstract: A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.Type: GrantFiled: October 2, 2006Date of Patent: January 15, 2008Assignee: Applied Materials, Inc.Inventors: Li-Qun Xia, Ping Xu, Louis Yang
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Patent number: 7273823Abstract: A method of processing a substrate including depositing a low dielectric constant film comprising silicon, carbon, and oxygen on the substrate and depositing an oxide rich cap on the low dielectric constant film is provided. The low dielectric constant film is deposited in the presence of low frequency RF power from a gas mixture including an organosilicon compound and an oxidizing gas. The low frequency RF power is terminated after the deposition of the low dielectric constant film. The oxide rich cap is deposited on the low dielectric constant film in the absence of low frequency RF power from another gas mixture including the organosilicon compound and the oxidizing gas used to deposit the low dielectric constant film.Type: GrantFiled: June 3, 2005Date of Patent: September 25, 2007Assignee: Applied Materials, Inc.Inventors: Annamalai Lakshmanan, Daemian Raj, Francimar Schmitt, Bok Hoen Kim, Ganesh Balasubramanian
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Patent number: 7259111Abstract: A method of depositing a organosilicate dielectric layer exhibiting high adhesion strength to an underlying substrate disposed within a single processing chamber without plasma arcing. The method includes positioning a substrate within a processing chamber having a powered electrode, flowing an interface gas mixture into the processing chamber, the interface gas mixture comprising one or more organosilicon compounds and one or more oxidizing gases, depositing a silicon oxide layer on the substrate by varying process conditions, wherein DC bias of the powered electrode varies less than 60 volts.Type: GrantFiled: June 1, 2005Date of Patent: August 21, 2007Assignee: Applied Materials, Inc.Inventors: Deenesh Padhi, Ganesh Balasubramanian, Annamalai Lakshmanan, Zhenjiang Cui, Juan Carlos Rocha-Alvarez, Bok Hoen Kim, Hichem M'Saad, Steven Reiter, Francimar Schmitt
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Patent number: 7256146Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1?v?0.9, 0?w?0.5, 0.01?x?0.9, 0?y?0.7, 0.01?z?0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1<v<0.8, 0<w<0.8, 0.05<x<0.8, 0<y<0.3, 0.05<z<0.8 for v+w+x+y+z=1 and then converting the polymeric preceramic layer into a ceramic diffusion barrier by thermal methods.Type: GrantFiled: May 13, 2005Date of Patent: August 14, 2007Assignee: International Business Machines CorporationInventors: Stephan A. Cohen, Stephen McConnell Gates, Jeffrey C. Hedrick, Elbert E. Huang, Dirk Pfeiffer
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Patent number: 7220647Abstract: A method of cleaning a wafer, adapted for a patterned gate structure. The gate structures comprise a gate dielectric layer, a nitrogen-containing barrier layer and a silicon-containing gate layer sequentially stacked over the substrate. The method includes cleaning the substrate with phosphoric acid solution and hydrofluoric acid solution so that silicon nitride residues formed in a reaction between the nitrogen-containing barrier layer and the silicon-containing gate layer can be removed and the amount of pollutants and particles can be reduced. Ultimately, the yield of the process as well as the quality and reliability of the device are improved.Type: GrantFiled: February 2, 2005Date of Patent: May 22, 2007Assignee: United Microelectronics Corp.Inventors: Chih-Ning Wu, Charlie C J Lee, Kuan-Yang Liao
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Patent number: 7211524Abstract: The present invention relates to a method of forming an insulating film in a semiconductor device. After a mixed gas of alkyl silane gas and N2O gas is supplied into the deposition equipment, a radio frequency power including a short pulse wave for causing incomplete reaction upon a gas phase reaction is applied to generate nano particle. The nano particle is then reacted to oxygen radical to form the insulating film including a plurality of nano voids. A low-dielectric insulating film that can be applied to the nano technology even in the existing LECVD equipment is formed.Type: GrantFiled: December 5, 2002Date of Patent: May 1, 2007Assignee: Hynix Semiconductor Inc.Inventors: Choon Kun Ryu, Tae Kyung Kim
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Patent number: 7205248Abstract: Methods of forming an oxide layer such as high aspect ratio trench isolations, and treating the oxide substrate to remove carbon, structures formed by the method, and devices and systems incorporating the oxide material are provided.Type: GrantFiled: February 4, 2003Date of Patent: April 17, 2007Assignee: Micron Technology, Inc.Inventors: Li Li, Weimin Li
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Patent number: 7189658Abstract: A method of processing a substrate including depositing a transition layer and a dielectric layer on a substrate in a processing chamber are provided. The transition layer is deposited from a processing gas including an organosilicon compound and an oxidizing gas. The flow rate of the organosilicon compound is ramped up during the deposition of the transition layer such that the transition layer has a carbon concentration gradient and an oxygen concentration gradient. The transition layer improves the adhesion of the dielectric layer to an underlying barrier layer on the substrate.Type: GrantFiled: May 4, 2005Date of Patent: March 13, 2007Assignee: Applied Materials, Inc.Inventors: Annamalai Lakshmanan, Deenesh Padhi, Ganesh Balasubramanian, Zhenjiang David Cui, Daemian Raj, Juan Carlos Rocha-Alvarez, Francimar Schmitt, Bok Hoen Kim
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Patent number: 7148156Abstract: A method is provided for processing a substrate including removing amorphous carbon material disposed on a low k dielectric material with minimal or reduced defect formation and minimal dielectric constant change of the low k dielectric material. In one aspect, the invention provides a method for processing a substrate including depositing at least one dielectric layer on a substrate surface, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less, forming amorphous carbon material on the at least one dielectric layer, and removing the one or more amorphous carbon layers by exposing the one or more amorphous carbon layers to a plasma of a hydrogen-containing gas.Type: GrantFiled: February 8, 2005Date of Patent: December 12, 2006Assignee: Applied Materials, Inc.Inventor: Christopher Dennis Bencher
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Patent number: 7102236Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.Type: GrantFiled: January 29, 2004Date of Patent: September 5, 2006Assignee: NEC Electronics CorporationInventors: Sadayuki Ohnishi, Kouichi Ohto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki