Abstract: The present invention achieves a formation of a metal oxide film of a thin film transistor with a simplified process. The present invention is concerned with a method for manufacturing a field-effect transistor comprising a gate electrode, a source electrode, a drain electrode, a channel layer and a gate insulating layer wherein the channel layer is formed by using a metal salt-containing composition comprising a metal salt, a polyvalent carboxylic acid having a cis-form structure of —C(COOH)?C(COOH)—, an organic solvent and a water wherein a molar ratio of the polyvalent carboxylic acid to the metal salt is in the range of 0.5 to 4.0.

Abstract: A method includes the steps of preparing a multilayer film 80 formed by sequentially stacking a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40; forming a source electrode 42s and a drain electrode 42d comprised of the second metal layer 40 by etching the second metal layer 40; pressure-bonding a resin layer 50 onto a surface of the multilayer film 80 provided with the source electrode 42s and the drain electrode 42d to burry the source electrode 42s and the drain electrode 42d in the resin layer 50; and forming a gate electrode 10g comprised of the first metal layer 10 by etching the first metal layer 10. The inorganic insulating layer 20g functions as a gate insulating film. The semiconductor layer 30 functions as a channel.

Abstract: A thin film transistor and a method for manufacturing the same are provided. A top-gate thin film transistor is fabricated by a process using two gray-tone photomasks and a lift-off method. Therefore, the method can save cost of photomasks and processes comparing to a conventional fabrication method.

Abstract: In an organic light-emitting display device and a method of manufacturing the same, the display device may include: a thin-film transistor including an active layer, a gate electrode including a first electrode which includes nano-Ag on an insulating layer formed on the active layer and a second electrode on the first electrode, a source electrode, and a drain electrode; an organic light-emitting device including a pixel electrode electrically connected to the thin-film transistor and formed of the same layer as, and using the same material used to form, the first electrode, an intermediate layer including an emissive layer, and an opposite electrode covering the intermediate layer and facing the pixel electrode; and a pad electrode formed of the same layer as, and using the same material used to form, the first electrode in a pad area located outside of a light-emitting area.

Abstract: A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.

Abstract: A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose a first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode.

Abstract: An organic light-emitting display device including a TFT comprising an active layer, a gate electrode comprising a lower gate electrode and an upper gate electrode, and source and drain electrodes insulated from the gate electrode and contacting the active layer; an organic light-emitting device electrically connected to the TFT and comprising a pixel electrode formed in the same layer as where the lower gate electrode is formed; and a pad electrode electrically coupled to the TFT or the organic light emitting device and comprising a first pad electrode formed in the same layer as in which the lower gate electrode is formed, a second pad electrode formed in the same layer as in which the upper gate electrode is formed, and a third pad electrode comprising a transparent conductive oxide, the first, second, and third pad electrodes being sequentially stacked.

Abstract: A substrate; a gate electrode formed above the substrate; a gate insulating film formed above the gate electrode; a crystalline silicon semiconductor layer formed above the gate insulating film; an amorphous silicon semiconductor layer formed above the crystalline silicon semiconductor layer; an organic protective film made of an organic material and formed above the amorphous silicon semiconductor layer; and a source electrode and a drain electrode formed above the amorphous silicon semiconductor layer interposing the organic protective film are included, and a charge density of the negative carriers in the amorphous silicon semiconductor layer is at least 3×1011 cm?2.

Abstract: An OLED device includes a thin film transistor including an active layer, a gate bottom electrode, a gate top electrode, an insulating layer covering the gate electrode, and a source electrode and a drain electrode on the insulating layer contacting the active layer; an organic light-emitting device electrically connected to the thin film transistor and including a sequentially stacked pixel electrode, on the same layer as the gate bottom electrode, emissive layer, and, opposite electrode, a pad bottom electrode on the same layer as the gate bottom electrode and a pad top electrode pattern on the same layer as the gate top electrode, the pad top electrode pattern including openings exposing the pad bottom electrode, and an insulation pattern covering the upper surface of the pad top electrode pattern on the same layer as the insulating layer, on an upper surface of the pad bottom electrode.

Abstract: The present disclosure provides a method for manufacturing a semiconductor field effect transistor, comprising: forming a semiconductor substrate having a local Silicon-on-Insulator (SOI) structure, which comprises a local buried isolation dielectric layer; forming a fin on a silicon substrate above the local buried isolation dielectric layer; forming a gate stack structure on a top and on side faces of the fin; forming source/drain structures in the fin at both sides of the gate stack structure; and metallizing. The present disclosure uses a conventional top-to-bottom process based on quasi-plane, which has a good compatibility with CMOS planar processes. Also, the method can suppress short channel effects and help to reduce the dimensions of MOSFETs.

Abstract: A method of manufacturing a wire may include forming a wire pattern, which at least includes a first conductive layer, a second conductive layer, and a third conductive layer arranged in the order stated on a substrate. At least the second conductive layer may have higher etch selectivity than the first and third conductive layers. Side holes may be formed by removing portions of the second conductive layer at ends of the wire pattern, and fine wires may be formed by injecting a masking material into the side holes and patterning the wire pattern by using the masking material as a mask.

Abstract: An object is to reduce off-state leakage current between a source electrode and a drain electrode. One embodiment of the present invention is a semiconductor device including a gate electrode, gate insulating films and formed to cover the gate electrode, an active layer formed over the gate insulating films and located above the gate electrode, silicon layers and formed over side surfaces of the active layer and the gate insulating films, and a source electrode and a drain electrode formed over the silicon layers. The active layer is not in contact with each of the source electrode and the drain electrode.

Abstract: The present invention provides a highly reliable circuit board that includes TFTs a semiconductor layer of which is formed from an oxide semiconductor; and low-resistance aluminum wirings. The circuit board of the present invention includes an oxide semiconductor layer; source wirings; and drain wirings, wherein each of the source wirings and the drain wirings includes a portion in contact with the semiconductor layer, portions of the source wirings in contact with the semiconductor layer and respective portions of the drain wirings in contact with the semiconductor layer spacedly facing each other, and the source wirings and the drain wirings are formed by stacking a layer formed from a metal other than aluminum and a layer containing aluminum.

Abstract: A manufacturing method of an LTPS-TFT array substrate is provided. The exemplary method comprises a step of sequentially forming a poly-silicon layer and a data-line-metal layer on a base substrate, and performing a patterning process by using a third mask to simultaneously form an active layer and source and drain electrodes, the active layer being provided on the gate insulating layer and corresponding to the gate electrode, and the source and drain electrodes being provided on the active layer.

Abstract: One or more embodiments of the disclosed technology provide a thin film transistor, an array substrate and a method for preparing the same. The thin film transistor comprises a base substrate, and a gate electrode, a gate insulating layer, an active layer, an ohmic contact layer, a source electrode, a drain electrode and a passivation layer prepared on the base substrate in this order. The active layer is formed of microcrystalline silicon, and the active layer comprises an active layer lower portion and an active layer upper portion, and the active layer lower portion is microcrystalline silicon obtained by using hydrogen plasma to treat at least two layers of amorphous silicon thin film prepared in a layer-by-layer manner.

Abstract: Embodiments of the disclosed technology relate to a method for manufacturing a thin film transistor (TFT) with a polysilicon active layer comprising: depositing an amorphous silicon layer on a substrate, and patterning the amorphous silicon layer so as to form an active layer comprising a source region, a drain region and a channel region; depositing an inducing metal layer on the source region and the drain region; performing a first thermal treatment on the active layer provided with the inducing metal layer so that the active layer is crystallized under the effect of the inducing metal; doping the source region and the drain region with a first impurity for collecting the inducing metal; and performing a second thermal treatment on the doped active layer so that the first impurity absorbs the inducing metal remained in the channel region.

Abstract: It is an object to provide a semiconductor device in which a short-channel effect is suppressed and miniaturization is achieved, and a manufacturing method thereof. A trench is formed in an insulating layer and impurities are added to an oxide semiconductor film in contact with an upper end corner portion of the trench, whereby a source region and a drain region are formed. With the above structure, miniaturization can be achieved. Further, with the trench, a short-channel effect can be suppressed setting the depth of the trench as appropriate even when a distance between a source electrode layer and a drain electrode layer is shortened.

Abstract: There is provided a method for manufacturing a flexible semiconductor device. The method of the present invention comprises the steps of: (a) preparing a metal foil having a concave portion; (b) forming a gate insulating film on a bottom face of the concave portion of the metal foil; (c) forming a semiconductor layer above the bottom face of the concave portion via the gate insulating film while making use of the concave portion as a bank member; and (d) forming a source electrode and a drain electrode such that they make contact with the semiconductor layer.

Abstract: Disclosed is a thin film transistor that is provided with a gate insulating film that is inexpensive, and that is less likely to have a low-density microcrystalline silicon layer formed thereon due to plasma induced damage, while suppressing fluctuation of a threshold voltage. In a TFT (100) having the bottom gate structure, since a silicon nitride film (31) having a natural oxide film (32) formed on the surface thereof is used as the gate insulating film (30), the gate insulating film (30) is not only capable of preventing the alkali metal ions contained in a glass substrate (10) from entering the gate insulating film (30), but also capable of suppressing a formation of the low-density microcrystalline silicon layer on the surface of a microcrystalline silicon film (41) on the side in contact with the gate insulating film (30). Since the mobility of the microcrystalline silicon film (41) is increased, the operation speed of the TFT (100) can be improved.

Abstract: A method for manufacturing a silicon semiconductor device includes the steps of diluting a silicon-containing raw material gas with hydrogen gas by a factor equal to or larger than 600, applying radiofrequency power to a gas mixture of the diluted raw material gas and hydrogen gas to induce electric discharge, depositing silicon out of the raw material gas decomposed by the electric discharge onto a substrate, and controlling the pressure of the gas mixture to be equal to or higher than 600 Pa. The power density Pw(W/cm2) of the radiofrequency power is specified in such a manner that the value Pw(W/cm2)*D/P(Pa) should fall within the range of 0.083 to 0.222, both inclusive, where D represents the dilution factor between the raw material gas and hydrogen gas and P (Pa) represents the pressure of the gas mixture.

Abstract: An oxide semiconductor device may include a gate electrode formed on a substrate, and a gate insulation layer formed on the substrate to cover the gate electrode. A channel protection structure may be disposed on the gate insulation layer to expose a portion of the gate insulation layer. A source electrode may be located on a first portion of the channel protection structure. A drain electrode may be disposed on a second portion of the channel protection structure. An active pattern may be positioned on the exposed portion of the gate insulation layer, the source electrode, and the drain electrode.

Abstract: The present invention relates to a thin film transistor substrate and a method for fabricating the same which can reduce a number of steps.

Abstract: Provided is a crystalline silicon thin film semiconductor device which is capable of reducing off-state leakage current and has excellent current rising characteristics. The thin film transistor includes a semiconductor layer formed of an amorphous silicon layer and a crystalline silicon layer. A drain electrode is provided in direct contact with the crystalline silicon layer of the semiconductor layer, to thereby improve the current rising characteristics.

Abstract: In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer.

Abstract: A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.

Abstract: A manufacturing method of an array substrate, comprising the following steps: S1 forming a gate signal line and a gate electrode on a base substrate, successively depositing a gate insulating layer, an active layer, and a metal layer, faulting a mask formed of photoresist on the metal layer, and removing the metal layer outside a region for forming a data line and source/drain electrodes through the mask; S2. simultaneously etching the active layer and ashing the photoresist so as to expose the metal layer within a channel region; S3. etching the active layer exposed by the photoresist after being ashed after the step S2; S4. removing the metal layer within the channel region.

Abstract: Electronic apparatus and methods of forming the electronic apparatus include a silicon oxynitride layer on a semiconductor device for use in a variety of electronic systems. The silicon oxynitride layer may be structured to control strain in a silicon channel of the semiconductor device to modify carrier mobility in the silicon channel, where the silicon channel is configured to conduct current under appropriate operating conditions of the semiconductor device.

Abstract: To suppress deterioration in electrical characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer. Further, the silicon layer is provided in contact with at least a region of the oxide semiconductor layer, in which a channel is formed, and a source electrode layer and a drain electrode layer are provided in contact with regions of the oxide semiconductor layer, over which the silicon layer is not provided.

Abstract: A method of fabricating a TFT and IPS with reduced masking operations includes a substrate, a gate, a layer of gate dielectric on the gate and surrounding substrate surface and a semiconducting metal oxide on the gate dielectric. A channel protection layer overlies the gate to define a channel area in the semiconducting metal oxide. A S/D metal layer is patterned on the channel protection layer and a portion of the exposed semiconducting metal oxide to define an IPS area. An organic dielectric material is patterned on the S/D terminals and at an opposed side of the IPS area. The S/D metal is etched to expose the semiconducting metal oxide defining a first IPS electrode. A passivation layer covers the first electrode and a layer of transparent conductive material is patterned on the passivation layer to define a second IPS electrode overlying the first electrode.

Abstract: According to one embodiment, a thin film transistor includes: a substrate; a semiconductor layer; first and second insulating films; and gate, source and drain electrodes. The semiconductor layer is provided on the substrate. The semiconductor layer is made of an oxide having indium. The semiconductor layer has first and second regions and other region. The first insulating film covers a top face of the other region. The second insulating film covers at least a pair of side surfaces of the semiconductor layer. The second insulating film is formed under a condition different from that for the first insulating film. The gate electrode is provided on the first and second insulating films or below the semiconductor layer. The source and drain electrodes are provided on the first and second regions, respectively. The drain and source electrodes sandwich the pair of the side surfaces of the semiconductor layer.

Abstract: A thin film transistor includes a gate electrode, a gate insulating layer on the gate electrode, a semiconductor on the gate insulating layer, and a drain electrode and a source electrode on the semiconductor and spaced apart from each other. Each of the drain electrode and the source electrode includes a first metal diffusion preventing layer which prevents diffusion of metal atoms, and a second metal diffusion preventing layer on the first metal diffusion preventing layer. At least one of the first and second metal diffusion preventing layers includes grains in a columnar structure, which are in a direction substantially perpendicular to a lower layer. First grain boundaries of the first metal diffusion preventing layer and second grain boundaries of the second metal diffusion preventing layer are substantially discontinuous in a direction perpendicular to the semiconductor.

Abstract: A display apparatus includes a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a gate electrode disposed on the substrate, a gate dielectric layer disposed on the substrate and the gate electrode, an oxide semiconductor pattern disposed on the gate dielectric layer, a first insulating pattern disposed on the oxide semiconductor pattern that overlaps the gate electrode, a second insulating pattern disposed on the oxide semiconductor pattern and spaced apart from the first insulating pattern, source and drain electrodes spaced apart from each other on the oxide semiconductor pattern, a pixel electrode pattern disposed on the second insulating pattern to make contact with the source electrode, and a channel area defined where the oxide semiconductor pattern overlaps the gate electrode. A high carrier mobility channel is formed in the channel area when a turn-on voltage is applied to the gate electrode.

Abstract: An object is to suppress deterioration in electric characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer, an impurity semiconductor layer is provided over the silicon layer, and a source electrode layer and a drain electrode layer are provided to be electrically connected to the impurity semiconductor layer.

Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.

Abstract: A transistor includes a substrate, an active region including a source region, a channel region, and a drain region which are crystallized using an SGS crystallization method and are formed on the substrate so that a grain size of a first annealed portion and a second annealed portion are different from each other, a gate insulating layer formed on the active region, and a gate electrode formed on the gate insulating layer.

Abstract: An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.

Abstract: A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

Abstract: An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm3 and lower than or equal to 2.35 g/cm3, preferably higher than or equal to 2.30 g/cm and lower than or equal to 2.33 g/cm3.

Abstract: A method of forming a semiconductor device includes implanting an amorphizing species into a crystalline semiconductor substrate, the substrate having a transistor gate structure formed thereupon. Carbon is implanted into amorphized regions of the substrate, with specific implant conditions tailored such that the peak concentration of carbon species coincides with the end of the stacking faults, where the stacking faults are created during the recrystallization anneal. The implanted carbon pins partial dislocations so as to prevent the dislocations from disassociating from the end of the stacking faults and moving to a region in the substrate directly below the transistor gate structure. This removes the defects, which cause device leakage fail.

Abstract: To provide a semiconductor device in which desorption of oxygen from side surfaces of an oxide semiconductor layer is prevented, defects (oxygen deficiency) in the oxide semiconductor layer are sufficiently reduced, and leakage current between a source and a drain is suppressed. The semiconductor device is manufactured through the following steps: after first heat treatment is performed on an oxide semiconductor film, the oxide semiconductor film is processed to form an oxide semiconductor layer; immediately after that, side walls of the oxide semiconductor layer are covered with an insulating oxide; and in second heat treatment, the side surfaces of the oxide semiconductor layer are prevented from being exposed to a vacuum and defects (oxygen deficiency) in the oxide semiconductor layer are reduced. Side walls of the oxide semiconductor layer are covered with sidewall insulating layers. The semiconductor device has a TGBC structure.

Abstract: A thin film transistor (TFT) structure includes a substrate, a gate, a gate dielectric layer, a source, a drain and a transparent material layer. The gate is formed on the substrate; the gate dielectric layer is formed on the gate; the source and the drain are formed on the gate dielectric layer; and the transparent material layer has a channel area and an insulating area, and the channel area is disposed on a portion of the gate dielectric layer located between the source and the drain; and the insulating area is disposed on the channel area, the source and the drain.

Abstract: A transistor includes a channel layer disposed above a gate and including an oxide semiconductor. A source electrode contacts a first end portion of the channel layer, and a drain electrode contacts a second end portion of the channel layer. The channel layer further includes a fluorine-containing region formed in an upper portion of the channel layer between the source electrode and the drain electrode.

Abstract: Provided is a polysilicon thin film transistor having a trench type bottom gate structure using copper and a method of making the same. The polysilicon thin film transistor includes: a transparent insulation substrate; a seed pattern that is formed in a pattern corresponding to that of a gate electrode on the transparent insulation substrate, and that is used to form the gate electrode; a trench type guide portion having a trench type contact window in which an upper portion of the seed pattern is exposed; the gate electrode that is formed by electrodepositing copper on a trench of the exposed seed pattern; a gate insulation film formed on the upper portions of the gate electrode and the trench type guide portion, respectively; and a polysilicon layer in which a channel region, a source region and a drain region are formed on the upper portion of the gate insulation film.

Abstract: An embodiment of the disclosed technology provides a thin film transistor device comprising a source electrode, a drain electrode, a gate electrode, an active layer corresponding to the gate electrode, and a gate insulation layer formed between the gate electrode and the active layer; a concave region corresponding to the gate electrode is provided in the gate insulation layer.

Abstract: The amorphous silicon film is formed over the microcrystalline silicon film, and plasma treatment is performed on the amorphous silicon film in a mixed gas atmosphere of H2 and Ar at a pressure higher than 1000 Pa, so that etching is performed to expose the microcrystalline silicon film. In the etching, the etching rate of the amorphous silicon film and that of the microcrystalline silicon film is large.

Abstract: An organic light emitting display device includes a substrate, a thin film transistor formed on the substrate and including an active layer, a gate electrode including a gate lower electrode and a gate upper electrode, a source electrode, and a drain electrode, an organic light emitting device electrically connected to the thin film transistor, wherein a pixel electrode formed of the same material as at least a part of the gate electrode in the same layer, an intermediate layer including a light emitting layer, and an opposed electrode arranged to face the pixel electrode are sequentially deposited.

Abstract: A transistor includes a first active layer having a first channel region and a second active layer having a second channel region. A first gate of the transistor is configured to control electrical characteristics of at least the first active layer and a second gate is configured to control electrical characteristics of at least the second active layer. A source electrode contacts the first and second active layers. A drain electrode also contacts the first and second active layers.

Abstract: An organic light emitting display apparatus includes a first substrate including a display region disposed in a center of one surface thereof and a bonding region formed along a closed loop to surround the display region; a semiconductor layer corresponding to the bonding region of the first substrate, formed along the closed loop to surround the display region, and comprising a polycrystal; at least one insulation layer formed over the semiconductor layer; a bonding member formed over the at least one insulation layer and formed in a region corresponding to the semiconductor layer; and a second substrate having the one surface disposed to face one surface of the first substrate and coupled to the bonding member to encapsulate the display region of the first substrate.

Abstract: An oxide semiconductor thin film transistor structure includes a substrate, a gate electrode disposed on the substrate, a semiconductor insulating layer disposed on the substrate and the gate electrode, an oxide semiconductor layer disposed on the semiconductor insulating layer, a patterned semiconductor layer disposed on the oxide semiconductor layer, and a source electrode and a drain electrode respectively disposed on the patterned semiconductor layer. The source electrode and the drain electrode are made of a metal layer.

Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.