Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Publication number: 20120280230
    Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 8, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo AKIMOTO, Junichiro SAKATA, Shunpei YAMAZAKI
  • Patent number: 8304765
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: November 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Patent number: 8299461
    Abstract: A thin film transistor includes: a substrate; and, on the substrate, an oxide semiconductor film which serves as an active layer and contains In, Ga, and Zn, a gate electrode, a gate insulating film, a source electrode, and a drain electrode, wherein, when a molar ratio of In, Ga, and Zn in the oxide semiconductor film is expressed as In:Ga:Zn=(2.0?x):x:y, wherein 0.0<x<2.0 and 0.0<y, the distribution of y in the thickness direction of the oxide semiconductor film is such that the oxide semiconductor film has a region at which a value of y is larger than that at a surface of the oxide semiconductor film at a side closer to the substrate and that at a surface of the oxide semiconductor film at a side farther from the substrate.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: October 30, 2012
    Assignee: FUJIFILM Corporation
    Inventors: Atsushi Tanaka, Takeshi Hama, Masayuki Suzuki
  • Publication number: 20120267623
    Abstract: A semiconductor device having a transistor including an oxide semiconductor film is disclosed. In the semiconductor device, the oxide semiconductor film is provided along a trench formed in an insulating layer. The trench includes a lower end corner portion and an upper end corner portion having a curved shape with a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, and the oxide semiconductor film is provided in contact with a bottom surface, the lower end corner portion, the upper end corner portion, and an inner wall surface of the trench. The oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to a surface at least over the upper end corner portion.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 25, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsuo ISOBE, Toshinari SASAKI, Shinya SASAGAWA, Akihiro ISHIZUKA
  • Publication number: 20120267625
    Abstract: A thin film transistor that includes an oxide semiconductor film forming a channel, a gate electrode disposed on one side of the oxide semiconductor film via a gate insulating film and a pair of electrodes formed as a source region and a drain region.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Applicant: SONY CORPORATION
    Inventor: Kazuhiko Tokunaga
  • Patent number: 8294148
    Abstract: The present invention generally comprises TFTs having semiconductor material comprising oxygen, nitrogen, and one or more element selected from the group consisting of zinc, tin, gallium, cadmium, and indium as the active channel. The semiconductor material may be used in bottom gate TFTs, top gate TFTs, and other types of TFTs. The TFTs may be patterned by etching to create both the channel and the metal electrodes. Then, the source-drain electrodes may be defined by dry etching using the semiconductor material as an etch stop layer. The active layer carrier concentration, mobility, and interface with other layers of the TFT can be tuned to predetermined values. The tuning may be accomplished by changing the nitrogen containing gas to oxygen containing gas flow ratio, annealing and/or plasma treating the deposited semiconductor film, or changing the concentration of aluminum doping.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: October 23, 2012
    Assignee: Applied Materials, Inc.
    Inventor: Yan Ye
  • Publication number: 20120261660
    Abstract: An oxide thin film transistor (TFT) and its fabrication method are disclosed. In a TFT of a bottom gate structure using amorphous zinc oxide (ZnO)-based semiconductor as an active layer, source and drain electrodes are formed, on which the active layer made of oxide semiconductor is formed to thus prevent degeneration of the oxide semiconductor in etching the source and drain electrodes.
    Type: Application
    Filed: May 3, 2012
    Publication date: October 18, 2012
    Inventors: Hyun-Sik Seo, Jong-Uk Bae, Dae-Hwan Kim
  • Publication number: 20120262995
    Abstract: A novel semiconductor element contributing to an increase in circuit scale is provided. In the semiconductor element, two different electrical switches are formed using a single oxide semiconductor layer. For example, in the semiconductor element, formation of a channel (a current path) in the vicinity of a bottom surface (a first surface) of the oxide semiconductor layer and formation of a channel in the vicinity of a top surface (a second surface) of the oxide semiconductor layer are independently controlled. Therefore, the circuit area can be reduced as compared to the case two electrical switches are separately provided (for example, the case where two transistors are separately provided). That is, a circuit is formed using the semiconductor element, whereby an increase in the circuit area due to an increase in circuit scale can be suppressed.
    Type: Application
    Filed: April 9, 2012
    Publication date: October 18, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Junichiro SAKATA
  • Patent number: 8282995
    Abstract: A selenium/Group Ib/Group 3a ink is provided, comprising, as initial components: (a) a selenium/Group Ib/Group 3a system which comprises a combination of, as initial components: a selenium; an organic chalcogenide component; a Group Ib containing substance; optionally, a bidentate thiol component; a Group 3a containing substance; and, (b) a liquid carrier component; wherein the selenium/Group Ib/Group 3a system is stably dispersed in the liquid carrier component. Also provided are methods of preparing the selenium/Group Ib/Group 3a ink and for using the selenium/Group Ib/Group 3a ink to deposit a selenium/Group Ib/Group 3a material on a substrate for use in the manufacture of a variety of chalcogenide containing semiconductor materials, such as, thin film transistors (TFTs), light emitting diodes (LEDs); and photoresponsive devices (e.g., electrophotography (e.g.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 9, 2012
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Kevin Calzia, David Mosley, David L. Thorsen
  • Publication number: 20120248535
    Abstract: Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs and IC. FET locations are defined on a layered semiconductor wafer. The layered semiconductor wafer preferably includes a III-V semiconductor surface layer, e.g., Gallium Arsenide (GaAs), and a buried layer, e.g., Aluminum Arsenide (AlAs). Portions of the buried layer are converted to dielectric material, e.g., Aluminum Oxide (AlO), at least beneath FET source/drain regions. The converted dielectric material may extend completely under the FET. Source/drain contacts are formed to FETs above the dielectric material in the buried layer.
    Type: Application
    Filed: June 4, 2012
    Publication date: October 4, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng-Wei Cheng, Shu-Jen Han, Kuen-Ting Shiu
  • Publication number: 20120248433
    Abstract: A semiconductor device of stable electrical characteristics, whose oxygen vacancies in a metal oxide is reduced, is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a first metal oxide film over the gate insulating film, a source electrode and a drain electrode which are in contact with the first metal oxide film, and a passivation film over the source electrode and the drain electrode. A first insulating film, a second metal oxide film, and a second insulating film are stacked sequentially in the passivation film.
    Type: Application
    Filed: March 21, 2012
    Publication date: October 4, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tadashi NAKANO, Mai SUGIKAWA, Kosei NODA
  • Publication number: 20120248432
    Abstract: A highly reliable semiconductor device having stable electric characteristics is provided by suppressing, in a transistor including an oxide semiconductor film, diffusion of indium into an insulating film in contact with the oxide semiconductor film and improving the characteristics of the interface between the oxide semiconductor film and the insulating film. In an oxide semiconductor film containing indium, the indium concentration at a surface is decreased, thereby preventing diffusion of indium into an insulating film on and in contact with the oxide semiconductor film. By decreasing the indium concentration at the surface of the oxide semiconductor film, a layer which does not substantially contain indium can be formed at the surface. By using this layer as part of the insulating film, the characteristics of the interface between the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film are improved.
    Type: Application
    Filed: March 19, 2012
    Publication date: October 4, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kosei NODA, Noriyoshi SUZUKI
  • Patent number: 8277894
    Abstract: A selenium ink comprising selenium stably dispersed in a liquid medium is provided, wherein the selenium ink is hydrazine free and hydrazinium free. Also provided are methods of preparing the selenium ink and of using the selenium ink to deposit selenium on a substrate for use in the manufacture of a variety of chalcogenide containing semiconductor materials, such as, thin film transistors (TFTs), light emitting diodes (LEDs); and photo responsive devices (e.g., electrophotography (e.g., laser printers and copiers), rectifiers, photographic exposure meters and photo voltaic cells) and chalcogenide containing phase change memory materials.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: October 2, 2012
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: David Mosley, Kevin Calzia
  • Patent number: 8278657
    Abstract: To suppress deterioration in electrical characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer. Further, the silicon layer is provided in contact with at least a region of the oxide semiconductor layer, in which a channel is formed, and a source electrode layer and a drain electrode layer are provided in contact with regions of the oxide semiconductor layer, over which the silicon layer is not provided.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Hiromichi Godo, Takashi Shimazu
  • Publication number: 20120241736
    Abstract: In the transistor including an oxide semiconductor film, a gate insulating film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film, and the hydrogen capture film is formed on a side which is in contact with a gate electrode. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 27, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Yuta ENDO
  • Publication number: 20120241737
    Abstract: In the transistor including an oxide semiconductor film, which includes a film for capturing hydrogen from the oxide semiconductor film (a hydrogen capture film) and a film for diffusing hydrogen (a hydrogen permeable film), hydrogen is transferred from the oxide semiconductor film to the hydrogen capture film through the hydrogen permeable film by heat treatment. Specifically, a base film or a protective film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 27, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Yuta ENDO
  • Publication number: 20120241738
    Abstract: A semiconductor device having excellent electric characteristics and a method for manufacturing the semiconductor device are provided. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode; forming a gate insulating film to cover the gate electrode; forming an oxide semiconductor film over the gate insulating film; forming a hydrogen permeable film over the oxide semiconductor film; forming a hydrogen capture film over the hydrogen permeable film; performing heat treatment to release hydrogen from the oxide semiconductor film; forming a source electrode and a drain electrode to be in contact with a part of the oxide semiconductor film; and removing an exposed portion of the hydrogen capture film to form a channel protective film formed of the hydrogen permeable film. A semiconductor device manufactured by the above method is also provided.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 27, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuki IMOTO, Tetsunori MARUYAMA, Yuta ENDO
  • Patent number: 8274078
    Abstract: Provided is an oxynitride semiconductor comprising a metal oxynitride. The metal oxynitride contains Zn and In and at least one element selected from the group consisting of Ga, Sn, Mg, Si, Ge, Y, Ti, Mo, W, and Al. The metal oxynitride has an atomic composition ratio of N, N/(N+O), of 7 atomic percent or more to 80 atomic percent or less.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: September 25, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Naho Itagaki, Tatsuya Iwasaki, Masatoshi Watanabe, Toru Den
  • Publication number: 20120235140
    Abstract: In an embodiment, an insulating film is formed over a flat surface; a mask is formed over the insulating film; a slimming process is performed on the mask; an etching process is performed on the insulating film using the mask; a conductive film covering the insulating film is formed; a polishing process is performed on the conductive film and the insulating film, so that the conductive film and the insulating film have equal thicknesses; the conductive film is etched, so that a source electrode and a drain electrode which are thinner than the conductive film are formed; an oxide semiconductor film is formed in contact with the insulating film, the source electrode, and the drain electrode; a gate insulating film covering the oxide semiconductor film is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating film.
    Type: Application
    Filed: May 30, 2012
    Publication date: September 20, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideomi SUZAWA, Shinya SASAGAWA
  • Patent number: 8268666
    Abstract: A method for fabricating a field-effect transistor having a gate electrode, a source electrode, a drain electrode, and an active layer forming a channel region, the active layer having an oxide semiconductor mainly containing magnesium and indium is disclosed. The method includes a deposition step of depositing an oxide film, a patterning step of patterning the oxide film by processes including etching to obtain the active layer, and a heat-treatment step of heat-treating the obtained active layer subsequent to the patterning step.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: September 18, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Yukiko Abe, Naoyuki Ueda, Yuki Nakamura, Yuji Sone
  • Patent number: 8269218
    Abstract: One object is to provide a transistor including an oxide semiconductor film which is used for the pixel portion of a display device and has high reliability. A display device has a first gate electrode; a first gate insulating film over the first gate electrode; an oxide semiconductor film over the first gate insulating film; a source electrode and a drain electrode over the oxide semiconductor film; a second gate insulating film over the source electrode, the drain electrode and the oxide semiconductor film; a second gate electrode over the second gate insulating film; an organic resin film having flatness over the second gate insulating film; a pixel electrode over the organic resin film having flatness, wherein the concentration of hydrogen atoms contained in the oxide semiconductor film and measured by secondary ion mass spectrometry is less than 1×1016 cm?3.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: September 18, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20120228605
    Abstract: A semiconductor device includes an oxide semiconductor film including a pair of first regions, a pair of second regions, and a third region; a pair of electrodes in contact with the oxide semiconductor film; a gate insulating film over the oxide semiconductor film; and a gate electrode provided between the pair of electrodes with the gate insulating film interposed therebetween. The pair of first regions overlap with the pair of electrodes, the third region overlaps with the gate electrode, and the pair of second regions are formed between the pair of first regions and the third region. The pair of second regions and the third region each contain nitrogen, phosphorus, or arsenic. The pair of second regions have a higher element concentration than the third region.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 13, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Kosei NODA
  • Publication number: 20120228608
    Abstract: A sintered body including an oxide that includes In, Ga and Zn at the following atomic ratio and includes a compound having as a main component a homologous crystal structure represented by InGaO3(ZnO): 0.28?Zn/(In+Zn+Ga)?0.38 0.18?Ga/(In+Zn+Ga)?0.28.
    Type: Application
    Filed: November 18, 2010
    Publication date: September 13, 2012
    Inventors: Koki Yano, Masayuki Itose
  • Publication number: 20120223302
    Abstract: By using a coating method, which is a method of manufacturing a transparent conductive film, with low-temperature heating lower than 300° C., a transparent conductive film with excellent transparency, conductivity, film strength, and resistance stability and a method of manufacturing this film are provided. In the method of manufacturing a transparent conductive film, a heat energy ray irradiating step is a step of irradiating with the energy rays while heating under an oxygen-containing atmosphere to a heating temperature lower than 300° C. to form the inorganic film, and the plasma processing step is a step of performing the plasma processing on the inorganic film under a non-oxidizing gas atmosphere at a substrate temperature lower than 300° C. to promote mineralization or crystallization of the film, thereby forming a conductive oxide fine-particle layer densely packed with conductive oxide fine particles having a metal oxide as a main component.
    Type: Application
    Filed: November 5, 2010
    Publication date: September 6, 2012
    Applicant: Sumitomo Metal Mining Co., Ltd.
    Inventors: Masaya Yukinobu, Yuki Murayama, Takahito Nagano, Yoshihiro Otsuka
  • Publication number: 20120223308
    Abstract: The present invention provides a thin-film transistor capable of high-speed operation, a process for producing the same, and a display device including the same. The thin-film transistor of the present invention includes, on a substrate, in the order of: a gate electrode; a gate insulating film; an oxide semiconductor film; and a protective insulating film, the protective insulating film having a planar shape that is completely or substantially the same as the planar shape of the gate electrode.
    Type: Application
    Filed: June 17, 2010
    Publication date: September 6, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Yoshimasa Chikama
  • Patent number: 8253135
    Abstract: To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideki Uochi, Daisuke Kawae
  • Patent number: 8247266
    Abstract: A thin film transistor (TFT) using an oxide semiconductor layer as an active layer, a method of manufacturing the TFT, and a flat panel display (FPD) including the TFT are taught. The TFT includes a gate electrode formed on a substrate, an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer, and the oxide semiconductor layer including a channel region, a source region, and a drain region, and a source electrode and a drain electrode respectively electrically contacting the source region and the drain region. The oxide semiconductor layer is formed of an InZnO or IZO layer (indium zinc oxide layer) including Zr. The carrier density of the IZO layer is controlled to be 1×1013 to 1×1018 #cm?3 by controlling an amount of Zr.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: August 21, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jin-Seong Park, Kwang-Suk Kim, Jong-Han Jeong, Jae-Kyeong Jeong, Steve Y. G. Mo
  • Patent number: 8247812
    Abstract: An object is to suppress deterioration in electric characteristics in a transistor including an oxide semiconductor layer or a semiconductor device including the transistor. In a transistor in which a channel layer is formed using an oxide semiconductor, a silicon layer is provided in contact with a surface of the oxide semiconductor layer, an impurity semiconductor layer is provided over the silicon layer, and a source electrode layer and a drain electrode layer are provided to be electrically connected to the impurity semiconductor layer.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Hiromichi Godo, Takashi Shimazu
  • Patent number: 8247811
    Abstract: A thin-film transistor includes: a gate electrode formed on a substrate; an oxide semiconductor layer forming a channel region corresponding to the gate electrode; a first gate insulating film formed on the substrate and the gate electrode, and including a silicon nitride film; a second gate insulating film selectively formed to contact with the oxide semiconductor layer in a region, on the first gate insulating film, corresponding to the oxide semiconductor layer, and including one of a silicon oxide film and a silicon oxynitride film; a source/drain electrode; and a protecting film. An upper surface and a side surface of the oxide semiconductor layer and a side surface of the second gate insulating film are covered, on the first gate insulating film, by the source/drain electrode and the protecting film.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 21, 2012
    Assignee: Sony Corporation
    Inventors: Narihiro Morosawa, Takashige Fujimori
  • Publication number: 20120206685
    Abstract: Disclosed is an electrode film which does not exfoliate from, or diffuse into, an oxide semiconductor or an oxide thin film. An electrode layer comprises a highly adhesive barrier film being a Cu—Mg—Al thin film and a copper thin film; and an oxide semiconductor and an oxide thin film contact with the highly adhesive barrier film. With the highly adhesive barrier film having magnesium in a range of at least 0.5 at % but at most 5 at % and aluminum at least 5 at % but at most 15 at % when the total number of atoms of copper, magnesium, and aluminum is 100 at %, the highly adhesive barrier film has both adhesion and barrier properties. The electrode layer is suitable because a source electrode layer and a drain electrode layer contact the oxide semiconductor layer. A stopper layer having an oxide may be provided on a layer under the electrode layer.
    Type: Application
    Filed: February 22, 2012
    Publication date: August 16, 2012
    Applicant: ULVAC, INC.,
    Inventors: Satoru TAKASAWA, Masanori SHIRAI, Satoru ISHIBASHI
  • Patent number: 8242496
    Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: August 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Ikuko Kawamata
  • Patent number: 8242494
    Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: August 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka, Shunichi Ito, Miyuki Hosoba
  • Publication number: 20120199827
    Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.
    Type: Application
    Filed: December 19, 2011
    Publication date: August 9, 2012
    Inventors: Tetsuya Shibata, Hajime Watakabe, Atsushi Sasaki, Yuki Matsuura, Muneharu Akiyoshi, Hiroyuki Watanabe
  • Publication number: 20120187396
    Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 26, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Teruyuki FUJII, Sho NAGAMATSU
  • Publication number: 20120187395
    Abstract: A semiconductor element having high mobility, which includes an oxide semiconductor layer having crystallinity, is provided. The oxide semiconductor layer includes a stacked-layer structure of a first oxide semiconductor film and a second oxide semiconductor film having a wider band gap than the first oxide semiconductor film, which is in contact with the first oxide semiconductor film. Thus, a channel region is formed in part of the first oxide semiconductor film (that is, in an oxide semiconductor film having a smaller band gap) which is in the vicinity of an interface with the second oxide semiconductor film. Further, dangling bonds in the first oxide semiconductor film and the second oxide semiconductor film are bonded to each other at the interface therebetween. Accordingly, a decrease in mobility resulting from an electron trap or the like due to dangling bonds can be reduced in the channel region.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 26, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Junichi KOEZUKA
  • Publication number: 20120187399
    Abstract: Disclosed is a substrate for a flexible device which, when a TFT is produced on a flexible substrate in which a metal layer and a polyimide layer are laminated, can suppress deterioration of the electrical performance of the TFT due to the surface irregularities of the metal foil surface and can suppress detachment or cracks of the TFT. Also disclosed is a substrate for a thin film element which has excellent surface smoothness and is capable of suppressing deterioration of the characteristics of thin film elements. Also disclosed are methods for manufacturing substrates for thin film elements.
    Type: Application
    Filed: September 29, 2010
    Publication date: July 26, 2012
    Applicant: DAI NIPPON PRINTING CO., LTD.
    Inventors: Shunji Fukuda, Katsuya Sakayori, Keita Arihara, Koji Ichimura, Kei Amagai
  • Publication number: 20120181533
    Abstract: A thin film transistor array panel includes: an substrate; a gate line positioned on the substrate; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a gate insulating layer between the gate electrode of the thin film transistor and the semiconductor of the thin film transistor; a pixel electrode connected to the thin film transistor; and a passivation layer positioned between the pixel electrode and the thin film transistor, wherein at least one of the gate insulating layer and the passivation layer includes a silicon nitride layer, and the silicon nitride layer includes hydrogen content at less than 2×1022 cm3 or 4 atomic %.
    Type: Application
    Filed: September 23, 2011
    Publication date: July 19, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeong Suk YOO, Joo-Han KIM, Je Hun LEE, Seong-Hun KIM, Jung Kyu LEE, Chang Oh JEONG
  • Publication number: 20120181532
    Abstract: A metal oxide semiconductor structure and a production method thereof, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.
    Type: Application
    Filed: May 5, 2011
    Publication date: July 19, 2012
    Inventors: Chin-Wen LIN, Chuan-I HUANG, Chung-Chin HUANG, Ted Hong SHINN
  • Publication number: 20120175611
    Abstract: A thin film transistor having (a) an oxide semiconductor film including a channel region composed of an oxide semiconductor, and a source electrode region and a drain electrode region that are composed of the same oxide semiconductor as that of the channel region and have a higher carrier density than that of the channel region; (b) a gate insulating film; and (c) a gate electrode.
    Type: Application
    Filed: March 16, 2012
    Publication date: July 12, 2012
    Applicant: SONY CORPORATION
    Inventors: Shina Kirita, Toshitaka Kawashima
  • Publication number: 20120175608
    Abstract: The semiconductor device includes a gate electrode over a substrate, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A length of part of an outer edge of the oxide semiconductor layer from an outer edge of the source electrode to an outer edge of the drain electrode is more than three times, preferably more than five times as long as a channel length of the semiconductor device. Further, oxygen is supplied from the gate insulating layer to the oxide semiconductor layer by heat treatment. In addition, an insulating layer is formed after the oxide semiconductor layer is selectively etched.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20120175610
    Abstract: A manufacturing method of a semiconductor device includes the steps of: forming a gate electrode over a substrate; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film; performing heat treatment to form a second oxide semiconductor film after the step of forming the first oxide semiconductor film; forming a first conductive film; forming a first resist mask including regions whose thicknesses are different; etching the second oxide semiconductor film and the first conductive film using the first resist mask to form a third oxide semiconductor film and a second conductive film; reducing the size of the first resist mask to form a second resist mask; selectively etching the second conductive film using the second resist mask to remove a part of the second conductive film so that a source electrode and a drain electrode are formed.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20120175609
    Abstract: A first oxide insulating film is formed over a substrate. After a first oxide semiconductor film is formed over the first oxide insulating film, heat treatment is performed, so that hydrogen contained in the first oxide semiconductor film is released and part of oxygen contained in the first oxide insulating film is diffused into the first oxide semiconductor film. Thus, a second oxide semiconductor film with reduced hydrogen concentration and reduced oxygen defect is formed. Then, the second oxide semiconductor film is selectively etched to form a third oxide semiconductor film, and a second oxide insulating film is formed. The second oxide insulating film is selectively etched and a protective film covering an end portion of the third oxide semiconductor film is formed. Then, a pair of electrodes, a gate insulating film, and a gate electrode are formed over the third oxide semiconductor film and the protective film.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 12, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20120168748
    Abstract: An object of the present invention is to provide a novel semiconductor device which is excellent in stability, uniformity, reproducibility, heat resistance, durability and the like, and can exert excellent transistor properties. The semiconductor device is a thin-film transistor, and this thin-film transistor uses, as an active layer, a polycrystalline oxide semiconductor thin film containing In and two or more metals other than In and having an electron carrier concentration of less than 1×1018/cm3.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Koki Yano, Kazuyoshi Inoue
  • Publication number: 20120168744
    Abstract: A method of fabricating MO TFTs on transparent substrates by positioning opaque gate metal on the front surface of the substrate defining a gate area, depositing gate dielectric material on the front surface of the substrate, overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material on the gate dielectric material. Depositing etch stop material on the semiconductor material. Positioning photoresist on the etch stop material, the etch stop material and the photoresist being selectively removable, and the photoresist defining an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the rear surface of the substrate using the gate metal as a mask and removing exposed portions so as to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT.
    Type: Application
    Filed: August 2, 2011
    Publication date: July 5, 2012
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong
  • Publication number: 20120168749
    Abstract: A transistor includes a source terminal and a drain terminal, an active layer including an oxide containing In, a gate electrode, and a gate insulating layer between the gate electrode and the active layer. At least a part of the active layer is amorphous, and an electric current flowing between the source terminal and the drain terminal of the transistor is less than 10 ?A when the transistor is in an off state. In addition, the gate insulating layer contains hydrogen in an amount of less than 3×1021 atoms/cm3.
    Type: Application
    Filed: March 12, 2012
    Publication date: July 5, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masafumi Sano, Kenji Takahashi
  • Publication number: 20120168750
    Abstract: Provided is a bottom gate type thin film transistor including on a substrate (1) a gate electrode (2), a first insulating film (3) as a gate insulating film, an oxide semiconductor layer (4) as a channel layer, a second insulating film (5) as a protective layer, a source electrode (6), and a drain electrode (7), in which the oxide semiconductor layer (4) includes an oxide including at least one selected from the group consisting of In, Zn, and Sn, and the second insulating film (5) includes an amorphous oxide insulator formed so as to be in contact with the oxide semiconductor layer (4) and contains therein 3.8×1019 molecules/cm3 or more of a desorbed gas observed as oxygen by temperature programmed desorption mass spectrometry.
    Type: Application
    Filed: March 13, 2012
    Publication date: July 5, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryo Hayashi, Nobuyuki Kaji, Hisato Yabuta
  • Patent number: 8212248
    Abstract: An amorphous oxide at least includes: at least one element selected from the group consisting of In, Zn, and Sn; and Mo. An atomic composition ratio of Mo to a number of all metallic atoms in the amorphous oxide is 0.1 atom % or higher and 5 atom % or lower.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: July 3, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Naho Itagaki, Amita Goyal, Tatsuya Iwasaki
  • Publication number: 20120161139
    Abstract: A semiconductor circuit capable of controlling and holding the threshold voltage of a transistor at an optimal level and a driving method thereof are disclosed. A storage device, a display device, or an electronic device including the semiconductor circuit is also provided. The semiconductor circuit comprises a diode and a first capacitor provided in a node to which a transistor to be controlled is connected through its back gate. This structure allows the application of desired voltage to the back gate so that the threshold voltage of the transistor is controlled at an optimal level and can be held for a long time. A second capacitor connected in parallel with the diode is optionally provided so that the voltage of the node can be changed temporarily.
    Type: Application
    Filed: December 5, 2011
    Publication date: June 28, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masami ENDO, Kazuaki OHSHIMA
  • Patent number: 8207530
    Abstract: Provided are an oxide semiconductor and a thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of indium (In) oxide and hafnium (Hf) and may be a channel material of the thin film transistor.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: June 26, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-wook Kim, Sung-ho Park, Chang-jung Kim, Sun-il Kim
  • Patent number: 8207556
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device includes a group III nitride semiconductor supporting base, a GaN based semiconductor region, an active layer, and a GaN semiconductor region. The primary surface of the group III nitride semiconductor supporting base is not any polar plane, and forms a finite angle with a reference plane that is orthogonal to a reference axis extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region, grown on the semipolar primary surface, includes a semiconductor layer of, for example, an n-type GaN based semiconductor doped with silicon. A GaN based semiconductor layer of an oxygen concentration of 5×1016 cm?3 or more provides an active layer, grown on the primary surface, with an excellent crystal quality.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 26, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Takao Nakamura