Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Patent number: 8076741
    Abstract: A photo sensing element array substrate is provided. The photo sensing element array substrate includes a flexible substrate and a plurality of photo sensing elements. The photo sensing elements are disposed in array on the flexible substrate. Each of the photo sensing elements includes a photo sensing thin film transistor (TFT), an oxide semiconductor TFT and a capacitor. The photo sensing TFT is disposed on the flexible substrate. The oxide semiconductor TFT is disposed on the flexible substrate. The oxide semiconductor TFT is electrically connected to the photo sensing TFT. The capacitor is disposed on the flexible substrate and electrically connected between the photo sensing TFT and the oxide semiconductor TFT. When the photo sensing element array substrate is bent, it remains unaffected from normal operation.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 13, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Ming Lai, Yung-Hui Yeh
  • Publication number: 20110297931
    Abstract: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.
    Type: Application
    Filed: August 15, 2011
    Publication date: December 8, 2011
    Inventors: Dong-Ju YANG, Yu-Gwang JEONG, Ki-Yeup LEE, Sang-Gab KIM, Yun-Jong YEO, Shin-Il CHOI, Hong-Kee CHIN, Seung-Ha CHOI, Jung-Suk BANG
  • Publication number: 20110297930
    Abstract: A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Inventors: Seung-Ha CHOI, Kyoung-Jae Chung, Woo-Geun Lee
  • Patent number: 8071977
    Abstract: A thin film transistor and a manufacturing method thereof are provided. In the manufacturing method of the thin film transistor a semiconductive active layer and a semiconductor passivation layer are sequentially formed such that the semiconductor passivation layer protectively covers the semiconductive active layer. Then the stacked combination of the semiconductive active layer and semiconductor passivation layer are patterned by using a same patterning mask so that formed islands of the semiconductive active layer continue to be protectively covered by formed islands of the semiconductor passivation layer. In one embodiment, the semiconductive active layer is formed of a semiconductive oxide.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: December 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Kweon Heo, Min-Chul Shin, Chang-Mo Park
  • Publication number: 20110284836
    Abstract: A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a gate insulation layer and an oxide semiconductor pattern. The source and drain electrodes include a first metal element with a first oxide formation free energy. The oxide semiconductor pattern has a first surface making contact with the gate insulation layer and a second surface making contact with the source and drain electrodes to be positioned at an opposite side of the first surface. The oxide semiconductor pattern includes an added element having a second oxide formation free energy having an absolute value greater than or equal to an absolute value of the first oxide formation free energy, wherein an amount of the added element included in a portion near the first surface is zero or smaller than an amount of the added element included in a portion near the second surface.
    Type: Application
    Filed: April 5, 2011
    Publication date: November 24, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Jae-Woo PARK, Byung-Du AHN, Sei-Yong PARK, Jun-Hyun PARK
  • Publication number: 20110278567
    Abstract: The present invention generally comprises TFTs having semiconductor material comprising oxygen, nitrogen, and one or more element selected from the group consisting of zinc, tin, gallium, cadmium, and indium as the active channel. The semiconductor material may be used in bottom gate TFTs, top gate TFTs, and other types of TFTs. The TFTs may be patterned by etching to create both the channel and the metal electrodes. Then, the source-drain electrodes may be defined by dry etching using the semiconductor material as an etch stop layer. The active layer carrier concentration, mobility, and interface with other layers of the TFT can be tuned to predetermined values. The tuning may be accomplished by changing the nitrogen containing gas to oxygen containing gas flow ratio, annealing and/or plasma treating the deposited semiconductor film, or changing the concentration of aluminum doping.
    Type: Application
    Filed: July 26, 2011
    Publication date: November 17, 2011
    Inventor: Yan YE
  • Publication number: 20110278563
    Abstract: A thin film transistor array substrate includes a substrate, a gate layer, a gate insulating layer, a source/drain layer, a patterned protective layer, an oxide semiconductor layer, a resin layer and a pixel electrode. The gate layer is disposed on the substrate. The gate insulating layer is disposed on the gate layer and the substrate. The source/drain layer is disposed on the gate insulating layer. The patterned protective layer is disposed on the source/drain layer and exposes a portion of the source/drain layer. The oxide semiconductor layer is disposed on the patterned protective layer and electrically connected to the source/drain layer. The resin layer is disposed on the oxide semiconductor layer and covers the oxide semiconductor layer. The pixel electrode is disposed on the resin layer and connects to the source/drain layer. The present invention also provides a method for making the thin film transistor array substrate. The thin film transistor array substrate can prevent leakage current.
    Type: Application
    Filed: July 16, 2010
    Publication date: November 17, 2011
    Applicant: E Ink Holdings Inc.
    Inventors: SUNG-HUI HUANG, Wei-Chou Lan, Ted-Hong Shinn
  • Patent number: 8058647
    Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: November 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Kengo Akimoto, Toshinari Sasaki
  • Publication number: 20110272696
    Abstract: A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.
    Type: Application
    Filed: April 22, 2011
    Publication date: November 10, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-Young RYU, Jin-Won LEE, Woo-Geun LEE, Hee-Jun BYEON, Xun ZHU
  • Patent number: 8049225
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
  • Publication number: 20110260171
    Abstract: A semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed. The transistor including the oxide semiconductor film subjected to the dehydration or dehydrogenation by the heat treatment and the oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
    Type: Application
    Filed: April 21, 2011
    Publication date: October 27, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei Yamazaki
  • Publication number: 20110260157
    Abstract: A semiconductor device, a thin film transistor, and a method for producing the same capable of decreasing the management cost, and capable of decreasing the production steps to reduce the production cost are proposed. A method for producing a thin film transistor 2 provided with a semiconductor which is composed of a prescribed material and serves as an active layer 41 and a conductor which is composed of a material having the same composition as that of the prescribed material and serves as at least one of a source electrode 51, a drain electrode 53 and a pixel electrode 55, which includes the steps of simultaneously forming into a film an object to be processed and a conductor (a source electrode 51, a source wire 52, a drain electrode 53, a drain wire 54 and a pixel electrode 55) which are composed of the amorphous prescribed material, followed by simultaneous shaping, and crystallizing the object to be processed which has been shaped to allow it to be the active layer 41.
    Type: Application
    Filed: May 1, 2008
    Publication date: October 27, 2011
    Inventors: Koki Yano, Kazuyoshi Inoue, Futoshi Utsuno, Masashi Kasami, Katsunori Honda
  • Publication number: 20110260160
    Abstract: An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Inventors: Tatsuya Honda, Yasuyuki Arai
  • Patent number: 8039926
    Abstract: The present invention provides a doped homojunction chalcogenide thin film transistor and a method of fabricating the same, comprising forming an N-type chalcogenide layer constituting a channel layer on a substrate, forming and patterning a diffusion prevention layer on the upper part of the N-type chalcogenide layer, and forming a P-type chalcogenide layer constituting source and drain regions by depositing and diffusing Te alloy on the N-type chalcogenide layer. With the present invention, a thin film transistor can be fabricated using chalcogenide material having N-type conductivity and chalcogenide material having P-type conductivity.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: October 18, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kibong Song, Sangsu Lee
  • Patent number: 8039836
    Abstract: In the present invention, a thin film transistor is formed on a plastic film substrate (1) having anisotropy of thermal shrinkage rate or coefficient of thermal expansion in in-plane directions of the substrate. A channel is formed such that the direction (7) in which the thermal shrinkage rate or the coefficient of thermal expansion of the substrate is largest is nonparallel to the direction (8) of a current flowing through the channel of the thin film transistor. Then, a thin film transistor having stable and uniform electrical characteristics, which is formed on the plastic film substrate, is provided.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: October 18, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Chienliu Chang
  • Publication number: 20110248262
    Abstract: A display device including an oxide thin film transistor (TFT) is disclosed. A nitride-based gate insulating layer of a gate pad area is etched when an oxide semiconductor layer of a pixel area is etched by using a half-tone mask, a metal layer is formed at a contact hole of the etched gate insulting layer, and then a passivation layer formed thereon is etched. Thus, an overhang of the passivation layer can be prevented from being generated when the gate insulating layer is etched, and accordingly, the fabrication process can be simplified.
    Type: Application
    Filed: June 22, 2011
    Publication date: October 13, 2011
    Inventors: Im-Kuk Kang, Dae-Won Kim
  • Publication number: 20110248261
    Abstract: An object is to manufacture a semiconductor device with high reliability by providing the semiconductor device including an oxide semiconductor with stable electric characteristics. In a transistor including an oxide semiconductor layer, a gallium oxide film is used for a gate insulating layer and made in contact with an oxide semiconductor layer. Further, gallium oxide films are provided so as to sandwich the oxide semiconductor layer, whereby reliability is increased. Furthermore, the gate insulating layer may have a stacked structure of a gallium oxide film and a hafnium oxide film.
    Type: Application
    Filed: April 5, 2011
    Publication date: October 13, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei Yamazaki
  • Patent number: 8035100
    Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kap-Soo Yoon, Sung-Hoon Yang, Byoung-June Kim, Czang-Ho Lee, Sung-Ryul Kim, Hwa-Yeul Oh, Jae-Ho Choi, Yong-Mo Choi
  • Publication number: 20110240988
    Abstract: A field effect transistor including: a substrate, and at least gate electrode, a gate insulating film, a semiconductor layer, a protective layer for the semiconductor layer, a source electrode and a drain electrode provided on the substrate, wherein the source electrode and the drain electrode are connected with the semiconductor layer therebetween, the gate insulating film is between the gate electrode and the semiconductor layer, the protective layer is on at least one surface of the semiconductor layer, the semiconductor layer includes an oxide containing In atoms, Sn atoms and Zn atoms, the atomic composition ratio of Zn/(In+Sn+Zn) is 25 atom % or more and 75 atom % or less, and the atomic composition ratio of Sn/(In+Sn+Zn) is less than 50 atom %.
    Type: Application
    Filed: August 26, 2009
    Publication date: October 6, 2011
    Inventors: Koki Yano, Hirokazu Kawashima, Kazuyoshi Inoue
  • Publication number: 20110240987
    Abstract: A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a first gate electrode and an active layer including a crystalline oxide semiconductor which is insulated from the first gate electrode by a first insulating layer and the active layer is arranged to overlap the first gate electrode. A source electrode is formed including at least a portion overlaps the active layer, and a drain electrode is arranged being spaced apart from the source electrode and at least a portion of the drain electrode overlaps the active layer, wherein the source electrode and the drain electrode are insulated from the first gate electrode by the first insulating layer.
    Type: Application
    Filed: March 16, 2011
    Publication date: October 6, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Joo-Han KIM
  • Patent number: 8030195
    Abstract: An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate includes: a substrate; a gate electrode and a gate wire formed above the substrate; a gate insulating film formed above the gate electrode and the gate wire; a first oxide layer formed above the gate insulating film which is formed at least above the gate electrode; and a second oxide layer formed above the first oxide layer; wherein at least a pixel electrode is formed from the second oxide layer.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: October 4, 2011
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Kazuyoshi Inoue, Koki Yano, Nobuo Tanaka, Tokie Tanaka, legal representative
  • Patent number: 8030663
    Abstract: A semiconductor device including thin film transistors having high electrical properties and reliability is proposed. Further, a method for manufacturing the semiconductor devices with mass productivity is proposed. The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: October 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Publication number: 20110233537
    Abstract: An oxide thin film transistor includes a substrate, a gate layer, an oxide film and a gate insulating layer. The gate layer is disposed on the substrate. The oxide film is disposed on the substrate, and has a source region, a drain region and a channel region. The channel region is located between the source region and the drain region and corresponds to the gate layer. The electric conductivity of the source region and the drain region is greater than that of the channel region. The gate insulating layer is disposed on the substrate and located between the gate layer and the oxide film.
    Type: Application
    Filed: July 21, 2010
    Publication date: September 29, 2011
    Applicant: E Ink Holdings Inc.
    Inventors: Fang-An SHU, Ted-Hong Shinn, Sung-Hui Huang, Lee-Ting Chen, Yung-Sheng Chang
  • Publication number: 20110233536
    Abstract: A thin film transistor array panel including an oxide semiconductor layer realizing excellent stability and electrical characteristics and an easy method of manufacturing the same are provided. A thin film transistor array panel includes: a substrate; an oxide semiconductor layer disposed on the substrate and including a metal oxide selected from the group consisting of zinc oxide, tin oxide, and hafnium oxide; a gate electrode overlapping the oxide semiconductor layer; a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode disposed to at least partially overlap the oxide semiconductor layer and separated from each other.
    Type: Application
    Filed: July 20, 2010
    Publication date: September 29, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Min KIM, Yeon-Taek JEONG, Seon-Pil JANG, Seung-Hwan CHO, Bo-Sung KIM, Tae-Young CHOI
  • Publication number: 20110227072
    Abstract: A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroki INOUE, Takanori MATSUZAKI, Shuhei NAGATSUKA
  • Publication number: 20110215318
    Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Jun KOYAMA
  • Publication number: 20110215325
    Abstract: A highly purified oxide semiconductor layer is formed in such a manner that a substance that firmly bonds during film formation to an impurity containing a hydrogen atom is introduced into a film formation chamber, the substance is reacted with the impurity containing a hydrogen atom remaining in the film formation chamber, and the substance is changed to a stable substance containing the hydrogen atom. The stable substance containing the hydrogen atom is exhausted without providing a metal atom of an oxide semiconductor layer with the hydrogen atom; therefore, a phenomenon in which a hydrogen atom or the like is taken into the oxide semiconductor layer can be prevented. As the substance that firmly bonds to the impurity containing a hydrogen atom, a substance containing a halogen element is preferable, for example.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Kunihiko SUZUKI
  • Publication number: 20110215319
    Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
    Type: Application
    Filed: May 10, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Jun KOYAMA
  • Publication number: 20110210325
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Application
    Filed: August 30, 2010
    Publication date: September 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masayuki SAKAKURA, Yoshiaki OIKAWA, Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA
  • Patent number: 8008658
    Abstract: A thin film transistor (TFT) using an oxide semiconductor layer as an active layer, a method of manufacturing the TFT, and a flat panel display (FPD) including the TFT are taught. The TFT includes a gate electrode formed on a substrate, an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer, and the oxide semiconductor layer including a channel region, a source region, and a drain region, and a source electrode and a drain electrode respectively electrically contacting the source region and the drain region. The oxide semiconductor layer is formed of an InZnO or IZO layer (indium zinc oxide layer) including Zr. The carrier density of the IZO layer is controlled to be 1×1013 to 1×1018 #cm?3 by controlling an amount of Zr.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: August 30, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Jin-Seong Park, Kwang-Suk Kim, Jong-Han Jeong, Jae-Kyeong Jeong, Steve Y. G. Mo
  • Publication number: 20110204370
    Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 25, 2011
    Inventors: Kap-Soo Yoon, Woo-Geun Lee, Bong-Kyun Kim, Sung-Hoon Yang, Ki-Won Kim, Hyun-Jung Lee
  • Patent number: 8003981
    Abstract: The present invention provides a field effect transistor including an oxide film as a semiconductor layer, wherein the oxide film includes one of a source part and a drain part to which one of hydrogen and deuterium is added.
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: August 23, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tatsuya Iwasaki, Hideya Kumomi
  • Publication number: 20110198586
    Abstract: A thin film transistor including a gate electrode, a gate-insulating film, an oxide semiconductor film in contact with the gate-insulating film, and source and drain electrodes which connect to the oxide semiconductor film and are separated with a channel part therebetween, wherein the oxide semiconductor film comprises a crystalline indium oxide which includes hydrogen element, and the content of the hydrogen element contained in the oxide semiconductor film is 0.1 at % to 5 at % relative to all elements which form the oxide semiconductor film.
    Type: Application
    Filed: October 19, 2009
    Publication date: August 18, 2011
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi Inoue, Koki Yano, Shigekazu Tomai, Masashi Kasami, Hirokazu Kawashima, Futoshi Utsuno
  • Publication number: 20110198594
    Abstract: It is an object to provide a semiconductor device having excellent electric characteristics or high reliability, or a manufacturing method thereof. A semiconductor device including a gate electrode, an oxide semiconductor layer overlapping with the gate electrode, a source electrode and a drain electrode in contact with the oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer is provided. The oxide semiconductor layer is formed by a facing target sputtering method. The carrier concentration of the oxide semiconductor is less than 1×1012/cm3.
    Type: Application
    Filed: February 8, 2011
    Publication date: August 18, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei Yamazaki
  • Patent number: 7999255
    Abstract: A method of depositing a film of a metal chalcogenide including the steps of: contacting an isolated hydrazinium-based precursor of a metal chalcogenide and a solvent having therein a solubilizing additive to form a solution of a complex thereof; applying the solution of the complex onto a substrate to produce a coating of the solution on the substrate; removing the solvent from the coating to produce a film of the complex on the substrate; and thereafter annealing the film of the complex to produce a metal chalcogenide film on the substrate. Also provided is a process for preparing an isolated hydrazinium-based precursor of a metal chalcogenide as well as a thin-film field-effect transistor device using the metal chalcogenides as the channel layer.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: David B. Mitzi, Matthew W. Copel
  • Publication number: 20110193083
    Abstract: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include source and drain electrodes formed on a substrate; an active layer formed of an oxide semiconductor disposed on the source and drain electrodes; a gate electrode; and an interfacial stability layer formed on at least one of top and bottom surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0eV. Since the interfacial stability layer has the same characteristics as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.
    Type: Application
    Filed: April 21, 2011
    Publication date: August 11, 2011
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Min-Kyu KIM, Jong-Han JEONG, Tae-Kyung AHN, Jae-Kyeong JEONG, Yeon-Gon MO, Jin-Seong PARK, Hyun-Joong CHUNG, Kwang-Suk KIM, Hui-Won YANG
  • Publication number: 20110180789
    Abstract: Thin-film transistors are made using an organosilicate glass (OSG) as an insulator material. The organosilicate glasses may be SiO2-silicone hybrid materials deposited by plasma-enhanced chemical vapor deposition from siloxanes and oxygen. These hybrid materials may be employed as the gate dielectric, as a subbing layer, and/or as a back channel passivating layer. The transistors may be made in any conventional TFT geometry.
    Type: Application
    Filed: July 30, 2009
    Publication date: July 28, 2011
    Inventors: Lin Han, Prashant Mandlik, Sigurd Wagner
  • Publication number: 20110175088
    Abstract: A thin-film transistor (TFT) substrate having reduced defects is fabricated using a reduced number of masks. The TFT substrate includes gate wiring formed on a substrate. The gate wiring includes a gate electrode. A semiconductor pattern is formed on the gate wiring. An etch-stop pattern is formed on the semiconductor pattern. Data wiring includes a source electrode which is formed on the semiconductor pattern and the etch-stop pattern. Each of the gate wiring and the data wiring includes a copper-containing layer and a buffer layer formed on or under the copper-containing layer.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 21, 2011
    Inventors: Jong In Kim, Young-Wook Lee, Jean-Ho Song, Jae-Hyoung Yoon, Sung-Ryul Kim, Byeong-Beom Kim, Je-Hyeong Park, Woo-Geun Lee
  • Publication number: 20110175674
    Abstract: Disclosed is a method of driving a transistor including a semiconductor layer, a first insulating layer, a second insulating layer, a first conductive layer, and a second conductive layer such that the semiconductor layer is disposed between the first and second insulating layers, one surface of the first insulating layer opposite the other surface in contact with the semiconductor layer is in contact with the first conductive layer, one surface of the second insulating layer opposite the other surface in contact with the semiconductor layer is in contact with the second conductive layer. The method includes applying a voltage VBG that satisfies the relation of VBG?VON1×C1/(C1+C2) to the second conductive layer.
    Type: Application
    Filed: January 13, 2011
    Publication date: July 21, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisae Shimizu, Katsumi Abe, Ryo Hayashi
  • Patent number: 7982215
    Abstract: An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate includes: a substrate; a gate electrode and a gate wire formed above the substrate; a gate insulating film formed above the gate electrode and the gate wire; a first oxide layer formed above the gate insulating film which is formed at least above the gate electrode; and a second oxide layer formed above the first oxide layer; wherein at least a pixel electrode is formed from the second oxide layer.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: July 19, 2011
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Kazuyoshi Inoue, Koki Yano, Nobuo Tanaka, Tokie Tanaka, legal representative
  • Publication number: 20110168997
    Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 14, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Wook LEE, Woo-Geun LEE, Ki-Won KIM, Hyun-Jung LEE, Ji-Soo OH
  • Publication number: 20110168994
    Abstract: Disclosed is a sputtering target that can suppress the occurrence of anomalous discharge in the formation of an oxide semiconductor film by sputtering method and can continuously and stably form a film. Also disclosed is an oxide for a sputtering target that has a rare earth oxide C-type crystal structure and has a surface free from white spots (a poor appearance such as concaves and convexes formed on the surface of the sputtering target). Further disclosed is an oxide sintered compact that has a bixbyite structure and contains indium oxide, gallium oxide, and zinc oxide. The composition amounts (atomic %) of indium (In), gallium (Ga), and zinc (Zn) fall within a composition range satisfying the following formula: In/(In+Ga+Zn)<0.
    Type: Application
    Filed: June 5, 2009
    Publication date: July 14, 2011
    Inventors: Hirokazu Kawashima, Koki Yano, Futoshi Utsuno, Kazuyoshi Inoue
  • Patent number: 7977706
    Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: July 12, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Publication number: 20110163307
    Abstract: A method for forming a thin-film transistor (TFT) includes providing a substrate, forming a first patterned conducting layer on the substrate, forming an organic dielectric layer on the first patterned conducting layer and the substrate, forming a seeding layer on the organic dielectric layer, using the seeding layer as a crystal growing base to form an inorganic semiconductor layer on the seeding layer, and forming a second patterned conducting layer on the inorganic semiconductor layer.
    Type: Application
    Filed: January 4, 2010
    Publication date: July 7, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: CHING-FUH LIN, CHUN-YU LEE
  • Patent number: 7972931
    Abstract: The present invention relates to a method of manufacturing thin-film transistors using nanoparticles and thin film transistors manufactured by the method. A hydrophilic buffer layers are deposited on the substrates to facilitate formation of nanoparticle films. Sintered nanoparticles are used as an active layer and dielectric materials of high dielectric coefficient are also used as a gate dielectric layer to form a top gate electrode on the gate dielectric layer, thereby enabling low-voltage operation and low-temperature fabrication.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: July 5, 2011
    Assignee: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Sangsig Kim, Kyoung-Ah Cho, Dong-Won Kim, Jae-Won Jang
  • Publication number: 20110156021
    Abstract: A thin film transistor for increasing the conductivity of a channel region and suppressing the leakage current of a back channel region, and a display device including the thin film transistor, are discussed. According to an embodiment, the thin film transistor includes a gate electrode arranged on a substrate, a source electrode and a drain electrode spaced from each other on the substrate, a gate insulating film to insulate the gate electrode from the source electrode and the drain electrode, and a semiconductor layer insulated from the gate electrode through the gate insulating film, the semiconductor layer including a channel region and a back channel region, the semiconductor layer made of (In2O3)x(Ga2O3)y(ZnO)z(0?x?5, 0?y?5, 0?z?5), wherein X or Z is greater than Y in the channel region of the semiconductor layer, and Y is greater than X and Z in the back channel region of the semiconductor layer.
    Type: Application
    Filed: July 12, 2010
    Publication date: June 30, 2011
    Inventors: Jae-Seok HEO, Ji-Yeon Seo
  • Publication number: 20110156020
    Abstract: Provided is a transistor including a semiconductor insertion layer between a channel layer and a source electrode. A potential barrier between the channel layer and the source electrode may be increased by the semiconductor insertion layer. The channel layer may be an oxide semiconductor layer. The transistor may be an enhancement mode transistor.
    Type: Application
    Filed: June 11, 2010
    Publication date: June 30, 2011
    Inventors: Sang-hun Jeon, I-hun Song, Chang-jung Kim, Sung-ho Park
  • Publication number: 20110147740
    Abstract: The present invention discloses a thin film transistor (TFT), a method for manufacturing the TFT, and a display substrate using the TFT that may prevent degradation of the characteristics of an oxide semiconductor contained in the TFT by blocking external light from entering a channel region of the oxide semiconductor.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 23, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Hun JEONG, Do-Hyun KIM, Dong-Hoon LEE, Kap-Soo YOON, Jae-Ho CHOI, Sung-Hoon YANG, Pil-Sang YUN, Seung-Mi SEO
  • Publication number: 20110147733
    Abstract: A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode.
    Type: Application
    Filed: May 10, 2010
    Publication date: June 23, 2011
    Inventors: Yih-Chyun KAO, Chun-Nan Lin, Li-Kai Chen, Wen-Ching Tsai
  • Publication number: 20110147734
    Abstract: Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light.
    Type: Application
    Filed: June 14, 2010
    Publication date: June 23, 2011
    Inventors: Sang-wook Kim, Sun-il Kim, Chang-jung Kim, Jae-chul Park