Abstract: An ocscillator circuit having: a) a piezoelectric crystal connected to a surface; b) a variable frequency generator for generating a driving signal which is supplied to the crystal to cause the crystal to oscillate, thereby causing the surface to oscillate; and, c) an analyser for monitoring the phase shift between the voltage across the crystal and the current flowing through it and, in response generating an adjustment signal which relates to the difference between the oscillation frequency and a resonant frequency of the crystal, the variable frequency generator being responsive to the adjustment signal to vary the frequency of the driving signal to cause the crystal to oscillate at the resonant frequency.

Abstract: There is provided an electronic device for receiving an input data signal and an input clock signal that indicates a timing to obtain the input data signal. The electronic device includes a first adjusting section that adjusts a phase difference between the input data signal and the input clock signal so as to be equal to a first phase difference, and outputs the resulting signals as a first data signal and a first clock signal, a phase varying section that outputs a second clock signal having a designated phase difference with respect to the first clock signal, and a second adjusting section that adjusts the phase difference of the second clock signal with respect to the first clock signal so as to be equal to a second phase difference, based on a result of obtaining the first clock signal at a varying timing of the second clock signal.

Abstract: A measurement and correction method provides for a complete full correction of a true-mode system using only the single ended error matrix developed for 4 port correction of single ended measurements. The degree of misalignment of the balanced sources may be determined from these measurements.

Abstract: An apparatus for measuring voltage in a broadband over power line system including a first load having a first predetermined impedance, and a second load having a second predetermined impedance. Wherein the apparatus is contained within a capacitor-based BPL coupler. Also a method of measuring a voltage and a phase angle in a broadband over power line system comprising attaching a voltage divider to a medium voltage power line, measuring a voltage and a phase angle at said voltage divider and calculating said voltage and the phase angle based on the measured voltage and the measured phase angle. Wherein the voltage divider may be placed within a coupler along the broadband over power line system.

Abstract: The present invention determines the resonant frequency of a sensor by adjusting the phase and frequency of an energizing signal until the frequency of the energizing signal matches the resonant frequency of the sensor. The system energizes the sensor with a low duty cycle, gated burst of RF energy having a predetermined frequency or set of frequencies and a predetermined amplitude. The energizing signal is coupled to the sensor via magnetic coupling and induces a current in the sensor which oscillates at the resonant frequency of the sensor. The system receives the ring down response of the sensor via magnetic coupling and determines the resonant frequency of the sensor, which is used to calculate the measured physical parameter. The system uses a pair of phase locked loops to adjust the phase and the frequency of the energizing signal.

Abstract: A jitter measurement circuit and a method for calibrating the jitter measurement circuit are disclosed. The jitter measurement circuit includes a synchronous dual-phase detector and a decision circuit. In a test mode, a probability distribution function (PDF) of the jitter of a clock signal output by a circuit under test is obtained. In a calibration mode, a random clock, which is externally generated or generated by a free-run oscillator in the circuit under test, is used to calibrate the synchronous dual-phase detector. The decision circuit performs logic operations, data latching and counting on a phase relationship detected by the synchronous dual-phase detector in order to obtain a counting value and a PDF relative to the jitter of the clock signal.

Abstract: The rotation phase angle measuring device measures a voltage instantaneous value of an electric power system in a period of 1/(4 N) of one period of a reference wave and integrates voltage amplitude of a squared value of the voltage instantaneous value in arbitrary timing for measuring the voltage instantaneous value. The rotation phase angle measuring device calculates chord lengths of the voltage rotation vectors in the above two timings by the integral arithmetic calculation with respect to a difference between two measured adjacent voltage instantaneous values in one pitch period including the above timing. The rotation phase angle measuring device also has a rotation phase angle calculator for calculating a phase angle of the voltage rotation vector in one pitch period including the above timing on the basis of the voltage amplitude value and the chord length value calculated by the above calculations.

Abstract: Techniques for inline measurement of switching delay history effects in an integrated circuit device are provided. A pulse is launched down a delay chain. The pulse is substantially synchronized with a signal of a ring oscillator. The delay chain and the ring oscillator comprise substantially identical gates to a defined point on the ring oscillator corresponding to a far end of the delay chain. At least one difference in a number of gates traversed by an edge of the signal in the ring oscillator and a number of gates traversed by a corresponding edge of the pulse in the delay chain is measured when the pulse reaches the far end of the delay chain. One or more switching histories in the integrated circuit device are determined in accordance with the at least one measured difference in the number of gates traversed by an edge of the signal and a corresponding edge of the pulse.

Abstract: System and method for specifying a signal analysis function. First user input is received, e.g., to a graphical user interface (GUI), indicating a parameter for a first operation implementing at least a portion of the function. The first operation is programmatically included in a sweep loop. Second user input is received specifying a sweep configuration for a sweep on the parameter. The signal includes signal data, e.g., signal plot data or tabular data. The sweep configuration includes: a range of values for the indicated parameter, a number of iterations for the sweep, an interpolation type, step size for the sweep on the indicated parameter, specific values in the range of values for the parameter, source for at least some of the sweep configuration, and/or resultant data. The sweep is performed on the parameter per the sweep configuration, generating resultant data which is stored, and optionally displayed, e.g., in the GUI.

Abstract: The present invention determines the resonant frequency of a wireless sensor by adjusting the phase and frequency of an energizing signal until the frequency of the energizing signal matches the resonant frequency of the sensor. The system energizes the sensor with a low duty cycle, gated burst of RF energy having a predetermined frequency. The system receives the ring down response of the sensor and determines the resonant frequency of the sensor, which is used to calculate a physical parameter. The system uses a pair of phase locked loops to adjust the phase and the frequency of the energizing signal. The system identifies false locks by detecting an unwanted beat frequency in the coupled signal, as well as determining whether the coupled signal exhibits pulsatile characteristics that correspond to a periodic physiological characteristic, such as blood pressure.

Abstract: Aspects of the present invention determine the resonant frequency of a sensor by obtaining sensor signals in response to three energizing signals, measuring the phase of each sensor signal, and using a group phase delay to determine the resonant frequency. The phase difference between the first and second signal is determined as a first group phase delay. The phase difference between the second and third signal is determined as a second group phase delay. The first group phase delay and second group phase delay are compared. Based on the comparison, the system may lock on the resonant frequency of the sensor or adjust a subsequent set of three energizing signals.

Abstract: Provided are an apparatus and method for estimating carrier frequency offset in a communication terminal operating in a communication system supporting Orthogonal Frequency Division Multiplexing (OFDM) or Orthogonal Frequency Division Multiplexing Access (OFDMA). More particularly, provided are a method of estimating carrier frequency offset in a communication terminal supporting DownLink (DL) Full Usage of SubChannel (FUSC) and DL Band-Adaptive Modulation and Coding (AMC) channel modes in a wireless communication system based on one of Institute of Electrical and Electronic Engineers (IEEE) 802.16d/e, Wireless Broadband (WiBro), and Worldwide interoperability for Microwave Access (WiMAX) standards, and a communication terminal performing the method.

Abstract: Disclosed are a digital phase-frequency detector and a method of operating a digital phase-frequency detector. The detector includes an input circuit, an output circuit and a reset circuit. In use, the input circuit receives first and second input signals during a plurality of cycles, and during a given one of the cycles, generates a first intermediate signal or a second intermediate signal depending on which of the first and second input signals was received first during that given one of said cycles. The output circuit receives these intermediate signals, and outputs, during said one cycle, a first output signal or a second output signal depending on which one of intermediate signals was received by the output circuit during said one cycle. The reset circuit applies a reset signal to the input circuit under defined conditions to begin a new one of said plurality of cycles.

Abstract: A method of measuring the frequency of a received signal comprising the steps of: generating a first phase signal by digitising the phase of the received signal; delaying the first phase signal by a predetermined amount to generate a second phase signal; calculating a phase difference between the first and the second phase signals; and calculating the frequency of the input signal from the phase difference.

Abstract: The clock based voltage deviation detector of the present invention includes a pulse module, an indicator module and a correlation module. The pulse module generates a stream of reset pulses as a function of a clock signal. The indicator module generates a pass/fail indicator signal as a function of the reset pulse stream and a difference between an input signal and a reference voltage. The correlation module correlates an event (e.g., overvoltage or undervoltage) of the pass/fail indicator signal with a period of the clock signal at which the event occurred.

Abstract: A high frequency delay circuit operable to output a high frequency signal delayed for a desired delay time. The high frequency delay circuit includes: a variable delay circuit operable to receive a reference signal of which a frequency is lower than the high frequency signal, and to output a delay reference signal delayed from the reference signal for the desired delay time in advance; and a multiplier operable to generate the high frequency signal, of which a frequency is a frequency of the delay reference signal multiplied by a predetermined value, and to output the generated high frequency signal at timing according to a phase of the delay reference signal.

Abstract: A system and method for determining the relative phase between current-carrying conductors. A reference unit samples and digitizes a voltage waveform at a reference location and transmits the digitized voltage waveform. A field sampling unit is placed on or directly adjacent a field conductor at a field location and transmits a signal representative of the voltage waveform of the field conductor. A field unit receives and digitizes the waveform received from the field sampling unit, and receives the digitized voltage waveform from the reference unit, and compares the digitized field waveform and the digitized reference waveform.

Abstract: A plasma generating method generates plasma in a treating chamber by controlling a high-frequency generating unit to generate a high-frequency signal and by feeding the high-frequency signal to the treating chamber through an impedance matching device. The plasma generating method includes controlling the impedance matching device, when the plasma is generated in the treating chamber, so as to satisfy a preset matching condition, and then controlling the high-frequency generating unit to generate and feed the high-frequency signal of the power generating the plasma, to the treating chamber.

Abstract: A method of determining a rotational state of a three-phase alternating voltage supply which is connected to a converter and rotating in an uncontrolled manner, wherein the converter is connected to an intermediate voltage circuit and comprises phase-specific upper and lower controllable switches, which are connected in series between the intermediate voltage circuit, free-wheeling diodes connected in parallel with each of the controllable switches, and resistive circuits connected in parallel with the lower controllable switches.

Abstract: The rotation phase angle measuring device measures a voltage instantaneous value of an electric power system in a period of 1 4N-th (N is a positive integer) of one period of a reference wave when the voltage instantaneous value of the electric power system is expressed by a voltage rotation vector on a complex plane. The rotation phase angle measuring device calculates a voltage amplitude value by an integral arithmetic calculation of a squared value of the voltage instantaneous value in arbitrary timing for measuring the voltage instantaneous value. The rotation phase angle measuring device calculates chord lengths of the voltage rotation vectors in the above two timings by the integral arithmetic calculation with respect to a difference between two measured adjacent voltage instantaneous values in one pitch period including the above timing.

Abstract: In an electronic device having an interface circuit which operates using a fast clock source, frequency deviation of the clock source is inspected in the mounted state. The clock pulses of the fast clock source are counted in synchronization with an electronic device serving as reference, and the result is checked; or, alignment data of transfer data and overflow/underflow of the FIFO buffer are utilized; or, the count values of an internal counter and a fast clock counter are utilized, to check for frequency deviation of the fast clock source. In the state of being mounted in the device, tests can be performed of the clock sources of all units.

Abstract: A novel method is described that enables the measurement of the phase of the spectral components generated by an harmonic phase reference generator without using a calibrated sampling oscilloscope. First one uses a vector network analyzer to measure the output reflection coefficient of an harmonic phase transfer standard and of the harmonic phase reference generator that needs to be characterized. Next one connects the transfer standard to a microwave receiver and one measures the spectral components that are generated by the transfer standard. One then connects the harmonic phase reference generator to be characterized to the microwave receiver. The spectral components of the harmonic phase reference generator to be characterized are calculated by using the spectrum of the transfer standard as measured by the receiver, the spectrum of the harmonic phase reference generator to be characterized as measured by the receiver and the known spectrum of the transfer standard.

Abstract: The present invention determines the resonant frequency of a sensor by adjusting the phase and frequency of an energizing signal until the frequency of the energizing signal matches the resonant frequency of the sensor. The system energizes the sensor with a low duty cycle, gated burst of RF energy having a predetermined frequency or set of frequencies and a predetermined amplitude. The energizing signal is coupled to the sensor via magnetic coupling and induces a current in the sensor which oscillates at the resonant frequency of the sensor. The system receives the ring down response of the sensor via magnetic coupling and determines the resonant frequency of the sensor, which is used to calculate the measured physical parameter. The system uses a pair of phase locked loops to adjust the phase and the frequency of the energizing signal.

Abstract: The present invention provides a capacitive sensing apparatus having utility in object detection security applications whereby the object detection field generated by the apparatus is made steerable. The apparatus includes a power source having a ground connection in communication with at least one sensing circuit operative to detect an object moving within the sensing field. At least one conductive element is provided in communication with electrical ground. To steer the direction of the sensing field, the relative position and distance between the conductive element and the sensing circuit is adjusted such that a desired sensing field pattern is obtained.

Abstract: A method of measuring phase includes receiving an analog signal; converting the analog signal into a digital signal; representing the digital signal as N sets of samples; aligning the N sets of samples to a common time frame; removing zero bias drift from the digital signal; and calculating a phase of the analog signal based on the digital signal with the zero bias drift removed. The phase can have a time resolution substantially equal to a time between adjacent samples.

Abstract: An apparatus accurately measures the time difference between two signal edges by optically detecting the emission from a “beacon device” that is modulated as a function of time difference. Through the use of this modulation it is possible to perform timing measurement accurately. Embodiments of a voltage modulator circuit modulate timing information into emission intensity. The method and system of the present invention can be used in applications such as clock skew and pulse width measurements.

Abstract: A method compensates for phase differences between sampled values of first and second AC waveforms. The method employs a phase angle compensation factor and sequentially samples a plurality of values of each of the waveforms. For a positive compensation factor, second sampled values are adjusted to correspond with first sampled values by employing, for a corresponding second sampled value, a preceding second sampled value plus the product of: (i) the compensation factor and (ii) the difference between the corresponding second sampled value and the preceding second sampled value. Alternatively, for a negative compensation factor, the second sampled values are adjusted by employing, for the corresponding second sampled value, the preceding second sampled value minus the product of: (i) the sum of one plus the compensation factor and (ii) the difference between the preceding second sampled value and the second sampled value preceding the preceding second sampled value.

Abstract: A sensor readout circuit which provides a frequency signal output including a phase detector circuit responsive to an output signal from a sensor and an input signal to the sensor and configured to detect the phase difference between the input signal and the output signal, and a drive circuit responsive to the phase detector circuit and configured to maintain a fixed phase difference between the input signal and the output signal.

Abstract: The present invention, generally speaking, provides a time shift angle demodulator that is of simple construction and has an extended linear range. Range extension is achieved by using the input signals directly, not simply post-processing the S-PFD outputs. In accordance with one embodiment of the invention, a method of measuring the phase or frequency of a periodic input signal uses a periodic reference signal and includes comparing the input signal to the reference signal to obtain a lead signal and a lag signal; changing the count of an up/down counter in dependence on the input signal, the reference signal, the lead signal and the lag signal; and using the lead signal, the lag signal and the count signal to produce a phase or frequency signal.

Abstract: Method and apparatus for accurately determining the presence of voltage at capacitive test points and for determining the phase angle relationship between two capacitive points. The detection of the presence of the voltage at the capacitive test points is independent of the voltage range in the systems, independent of the contamination or defects that may occur in the capacitive test point systems. The phase angle relationship is determined based on the actual phase angle difference between the voltage waveforms at the capacitive test points independent of the capacitive divider ratio difference and the capacitive test point voltage accuracy.

Abstract: A phase region detector receives in-phase signal I representing in-phase component and quadrature signal Q representing quadrature component of a first signal and second signal respectively, equally divides an angle range of 2 ? into a plurality M of three or more of angle regions preliminarily, on virtual quadrature coordinates, sequentially assigns angle region numbers in each of the angle regions, detects the angle region corresponding to the variation of phase of the second signal starting from the phase of the first signal, and issues the angle region number assigned in this angle region. A phase displacement detector issues a signal expressing the time change of the variation of the phase from the change corresponding to the time of the angle region number. An out-of-bounds detector receives a signal issued from the phase displacement detector, and issues an out-of-bounds signal including the out-of-bounds direction every time the variation of the phase exceeds a predetermined value.

Abstract: Method and apparatus for determining delay of a circuit. A clock signal is provided to a variable delay and then to the circuit. The clock signal obtained from the circuit is provided to a data register, such as a flip-flop, as a clock input. The clock signal is provided to the flip-flop as a data input. Output of the data register is provided to a controller to incrementally adjust phase shift until the data input and clock input are substantially aligned in phase. All incremental adjustments in phase shift are counted to provide an indication of delay of the circuit.

Abstract: A method and apparatus for correcting for a phase shift between a transmitter and receiver comprising the steps of: a) transmitting a signal from a transmitter (14); b) receiving the transmitted signal (16) at a receiver (20); c) comparing the received signal (17) to a reference signal; d) if a difference between the reference signal and the received signal (17) is greater than a predetermined value go to step e), if not go to step g); e) adjusting a frequency of the transmitted signal (16); f) go to step a); and g) calibration complete.

Abstract: An inexpensive and reliable, high resolution digital phase detector for timing circuits for wireless, optical or wire-line transmission systems. In particular this invention allows using size limited clock counters for measurements of unlimited time ranges by combining unlimited number of intermediate samples without accumulating samples granularity errors. In addition to the measurements of the final time ranges, the intermediate samples are available for purposes of digital signal processing.

Abstract: A method and apparatus for measuring quantities of a multi-phase electric line, the apparatus comprising a control unit and a measurement unit in connection with each phase conductor of the electric line, wherein each measurement unit is arranged to measure a first phase quantity of the phase conductor in connection with which it is located and to transfer the measured quantity value to the control unit, the measurement unit located in connection with one phase conductor being further arranged to measure phase angles between the first phase quantity of said phase conductor and first phase quantities of other phase conductors and to transfer the measured phase angle values to the control unit.

Abstract: A device for verifying frequency of a clock signal generated from a clock signal generator includes a reference signal generator, a frequency divider and a comparative detector. A reference clock signal and a reset signal are provided by the reference signal generator. The frequency divider in communication with the reference signal generator and the clock signal generator receives and frequency-divides the clock signal into a bi-level divided clock signal in response to the reset signal. Then the comparative detector in communication with the frequency divider and the reference signal generator detects a level of the bi-level divided clock signal in response to the reset signal and the reference clock signal, and verifies frequency of the clock signal according to a period deviation range Te when the bi-level divided clock signal is detected to be a first level from the first to the (p?q)th detected points but a second level at the (p+1)th detected point.

Abstract: A device and method for measuring the jitters of phase locked loop signals. A phase lead or phase lag relationship between an input signal and an output signal of a phase locked loop is found. According to the phase relationship and using multiplexers, a first phase difference signal and a second phase difference signal are re-routed to a subtraction unit and produces a jitter-level output signal. The jitter-level output signal represents the absolute value of the difference of pulse width between the first phase difference signal and the second phase difference signal.

Abstract: The invention provides a method and circuit for measuring on-chip, cycle-to-cycle, jitter. Copies of a circuit comprising a programmable delay line, a programmable phase comparator, and two counters are placed at different locations on an IC near a clock signal. The programmable delay line creates a clock signal that is delayed by one clock cycle. This delayed clock signal is compared in time to the original clock signal by the programmable phase comparator. If the difference in time between the delayed clock signal and the clock signal is greater than the dead time, the first counter is triggered. If the difference in time is negative and the absolute value is greater than the dead time, the second counter is triggered. A statistical distribution, based on the values of the counters, is created. This distribution is used to predict on-chip, cycle-to-cycle jitter.

Abstract: A method and system for determining and compensating for phase and time errors in an optical receiver. The method and system includes use of a measurement and reference signal; deriving phase and time errors; and providing compensation values to the optical receiver. The operating frequency and/or other operating parameters associated with phase and time errors are determined and recorded to allow for proper compensation to the optical receiver.

Abstract: The invention provides a structure, method and apparatus for receiving a reference frequency and a variable frequency, differentiating the frequencies, and generating a logic pulse in response to a first frequency leading a second frequency, the frequencies having a small phase difference. In an aspect, the invention maintains a signal when the reference frequency and the variable frequency transition. In another aspect, the invention provides additional timing balance to prevent early generation of the logic pulses. In another aspect, the logic pulses drive a charge pump used in one of a phase-locked loop and a delay-locked loop.

Abstract: A LAN tester has display and remote units each having a connector jack attached to an adapter board for connection to the plug of a patch cord. Both the display and remote units have circuits which are capable of measuring the phase between a drive signal voltage and the corresponding coupled or reflected signal due to the drive signal. Scattering parameters for the mated connector pairs and the patch cord itself are measured during a field calibration. A computer in one or both of the tester units stores the measured scattering parameters and uses the scattering parameters to move the reference plane to any desired location along the patch cord. Channel link or permanent link tests can be conducted using the same equipment.

Abstract: A three-phase motor protector uses two toroids to monitor all three phases of a three-phase motor. Current and phase loss are monitored directly in phases A and B while the phase C current level is determined by analysis of the phase A and B relationship. Current is induced into the phase A and B toroids from the motor supply lines with the resulting wave fed to an input of high-gain inverting amplifiers to provide A and B square waves which are inputted to separate channels of a microprocessor (U3). The square waves are processed by an AND gate providing an output square wave with a 16.66 percent duty cycle for normal operation. Upon loss of phase C the ANDed result is a digital low since the individual waves of phases A and B become an inverse of one another. In order to prevent nuisance tripping an AND output of less than 2 percent duty cycle is treated as a phase loss.

Abstract: A circuit arrangement (100) for controlling a first terminal and a second terminal of a preferably contactless integrated circuit, particularly for testing a CMOS circuit, tests a multitude of intergrated circuits simultaneously while using a low-cost structure. The circuit arrangement permits a simple write/read unit assigned to the integrated circuit, and enables the simultaneous testing of a multitude of integrated circuits using a low-cost structure.

Abstract: An integrated circuit device having a self-resetting phase-locked loop (PLL) circuit. The PLL circuit generates an output clock signal having a first frequency in a first operating mode and a second frequency in a second operating mode, the second frequency being determined, at least in part, by a reference clock signal. A control circuit within the integrated circuit resets the PLL circuit by selecting the first operating mode for a predetermined time interval, then selecting the second operating mode.

Abstract: A phase-locked loop (PLL) is tested based on a divide-and-conquer strategy. First, digital components in the PLL are isolated from analog components and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency transitions.

Abstract: A frequency detector includes a slicer to receive and slice a phase error against a compare threshold value. The slicer generates a symbol based on the phase error sliced against the compare threshold value. A symbol counter is provided to increment a symbol count if the symbol generated is the same as a last symbol. A logic circuit compares the symbol count with a symbol count limit if the symbol is different from the last symbol. The logic circuit increments a high counter and clears a low counter if the symbol count is less than the symbol count limit. The logic circuit increments the low counter and clears the high counter if the symbol count is greater than the symbol count limit. A combinational logic circuit is provided to generate a high frequency jitter true signal or a high frequency jitter false signal based on at least one of the symbol count, the high counter, and the low counter.

Abstract: A method is provided for testing a communication circuit. Power is applied to a clock recovery circuit. A precharge bit is provided to the clock recovery circuit after applying power to the clock recovery circuit. A predetermined number of pulses is provided to a charge pump coupled to a voltage controlled oscillator to initialize the voltage controlled oscillator to near an operating frequency.

Abstract: A sensor readout circuit which provides a frequency signal output including a phase detector circuit responsive to an output signal from a sensor and an input signal to the sensor and configured to detect the phase difference between the input signal and the output signal, and a drive circuit responsive to the phase detector circuit and configured to maintain a fixed phase difference between the input signal and the output signal.

Abstract: A phase detecting device, including a phase detector, an inversion logic circuit, a latch and an OR logic circuit, is used for detecting the phase difference between a reference signal and a feedback signal and for outputting a delay control signal. The phase detector generates a detected signal according to the status of the feedback signal captured by the reference signal. The inversion logic circuit inverts the detected signal, and the delay device delays the detected signal. The delayed inverted detected signal is then fed into the latch device to generate a latch signal. As the detected signal and the latch signal are fed into the OR logic circuit, the OR logic circuit feeds the delay control signal into the counter so that the delay circuit can generate different delay time, such as T/4, T/2 or 1T, for meeting different signal-delay requirements.

Abstract: A clock synchronizing method is provided. The clock synchronizing method includes the step of detecting a phase difference of a synchronous clock from a reference clock, and the step of varying a phase of the synchronous clock in one direction when the phase difference is not within a predetermined range, and varying the phase of the synchronous clock in one of the one direction and the other direction according to the phase difference when the phase difference is within the predetermined range.