Abstract: A fully-differential amplifier able to operate at a low power supply voltage and provided with a common-mode signal suppression function is disclosed. This fully-differential amplifier is provided with a first fully-differential amplifier configured by a single-stage configuration inverting amplifier and canceling out the common-mode signal of the input side by a feedforward means and a second fully-differential amplifier configured by a single-stage configuration inverting amplifier and canceling out the common-mode signal of the output side by a feedback means, the output of the first fully-differential amplifier being connected to the input of the second fully-differential amplifier.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: a circuit for an RFID device in one embodiment includes an operational amplifier having a first input, a second input, and an output where the first input receives an incoming signal, arid the second input is coupled to the output via a feedback loop. An operational amplifier for an RFID device according to another embodiment compares an output of the operational amplifier to an incoming baseband signal, A circuit according to another embodiment includes an operational amplifier having a first input, a second input, and an output, wherein the first input receives an incoming signal, and wherein the second input is coupled to the output via a feedback loop. A comparator having one input is coupled to the output of the operational amplifier, another input receiving the incoming signal, and an output for outputting an outgoing signal. Methods for adjusting a filtering characteristic of an operational amplifier are also disclosed.

Abstract: In differential amplifier circuitry formed on a semiconductor substrate, first and second transistors constitute a differential pair of the differential amplifier circuitry. First and second pads are connected with emitters of the first and second transistors, respectively. The first and second pads are connected with first and second external ground terminals via first and second rewiring layers to be grounded, respectively. The first and second rewiring layers are preferably connected with each other. Further, bases of the first and second transistors are connected with first and second bias circuits via first and second resistors, respectively.

Abstract: An active UHF amplifier includes a transistor having a base for receiving signals, a grounded emitter, and a collector for outputting signals, a first inductor having a first end for coupling to a voltage source, the inductance of the first inductor being between 10-100 nano-Henries, a first capacitor having a first end coupled to the first end of the first inductor, a second inductor having a second end coupled to the base of the transistor, the inductance of the second inductor being between 1-100 nano-Henries, a second capacitor having a first end coupled to a first end of the second inductor, the capacitances of the first and the second capacitor being between 10 pico-Farads and 100 nano-Farads, a first resistor, and a second resistor having a resistance divided by the resistance of the first resistor and multiplied by a voltage of the voltage source being between 0.5-0.8 volts.

Abstract: A method of filtering a differential signal. The method includes receiving the differential signal. Transitions of the differential signal are accelerated after the differential signal has passed through a cross-over point to create an accelerated differential signal. A delayed differential signal is created that is a delayed version of the accelerated differential signal delayed by a predetermined amount of time with respect to the accelerated differential signal. The accelerated differential signal is amplified to create an amplified accelerated differential signal. The delayed differential signal is amplified to create an amplified delayed differential signal. The amplified delayed differential signal and the amplified accelerated differential signal are combined to create an output signal.

Abstract: To reduce the apparent effect of offset voltage by making the offset voltage spatially scattered.

Abstract: An input voltage circuit comprises an input transistor having a control electrode for receiving a variable input voltage, a voltage detection transistor having a current electrode coupled to a current electrode of the input transistor forming a first node, and a current source coupled to a second current electrode of the voltage detection transistor forming a second node. The input voltage circuit further comprises a variable voltage drop transistor having a first current electrode coupled to the first node, a control electrode coupled to the second node and a second current electrode coupled to an output node, wherein the voltage detection transistor detects a variation in the variable input voltage and provides a signal to the variable voltage drop transistor. The variable voltage drop transistor generates a voltage drop proportional to the variation in the variable input voltage to ensure a substantially constant output at the output node.

Abstract: Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.

Abstract: Disclosed is a differential amplifier circuit that comprises: a first differential pair of a first conductivity type having an input pair connected to respective input terminals and an output pair connected to a load-element pair; a second differential pair of a second conductivity type having an input pair connected to the respective input terminals and an output pair connected to a load-element pair; a first output transistor connected between a first power supply and an output terminal and having a control terminal connected to a first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and having a control terminal connected to a first output of the second differential pair.

Abstract: In one embodiment, an amplifier circuit has at least one branch and current-source circuitry providing a tail current to the branch, which has at least one load tank, at least one input transistor coupled to the load tank, and variable-impedance circuitry coupled between an input node of the amplifier circuit and the gate of the input transistor. The transconductance of the input transistor can be altered to achieve two or more different gain settings for the amplifier circuit. The variable-impedance circuitry can be controlled to contribute any one of at least two different levels of impedance to the overall input impedance of the amplifier circuit. If the transconductance of the input transistor is reduced, then the variable-impedance circuitry can increase the level of impedance contributed to the overall input impedance of the amplifier circuit such that the overall input impedance of the amplifier circuit remains substantially unchanged.

Abstract: It was difficult to design an operational amplifier which can cancel an offset to drive a liquid crystal display. An operational amplifier includes: a first differential pair having a first transistor and a second transistor of a first conduction type; a second differential pair having a third transistor and a fourth transistor of a second conduction type; a first floating current source; a second floating current source; and an output stage having a fifth transistor and a sixth transistor, in which, when an input signal is applied to the first and third transistor, an electric current which flows into the fifth transistor and the sixth transistor is set by the first floating current source, and when the input signal is applied to the second and fourth transistor, an electric current which flows into the fifth transistor and the sixth transistor is set by the second floating current source.

Abstract: A self-biased high-speed receiver is described. The receiver is powered by one power supply with the core operation voltage and one power supply with the IO operation voltage. The receiver is self-biased to provide a stable bias voltage. A reference voltage and an IO signal are applied on the receiver so that the difference is amplified. Thick oxide transistors are used to increase the operation voltage of the transistors. Native thick oxide transistors are used so that the receiver can work with low command mode input.

Abstract: Methods and apparatus are provided for RF switches (504, 612) integrated in a monolithic RF transceiver IC (500) and switched gain amplifier (600). Multi-gate n-channel enhancement mode FETs (50, 112, 114, Q1-3, Q4-6) are used with single gate FETs (150), resistors (Rb, Rg, Re, R1-R17) and capacitors (C1-C3) formed by the same manufacturing process. The multiple gates (68) of the FETs (50, 112, 114, Q1-3, Q4-6) are parallel coupled, spaced-apart and serially arranged between source (72) and drain (76). When used in pairs (112, 114) to form a switch (504) for a transceiver (500) each FET has its source (74) coupled to an antenna RF I/O port (116, 501) and drains coupled respectively to second and third RF I/O ports (118, 120; 507, 521) leading to the receiver side (530) or transmitter side (532) of the transceiver (500). The gates (136, 138) are coupled to control ports (122, 124; 503, 505; 606, 608).

Abstract: A differential circuit including a differential amplifier circuit having a differential element provided in a signal input circuit, a constant current source connected to the differential element, and loads respectively connected to the differential element, and a source follower circuit that outputs a differential voltage based on voltage drops developing across the loads, includes a current supply circuit that supplies a given current to the loads connected in series with the differential element when the differential element is off.

Abstract: Variable gain amplifier includes signal amplifying transistor, and gain control transistors at output and non-output sides. Emitters or sources of gain control transistors at output and non-output sides are connected to collector or drain of signal amplifying transistor. Output load is connected between collector or drain of gain control transistor at output side and power source side. Load is connected between collector or drain of gain control transistor at non-output side and power source side. Output load and load have the same impedance. Negative feedback path is connected between output end of gain control transistor at output side and input end of signal amplifying transistor. Negative feedback path is also connected between output end of gain control transistor at non-output side and input end of signal amplifying transistor. Two negative feedback paths have the same circuit constant. A differential amplifier is formed of a pair of such variable gain amplifiers.

Abstract: A multiple op amp IC with a single low noise op amp configuration comprises at least two op amp circuits fabricated on a common substrate. The IC can be configured such that the multiple op amps are connected in parallel to form a single op amp having output drive and input-referred noise characteristics which are superior to those of the constituent op amps. The IC can be fabricated with either first or second metallization patterns, with the first pattern providing multiple op amps with separate inputs and outputs, and the second pattern interconnecting the amplifiers to form a single op amp. The second pattern also preferably interconnects at least one set of corresponding high impedance nodes to prevent a difference voltage which might otherwise arise between the nodes due to component mismatches between the multiple op amps.

Abstract: A subtractor circuit which provides, at an output, a signal that is proportional to the difference, which is applied to the input, between two signal levels is specified. Formed at the output of an operational amplifier of the subtractor circuit are two synchronous signal sources, one of which is used for feedback from one of the two identical outputs to an input of the operational amplifier. In accordance with the proposed principle, a feedback resistor which is normally present in analog subtractor circuits is avoided. The altered voltage swing at the output of the operational amplifier makes it possible to operate the latter without a negative supply voltage. The subtractor circuit described is particularly suited to power detection using an input-side power detector.

Abstract: An amplifying circuit of a semiconductor integrated circuit includes a data amplifier that outputs an up-signal and a down-signal amplified according to a comparison result between an up-data signal and a down-data signal in response to a control signal. The data amplifier repeats an operation of amplifying the up-signal and the down-signal according to the comparison result between the up-signal and the down-signal to be fed back to the data amplifier.

Abstract: An operational amplifier is disclosed. The operational amplifier comprises an input stage and a loading stage. The input stage receives a differential input signal pair corresponding to a first frequency band. The loading stage is coupled to the input stage. The loading stage outputs an amplified differential output at output nodes. The loading stage comprises a flicker noise source and a modulating device. The modulating device is coupled to the flicker noise source. The modulating device modulates flicker noises into a second frequency band. The modulating device is not within a signal path.

Abstract: The effect of input signal frequency on the output of a differential amplifier is reduced by connecting the conductor of each of the input signal components to the respective conductor of the output signal component of opposite phase with a capacitor substantially equal to the parasitic capacitances interconnecting the terminals of the amplifier's transistors.

Abstract: A comparator circuit with reduced current consumption, and other circuits utilizing the same, are provided. The comparator circuit may achieve reduced current consumption by preventing current flow via a switching transistors responsive to the voltage level of the input signal.

Abstract: A method can allow a system to selectively control increasing of a bias source in a reference buffer or decreasing impedance looking into a output of the reference buffer for a temporary or selective time period, which can result in an increased overall efficiency of the system. The method can include at least the following steps. A first input signal is received at an input of a reference buffer. A second input signal is received from a load at an output of the reference buffer. A value of a bias source coupled to the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value. Alternatively, an impedance looking into the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value.

Abstract: A differential amplifier that employs mutually coupled inductors to provide desired levels of inductance in a substantially smaller form factor in comparison to individual inductor components. Mutually coupled inductors according to the present teachings may also be used to increase common mode rejection in a differential amplifier.

Abstract: From power supply potential wiring to ground potential wiring, a first inductor, a first resistance, a first output terminal, and a first transistor are series-connected in this order, and in parallel with these, a second inductor, a second resistor, a second output terminal, and a second transistor are series-connected in this order. And, one electrode of a first variable capacitor is connected between the first inductor and first resistor, and one electrode of a second variable capacitor is connected between the second inductor and second resistor. The other electrodes of the first variable capacitor and second variable capacitor are connected to a first frequency characteristics control terminal and a second frequency characteristics control terminal, respectively.

Abstract: A PAM-4 data slicer includes first, second, and third comparators which provide first, second, and third thresholds, respectively. Each of the comparators has an offset. The first and third comparators have an offset generating arrangement at their outputs to provide the first and third comparator circuits with symmetrical offsets.

Abstract: In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4).

Abstract: A low noise AC coupled amplifier having transistors sharing bias currents, and having a low band-pass corner frequency and consuming low power. The amplifier may be used in a magneto-resistive (MR) preamplifier to amplify a response from a MR sensor. Bipolar and MOS transistors are used in the front end, utilizing the advantages of each transistor type to achieve low noise as well as low band-pass corner. The amplifier has a modified structure achieving lower power by using a PNP transistor instead of an NPN transistor.

Abstract: In an optical sensor device employing an amorphous silicon photodiode, an external amplifier IC and the like are required due to low current capacity of the sensor element in order to improve the load driving capacity. It leads to increase in cost and mounting space of the optical sensor device. In addition, noise may easily superimpose since the photodiode and the amplifier IC are connected to each other over a printed circuit board. According to the invention, an amorphous silicon photodiode and an amplifier configured by a thin film transistor are formed integrally over a substrate so that the load driving capacity is improved while reducing cost and mounting space. Superimposing noise can be also reduced.

Abstract: Current feedback amplifiers circuits that generate common mode (CM) and/or differential mode (DM) currents are provided herein. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.

Abstract: A bias circuit of a resistance load differential amplifier comprises a first differential pair and a control unit for controlling a tail current of the first differential pair, and making an output current of the first differential pair being in inverse proportion to a load resistance in the resistance load differential amplifier when applying a constant potential difference to an input of the first differential pair. The control unit further controls a tail current of a second differential pair constituting the resistance load differential amplifier, and makes the tail current of the second differential pair being in direct proportion to the tail current of the first differential pair.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A differential pair of transistors includes a first transistor and a second transistor having their sources coupled together. Their sources are further coupled to ground via a pull-down network. A single-ended output is coupled to the drain of the second of the pair of differential transistors. A differential current adjust circuit is coupled to a drain of the first of the pair of differential transistors, and the current adjust circuit is configured so that the second side of the differential output driver circuit conducts approximately the same current as the first side of the differential output driver circuit.

Abstract: A digital communication system for transmitting and receiving Digital Visual Interface (DVI) communication data signals and Display Data Channel (DDC) communication signals over a transmission line comprises an open-loop equalizer circuit and a DDC extension circuit. The open-loop equalizer circuit is operable to receive DVI communication signals transmitted over the transmission line and output equalized DVI communication data signals. The DDC extension circuit is operable to inject a boost current at the receive end of the transmission line during a positive transition in the DDC communication signal, and clamp the receive end of the transmission line during a negative transition of the DDC communication signal.

Abstract: In a comparator, diodes are disposed between differential pair transistors and current mirror pair transistors forming active loads. The diodes may be disposed between the differential pair transistors and the current mirror pair transistors or between the current mirror pair transistors and a ground line. In addition, diodes are disposed between signal input transistors and the ground line and between the differential pair transistors and the signal input transistors, respectively.

Abstract: In one embodiment, a delay circuit is formed to use cascode coupled transistors to receive signals from a differential pair and increase the propagation through the delay circuit.

Abstract: Circuit topologies that provide extended bandwidth of operation are disclosed. The circuits have two stages that share inductors, in which in-phase current components sum at a summing node and flow together, increasing the magnitude of the current in the inductors. The inductive peaking exhibited by the circuits is increased without using excessively large inductors.

Abstract: Briefly, techniques to couple differential amplifiers with a low RC time constant and provide minimal common mode voltage reduction.

Abstract: A high-power, high frequency (1–100 GHz) power amplifier, made using SiGe transistors. A differential common-emitter amplifier section supplies the voltage amplification, allowing the total voltage swing of the amplifier to be twice the breakdown voltage of the individual transistors. Current amplification is supplied by a differential common-emitter amplifier section, connected in cascode with the differential common-emitter amplifier section. Appropriately chosen resonators in the cascode connection resonate out the Miller effect, negative current feed back of the circuit at the amplifier's operational frequency, allowing the amplifier to provide high power output at the operational frequency.

Abstract: Accurate voltage to current converters for rail-sensing current-feedback instrumentation amplifiers using folded cascode transistors. Embodiments using various degrees of cascoding, as well as using bootstrapped folded cascoded input transistors are disclosed. Circuits for sensing around the negative rail are disclosed, though circuits for sensing around the positive rail may be readily achieved by use of complementary devices.

Abstract: The invention enables an increase in linear power output ranges in a power amplifier by using an unmatched power amplifier driver in place of a matched power amplifier driver.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: In a driver circuit including transistors each having an emitter follower configuration and a pair of differential transistors with emitter outputs of the transistors of the emitter follower configuration as inputs, end terminals of the pair of differential transistors are connected to individual bonding pads, and the respective bonding pads and voltage sources are individually connected by wires that function as inductors. Thereby, even in the case where the lengths of the wires of output terminals change according to packaging, outputs can be matched by determining the wire lengths of the wires suitably.

Abstract: A method and apparatus to provide a reconfigurable differential dual port current conveyor circuit are described.

Abstract: An electrical circuit includes an amplifier. The amplifier includes an input circuit in communication with an input of the amplifier. The amplifier includes a start-up circuit in communication with the input circuit. The start-up circuit is configured to generate a start-up signal to enable subsequent operation of the amplifier. Generation of the start-up signal by the start-up circuit can be ceased when the operation of the amplifier reaches a steady-state. The amplifier also includes an output circuit in communication with an output of the amplifier and in communication with the input circuit and the start-up circuit.

Abstract: An input amplifier for power amplifier control circuitry includes an input, an output, a power supply voltage, a ground, a differential amplifier and a double folded cascode and conversion stage. The differential amplifier is connected to the input, to the power supply voltage and to the ground. The differential amplifier provides a differential output. The double folded cascode and conversion stage is connected to the differential amplifier, to the ground and to the power supply voltage. The double folded cascode and conversion stage converts the differential output to a single-ended signal. The double folded cascode and conversion stage is optimized to prevent variation in the power supply voltage from propagating to the output.

Abstract: A multi-stage output buffer is disclosed. The output buffer includes an emitter follower circuit coupled to a differential input that is configured to provide a substantially high input impedance at an input thereof, and provide a substantially low output impedance at an output thereof. An emitter coupled pair circuit is coupled to the output of the emitter follower circuit, and is configured to amplify the signal and further isolate an input circuit. The buffer further includes a base-grounded configuration transistor circuit coupled to an output of the emitter coupled pair circuit and having an output coupled to the differential output of the multi-stage output buffer. The base-grounded transistor circuit reduces a load impedance at the output of the emitter coupled pair circuit, improves decoupling of the external load from an input circuit when coupled thereto, and increases the output power.

Abstract: A differential cascode amplifier has first and second cascode circuits, driven by two differential signal sources including input resistances. The first cascode circuit includes a first input transistor having a first collector, a first emitter, and a first base, and a first output transistor having a second collector, a second base, and a second emitter coupled to the first collector. The second cascode circuit includes a second input transistor having a third collector, a third emitter, and a third base, and a second output transistor having a fourth collector, a fourth base, and a fourth emitter coupled to the third collector. The amplifier has a first connection connecting the first base to the fourth base, and a second connection connecting the second base to the third base. This cross-connected differential cascode architecture provides doubled output bandwidth and current gain (in dB), further increasing input impedance and output swing.

Abstract: A Gaussian family filter (e.g. an equiripple filter) comprises a first pole, a second pole, a third pole and a signal combiner. The first pole has a biquadratic low pass characteristic and is configured to provide a first low pass signal. The second pole is coupled to the first low pass signal, the second pole having a first-order low pass characteristic, and providing a second low pass signal and a high pass signal. The third pole is coupled to the second low pass signal and has a biquadratic low pass characteristic for generating a third low pass signal. The signal combiner is configured to combine the third low pass signal and the high pass signal to provide a combined signal.

Abstract: Differential amplifiers are provided that substantially cancel the input bias currents at the inputs to the differential amplifiers. A circuit produces a compensation current that is substantially equal in magnitude but opposite in polarity to input bias currents associated with the first and second inputs of the differential amplifier. A further pair of transistors are used to replicate the compensation current, and to provide replicated compensation currents to the inputs of the differential amplifier, thereby substantially canceling the input bias currents at the inputs.