Component Within Printed Circuit Board Patents (Class 361/761)
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Publication number: 20120206890Abstract: The present invention provides a printed wiring board assembly having active and passive components embedded between the printed wiring board layers and associated fabrication method so as to complete a multilayer printed wiring board to improve the flexibility of circuit layout.Type: ApplicationFiled: April 25, 2012Publication date: August 16, 2012Applicant: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Timothy L. Tezak, Craig F. Lapinski, Jay B. Hinerman
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Patent number: 8237059Abstract: A method of manufacturing an electronic component-embedded board is provided which is capable of suppressing warpage without requiring complicated processes at low cost and which offers high productivity and economic efficiency. A worksheet 100 includes insulating layers 21 and 31 on one surface of an approximately rectangular substrate 11, and an electronic component 41 and a plate-like frame member (member) 51 embedded inside the insulating layer 21, wherein the plate-like frame member 51 satisfying the relationship represented by the following formula (1): ?1<?3 and ?2<?3 . . . (1), is mounted on an unmounted portion of the electronic component 41 on the substrate 11. In the formula, ?1, ?2 and ?3 respectively denote the linear coefficients of thermal expansion (ppm/K) of the electronic component 41, the plate-like frame member 51, and the substrate 11, the respective wiring layers or the respective insulating layers.Type: GrantFiled: July 21, 2008Date of Patent: August 7, 2012Assignee: TDK CorporationInventors: Yoshikazu Kanemaru, Takaaki Morita, Kenichi Kawabata
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Patent number: 8234781Abstract: Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.Type: GrantFiled: September 14, 2009Date of Patent: August 7, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Young Gwan Ko
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Patent number: 8238113Abstract: The present invention generally relates to a new structure to be used with electronic modules such as printed circuit boards and semiconductor package substrates. Furthermore there are presented herein methods for manufacturing the same. According to an aspect of the invention, the aspect ratio of through holes is significantly improved. Aspect ratio measures a relationship of a through hole or a micro via conductor in the direction of height divided width. According to the aspect of the invention, the aspect ratio can be increased over that of the prior art solution by a factor of ten or more.Type: GrantFiled: July 23, 2010Date of Patent: August 7, 2012Assignee: Imbera Electronics OyInventors: Antti Iihola, Petteri Palm
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Patent number: 8237061Abstract: A Z-directed filter component for insertion into a printed circuit board while allowing electrical connection to internal conductive planes contained with the PCB. In one embodiment the Z-directed filter component is mounted within the thickness of the PCB allowing other components to be mounted over it. The filter may be T-filter or a Pi-filter within the body of the Z-directed component. The body may also contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body. Methods for mounting Z-directed components are also provided.Type: GrantFiled: July 23, 2009Date of Patent: August 7, 2012Assignee: Lexmark International, Inc.Inventors: Keith Bryan Hardin, Paul Kevin Hall, Robert Aaron Oglesbee
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Patent number: 8238112Abstract: A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount including a base substrate including a first surface and a second surface different from the first surface, a conductive pattern on the first surface, a first pair and a second pair of first and second electrodes on the second surface, and vias extending through the base substrate between the first and second surfaces, wherein the conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes of the first and second pair of first and second electrodes through the vias.Type: GrantFiled: June 22, 2009Date of Patent: August 7, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Yu-Sik Kim, Woo-Sung Han
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Patent number: 8233288Abstract: An electronic component package includes: an insulating carrier substrate; a connection wiring that is provided on one side of the carrier substrate; an IC chip that is connected to the connection wiring; an external connection land that is disposed on the other side of the carrier substrate and is connected to the connection wiring via a wiring in the carrier substrate; and a solder ball that is disposed on the external connection land. A region of the external connection land that can be bonded to the solder ball has an outer shape that includes at least one arc portion and at least one straight portion. With this configuration, it is possible to provide an electronic component mounted apparatus in which bonding failure of the external connection land and the circuit board-side land with the solder ball can be reduced, and the bonding state can be easily inspected, and a method of inspecting a bonding portion therein.Type: GrantFiled: April 22, 2008Date of Patent: July 31, 2012Assignee: Panasonic CorporationInventor: Seiji Tokii
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Patent number: 8230584Abstract: A method for producing a coil, in particular an ignition coil for a motor vehicle, in which a primary winding is wound onto a winding mandrel. Then the winding mandrel is introduced into a housing of the coil and the winding mandrel then is removed from the housing, the primary winding remaining inside the housing. Finally, additional components of the coil, in particular a secondary coil shell onto which a secondary winding has been wound, are introduced into the housing, so that the secondary winding is concentrically disposed within the primary winding while dispensing with a separate primary coil shell. The method allows a design of the coil that is more compact in diameter.Type: GrantFiled: August 2, 2007Date of Patent: July 31, 2012Assignee: Robert Bosch GmbHInventors: Konstantin Lindenthal, Axel Keib, Thomas Pawlak, Alfred Glatz
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Patent number: 8234507Abstract: A wireless electronic-ink display device supported in packaging, and employing a power switching mechanism which operates to prevent leakage, drainage or discharge of the electro-chemical battery until a change in predetermined state of configuration occurs. The wireless electronic-ink based display device comprises (i) a power source module with an electro-chemical battery, (ii) a power management module for managing the power levels within the wireless electronic-ink display device, and (iii) a power switching module, arranged between the power source module and the power management module, and automatically responsive to a change in at least one predefined state of device configuration, to prevent leakage, drainage or discharge of the electro-chemical battery until a change in predetermined state of configuration occurs.Type: GrantFiled: January 13, 2009Date of Patent: July 31, 2012Assignee: Metrologic Instruments, Inc.Inventors: Xiaoxun Zhu, Steven Essinger, Michael Schnee, Yong Liu
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Publication number: 20120188734Abstract: A wiring board including an insulative substrate having a cavity portion, an electronic device positioned in the cavity portion of the insulative substrate, an interlayer insulation layer made of an insulative material and formed on the insulative substrate and on the electronic device, and a conductive layer having a conductive pattern and formed on the interlayer insulation layer. The insulative substrate has a gap formed with respect to the electronic device in the cavity portion, the gap between the electronic device in the cavity portion and the insulative substrate is filled with an insulator made of the insulative material derived from the interlayer insulation layer, and the conductive pattern of the conductive layer has an enlarged-width portion across and directly over the gap.Type: ApplicationFiled: December 21, 2011Publication date: July 26, 2012Applicant: IBIDEN CO., LTD.Inventors: Yukinobu MIKADO, Shunsuke Sakai, Kazuhiro Yoshikawa
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Patent number: 8225499Abstract: This publication discloses a method for manufacturing a circuit-board structure.1. The structure comprises a conductor pattern (3) and at least one component (6), which is surrounded by an insulating-material layer (10), attached to it by means of a contact bump (5). According to the invention, the contact bumps (5) are made on the surface of the conductor pattern (3), before the component (6) is attached to the conductor pattern (3) by means of the contact bump (5). After attaching, the component (6) is surrounded with an insulating-material layer (10).Type: GrantFiled: June 16, 2006Date of Patent: July 24, 2012Assignee: Imbera Electronics OyInventors: Risto Tuominen, Antti Iihola, Petteri Palm
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Patent number: 8222537Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.Type: GrantFiled: June 11, 2009Date of Patent: July 17, 2012Assignee: Sanmina-Sci CorporationInventors: George Dudnikov, Jr., Franz Gisin
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Patent number: 8218337Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a vertical filtering structure arranged periodically between the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.Type: GrantFiled: December 18, 2009Date of Patent: July 10, 2012Assignee: Intel CorporationInventors: Dobabani Choudhury, Prasad Alluri
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Patent number: 8218331Abstract: In a DC-DC converter module, a first through-hole conductor provided in a substrate as a first lead for electrically connecting a terminal as a voltage output terminal of an IC and a first terminal of an inductor component to each other and a second through-hole conductor provided in the substrate as a second lead for electrically connecting a terminal as a switching terminal of the IC and a second terminal of the inductor component to each other oppose each other in a direction intersecting a direction in which the first and second terminals oppose each other in the inductor component (i.e., the longitudinal direction of the substrate and inductor component).Type: GrantFiled: March 24, 2010Date of Patent: July 10, 2012Assignee: TDK CorporationInventors: Hirotada Furukawa, Mitsuru Ishibashi
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Patent number: 8218323Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a heat dissipating element configured dissipating heat generating from the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.Type: GrantFiled: December 18, 2009Date of Patent: July 10, 2012Assignee: Intel CorporationInventors: Debabani Choudhury, Prasad Alluri
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Patent number: 8218330Abstract: A reworkable passive element embedded printed circuit board (PCB) including a board member, first and second fillings, and a first passive element. The board member has first and second through holes which are spaced apart from each other. The first and second fillings are buried in the first and second through holes, respectively, and formed of a reflowable conductive material. The first passive element includes first and second electrodes. A first insertion groove is formed in a portion of a surface of the board member between the first and second through holes and portions of the first and second fillings. The first passive element is mounted on the first insertion groove. The first electrode includes a bottom surface and a side contacting the first filling and an exposed upper surface. The second electrode comprises a bottom surface and a side contacting the second filling and an exposed upper surface.Type: GrantFiled: September 27, 2007Date of Patent: July 10, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyo-jae Bang, Dong-chun Lee, Seong-chan Han, Jun-young Lee, Jung-hyeon Kim
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Patent number: 8218332Abstract: The aim the disclosed process is to ensure maximum precision both at the level of the manufacturing of an electronic assembly from a chip with small dimensions as well as the level of the placement of such an assembly on an insulating substrate. This aim is achieved by a placement process on a support, called substrate, of at least one electronic assembly consisting of a chip including at least one electric contact on one of its faces, said contact being connected to a segment of conductive track, and said placement being carried out by means of a placement device holding and positioning said assembly on the substrate, comprising the following steps: formation of a segment of conductive track having a predetermined outline, transfer of the track segment onto the placement device, seizing of the chip with the placement device carrying the track segment in such a way that said track segment is placed on at least one contact of the chip.Type: GrantFiled: August 30, 2010Date of Patent: July 10, 2012Assignee: Nagraid S.A.Inventor: Francois Droz
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Patent number: 8217272Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including: a first layer having a first conformable material; a second layer having a second conformable material; a third layer having a third material; and one or more electronic components embedded within the stack of layers, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.Type: GrantFiled: December 18, 2009Date of Patent: July 10, 2012Assignee: Intel CorporationInventors: Debabani Choudhury, Prasad Alluri
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Patent number: 8212153Abstract: A board comprises a through hole including a first opening, a second opening opposite to the first opening, a first conductor formed on a part of the through hole, the first conductor extends from the first opening to a first predetermined position of the through hole, a second conductor formed on a part of the through hole, the second conductor extends from the second opening to a second predetermined position nearer to the second opening than the first predetermined position, and wherein the first conductor alternates with the second conductor with respect to the circumferential direction of the through hole.Type: GrantFiled: September 7, 2007Date of Patent: July 3, 2012Assignee: NEC CorporationInventor: Isao Matsui
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Patent number: 8213185Abstract: In an interposer substrate, a plating stub conductor and a ground conductor form a capacitor, and a plating stub conductor and the ground conductor form a capacitor. Capacitances of the capacitors are adjusted so that a phase difference between signals transmitted by a differential transmission using a signal line including a connection wiring conductor and a signal line including a connection wiring conductor is equal to 180 degrees.Type: GrantFiled: September 9, 2009Date of Patent: July 3, 2012Assignee: Panasonic CorporationInventors: Akira Minegishi, Kazuhide Uriu, Toru Yamada
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Patent number: 8208266Abstract: Shaped integrated passive devices and corresponding methodologies relate to construction and mounting of shaped passive devices on substrates so as to provide both mechanical and electrical connection. Certain components and component assemblies are associated with the implementation of surface mountable devices. Specially shaped integrated passive device are capable of providing simplified mounting on and simultaneous connection to selected electrical pathways on a printed circuit board or other mounting substrate. Shaped, plated side filter devices have plated sides which provide both mounting and grounding/power coupling functions. Thin film filters may be constructed on silicon wafers, which are then diced from the top surface with an angular dicing saw to produce a shaped groove in the top surface. The groove may be v-shaped or other shape, and is then plated with a conductive material. Individual pieces are separated by grinding the back surface of the wafer down to where the grooves are intercepted.Type: GrantFiled: May 13, 2008Date of Patent: June 26, 2012Assignee: AVX CorporationInventor: Gheorghe Korony
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Patent number: 8208262Abstract: The window base material of the present invention is provided with an intermediate layer having a window section composed of transparent resin and a colored section composed of colored resin surrounding the window section, and a transparent first base material and second base material which sandwich the intermediate layer. The card with embedded module of the present invention is provided with a module having a display element, an adhesive layer covering the module, and a paired third base material and fourth base material which sandwich the module with interposition of the adhesive layer, wherein the third base material is composed of the window base material, and the display section of the display element is disposed so as to face the window section of the window base material.Type: GrantFiled: November 7, 2007Date of Patent: June 26, 2012Assignee: Toppan Forms Co., Ltd.Inventors: Takahiro Sakurai, Yuichi Ito
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Patent number: 8208268Abstract: A semiconductor apparatus includes: first electronic components; a first circuit board, including first electronic component mounting pads on which the first electronic components are mounted; and a second circuit board located above the first circuit board, wherein the first electronic component mounting pads are arranged on a first face of the first circuit board, opposite the second circuit board, and the first circuit board and the second circuit board are electrically connected by internal connection terminals located between the first circuit board and the second circuit board, and wherein a recessed portion is formed in the second circuit board, opposite the first electronic components, in order to provide space to accommodate portions of the first electronic components.Type: GrantFiled: November 25, 2008Date of Patent: June 26, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Atsunori Kajiki, Sadakazu Akaike, Takashi Tsubota, Norio Yamanishi
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Patent number: 8208267Abstract: A printed wiring board with a built-in resistive element comprising a first electrode formed on the surface of an insulating member, a second electrode provided adjacent to the first electrode to form a space therebetween, a resistor-filling part formed by the space between the first electrode and the second electrode, and a resistive element comprising a resistive material provided in the resistor-filling part wherein the resistor-filling part is substantially enclosed by the first electrode and the second electrode.Type: GrantFiled: July 2, 2008Date of Patent: June 26, 2012Assignee: Ibiden Co., Ltd.Inventor: Hironori Tanaka
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Patent number: 8203846Abstract: Provided is a semiconductor photodetector element which is reduced in manufacturing cost and improved in precision. The semiconductor photodetector element includes: a first photodiode formed in a P-type silicon substrate; a second photodiode formed in the P-type silicon substrate and has the same structure as that of the first photodiode; a color filter layer formed above the first photodiode from a green filter; a color filter layer formed of a black filter above the second photodiode; and an arithmetic circuit portion which subtracts a detection signal of the second photodiode from a detection signal of the first photodiode.Type: GrantFiled: August 23, 2010Date of Patent: June 19, 2012Assignee: Sharp Kabushiki KaishaInventor: Kazuhiro Natsuaki
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Patent number: 8198541Abstract: An electronic component built-in wiring board includes: at least a pair of wiring patterns; an insulating layer disposed between the pair of wiring board; an electronic component embedded in the insulating layer; and a metallic body provided at least on or above a main surface of the electronic component in the insulating layer and thermally contacted with the electronic component.Type: GrantFiled: December 14, 2007Date of Patent: June 12, 2012Assignee: Dai Nippon Printing Co., Ltd.Inventors: Kenji Sasaoka, Yoshitaka Fukuoka
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Patent number: 8198979Abstract: An article of manufacture having an in-molded resistive and/or shielding element and method of making the same are shown and described. In one disclosed method, a resistive and/or shielding element is printed on a film. The film is formed to a desired shape and put in an injection mold. A molten plastic material is introduced into the injection mold to form a rigid structure that retains the film.Type: GrantFiled: August 14, 2008Date of Patent: June 12, 2012Assignee: Ink-Logix, LLCInventors: Ronald H. Haag, Jeffrey R. Engel, William W. Boddie, Jr.
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Patent number: 8194411Abstract: One aspect of the present invention provides an electronic package, comprising at least a first module and a second module arranged on top of the first module, the modules together in the form of a module stack, wherein the first and second modules are adhesively connected together, each module includes a substrate layer having at least one metal layer, at least one die and a plastic(s) package molding compound layer molded over said die or dice, in each module the die or dice are bonded on said substrate layer via the metal layer, a plurality of channels formed generally vertically acting as vias to connect the metal layers and arranged adjacent to the die or dice in at least one of the modules, some or all the channels provided with an inner surface coated with a conductive material layer or filled with a conductive material for electrical connection whereby the dice are electrically connected together, and means serving as an intermediary for providing electrical, mechanical and thermal connectivity, commuType: GrantFiled: March 31, 2009Date of Patent: June 5, 2012Assignee: Hong Kong Applied Science and Technology Research Institute Co. LtdInventors: Chi Kuen Vincent Leung, Peng Sun, Xunqing Shi, Chang Hwa Tom Chung
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Publication number: 20120134125Abstract: An electronic component embedded printed circuit board and a method for manufacturing the same are disclosed. The method includes: providing a first carrier having a first circuit pattern formed on one surface thereof; providing a second carrier having a second circuit pattern formed on one surface thereof; flip-chip bonding an electronic component to the first circuit pattern; stacking one side of an insulator on one side of the first carrier to cover the electronic component; compressing the second carrier having the second circuit pattern formed on one surface thereof on an other side of the insulator; and removing the first carrier and the second carrier. The method can improve the degree of conformation for an electrical component by embedding the electrical component using a flip-chip bonding method and can improve the yield by simplifying the production process.Type: ApplicationFiled: February 1, 2012Publication date: May 31, 2012Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Byoung-Chan Kim, Young-Hwan Shin, Jong-Jin Lee
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Patent number: 8189341Abstract: A display apparatus including a circuit board and a surface grounded portion which is disposed on an end portion of the circuit board and formed of a conductive layer. The display apparatus may include a signal receiver mounted on the circuit board, the signal receiver receiving a signal. The display apparatus may include a signal processor mounted on the circuit board, the signal processor processing signals received by the signal receiver.Type: GrantFiled: April 2, 2008Date of Patent: May 29, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Ju-yong Kim
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Patent number: 8188379Abstract: A package substrate structure includes: a substrate having a first surface and an opposing second surface and characterized by a plurality of wire-bonding pads provided on the first surface of the substrate, a plurality of ball-implanting pads provided on the second surface of the substrate, and at least a cavity formed to penetrate the first and second surfaces of the substrate; a metal board mounted on the second surface of the substrate and covering the cavity, wherein the metal board has a thickness greater than that of the ball-implanting pads and has an area greater than that of the cavity; and solder masks disposed on the first and second surfaces of the substrate respectively and having at least a solder-mask cavity corresponding in position to the cavity of the substrate, the solder masks further having a plurality of openings for exposing the wire-bonding pads, the ball-implanting pads and the metal board.Type: GrantFiled: June 30, 2009Date of Patent: May 29, 2012Assignee: Unimicron Technology Corp.Inventor: Shin-Ping Hsu
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Patent number: 8184446Abstract: An inverter for a liquid crystal display device and a liquid crystal display module using the inverter are provided. The inverter includes a circuit board defining a hole through itself, and a transformer inversely inserted into the hole of the circuit. The transformer generates a high voltage.Type: GrantFiled: May 31, 2007Date of Patent: May 22, 2012Assignee: LG Display Co., Ltd.Inventor: Hoon Jang
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Patent number: 8183465Abstract: A component built-in wiring substrate (10) which includes: a core substrate (11); a plate-shaped component (101); a resin filling portion (92); and a wiring stacking portion (31), wherein, when viewed from the core principal surface (12) side, the projected area of the mounting area (32) is larger than the projected area of the plate-shaped component (101) and the resin filling portion, and the plate-shaped component and the resin filling portion are positioned directly below the mounting area (23), and wherein a value of the coefficient of thermal expansion (CTE ?2) for a temperature range that is equal to or higher than the glass transition temperature of the resin filling portion is set to be larger than a value of the coefficient of thermal expansion of the plate-shaped component and smaller than a value of the coefficient of thermal expansion of the core substrate for the subject temperature range.Type: GrantFiled: October 8, 2009Date of Patent: May 22, 2012Assignee: NGK Spark Plug Co., Ltd.Inventors: Shinya Suzuki, Kenichi Saita, Shinya Miyamoto, Shinji Yuri
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Patent number: 8184447Abstract: A versatile multi-layer electronic part built-in board compatible with different external circuits to be connected thereto is provided. Sensors are connected to a connector through connection lines that are connected to electronic parts. The electronic parts are directly connected to the connector and can be mounted on the top layer, the bottom layer or both the top and bottom layers of the multi-layer electronic part built-in board. When the sensor to be connected, for example, is changed to another having a different characteristic, an electronic part mounted on the top and bottom layers correspondingly to the sensor can be changed.Type: GrantFiled: November 15, 2007Date of Patent: May 22, 2012Assignee: DENSO CORPORATIONInventors: Dai Itou, Tooru Itabashi
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Patent number: 8179692Abstract: A board includes a board body; a first conductor provided at a first surface of the board body; and an electrically conductive connection terminal having a spring property. The connection terminal includes a first end part fixed to the first conductor; a second end part to be connected to a first object of connection to be placed opposite the first surface of the board body; and a projection part provided on the first end part so as to project toward the first conductor.Type: GrantFiled: June 28, 2010Date of Patent: May 15, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventor: Yoshihiro Ihara
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Patent number: 8179689Abstract: A printed circuit board has capacitors, a grounding wiring pattern having a bonding surface on which a semiconductor device is bonded, and a contact surface located opposite from the bonding surface thereof and coupled to first electrodes of the capacitors, and a power supply wiring pattern having a bonding surface on which the semiconductor device is bonded, and a contact surface located opposite from the bonding surface thereof and coupled to second electrodes of the capacitors. The grounding and power supply wiring patterns are alternately arranged in a predetermined direction, and the capacitors are coupled in parallel with respect to the grounding and power supply wiring patterns.Type: GrantFiled: May 20, 2009Date of Patent: May 15, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventor: Naohiro Mashino
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Patent number: 8179685Abstract: A printed circuit board on which a connector is mounted includes an insulating layer through which holes are formed and a supporting layer. An upper surface of the supporting layer is attached to the connector. The supporting layer is disposed on an upper surface of the insulating layer, is extended from the upper surface of the insulating layer to a lower surface of the insulating layer, and passes through the holes in order to support the connector. The holes are arranged in a plurality of columns each being parallel to a longitudinal direction of a lateral surface of the connector.Type: GrantFiled: October 15, 2008Date of Patent: May 15, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyo-Hyun Park, Hyun-Woo Nam
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Patent number: 8174840Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.Type: GrantFiled: October 29, 2008Date of Patent: May 8, 2012Assignee: Industrial Technology Research InstituteInventors: Uei-Ming Jow, Chang-Sheng Chen, Chin-Sun Shyu, Min-Lin Lee, Shinn-Juh Lay, Ying-Jiunn Lai
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Patent number: 8173910Abstract: A printed circuit board (PCB) ball grid array (BGA) system is provided. In one embodiment, the PCB BGA system includes a PCB, a PCB BGA pad formed on the PCB, a plated through-hole via disposed at least partially through the PCB proximate the PCB BGA pad, and a soldermask disposed over the PCB. The soldermask includes: (i) a BGA pad opening through which the PCB BGA pad is exposed, and (ii) a via opening through which a central portion of the plated through-hole via is exposed. The via opening has an inner diameter that is less than the outer diameter of the plated through-hole via.Type: GrantFiled: July 24, 2008Date of Patent: May 8, 2012Assignee: GM Global Technology Operations LLCInventor: Alan L. Barry
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Patent number: 8174841Abstract: An array of contact pads on a semiconductor structure has a pitch less than twice an overlay tolerance of a bonding process employed to vertically stack semiconductor structures. A set of contact pads within the area of overlay variation for a matching contact pin may be electrically connected to an array of programmable contacts such that one programmable contact is connected to each contact pad within the area of overlay variation. One contact pad may be provided with a plurality of programmable contacts. The variability of contacts between contact pins and contact pads is accommodated by connecting or disconnecting programmable contacts after the stacking of semiconductor structures. Since the pitch of the array of contact pins may be less than twice the overlay variation of the bonding process, a high density of interconnections is provided in the vertically stacked structure.Type: GrantFiled: April 27, 2009Date of Patent: May 8, 2012Assignee: International Business Machines CorporationInventors: Leland Chang, Matthew R. Wordeman, Albert M. Young
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Patent number: 8173908Abstract: A method of fabricating a device structure, comprises: forming an insulating layer (3b) over a first set of devices disposed over a substrate (3); forming one or more vias in the insulating layer; disposing a second set of devices (6) over the insulating layer, wherein devices of the second set comprise respective electrical contacts (6a) and are disposed over the insulating layer (3b) such that a side on which a contact (6a) can be accessed faces the substrate (3); and forming one or more electrical contacts between the first set of devices and the second set of devices (6) through the via(s). The second set of devices and at least one via are positioned such that one or more of the vias lies at least partially within the footprint of two devices, each belonging to a different device layer.Type: GrantFiled: March 30, 2009Date of Patent: May 8, 2012Assignee: Sharp Kabushiki KaishaInventors: Thomas Heinz-Helmut Altebaeumer, Stephen Day, Christian Lang, Jonathan Heffernan
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Publication number: 20120106108Abstract: A multilayered printed circuit board or a substrate for mounting a semiconductor device includes a semiconductor device, a first resin insulating layer accommodating the semiconductor device, a second resin insulating layer provided on the first resin insulating layer, a conductor circuit provided on the second resin insulating layer, and via holes for electrically connecting the semiconductor device to the conductor circuit, wherein the semiconductor device is accommodated in a recess provided in the first resin insulating layer, and a metal layer for placing the semiconductor device is provided on the bottom face of the recess. A multilayered printed circuit board in which the installed semiconductor device establishes electrical connection through the via holes is provided.Type: ApplicationFiled: January 6, 2012Publication date: May 3, 2012Applicant: IBIDEN CO., LTD.Inventors: Sotaro ITO, Michimasa TAKAHASHI, Yukinobu MIKADO
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Patent number: 8168893Abstract: A multilayer wiring board includes a multilayer wiring substrate having a concave portion which accommodates an electronic component. The multilayer wiring substrate has multiple insulation layers, multiple conductive circuits, multiple vias and an electromagnetic shielding layer. The conductive circuits are separated by the insulation layers and electrically connected through the vias. The electromagnetic shielding layer has a roughened surface and formed along one of a bottom surface and side surfaces of the concave portion in the multilayer wiring substrate.Type: GrantFiled: August 25, 2008Date of Patent: May 1, 2012Assignee: Ibiden, Co., Ltd.Inventors: Sotaro Ito, Michimasa Takahashi, Yukinobu Mikado
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Patent number: 8169072Abstract: A disclosed semiconductor device includes a reinforcing board having first and second faces, an electronic part accommodating portion penetrating the reinforcing board, a through hole, an electronic part having a front face on which an electrode pad is formed and a back face, a through electrode installed inside the through hole, a first sealing resin filling a gap between the through electrode and an inner wall of the through hole, a second sealing resin filled into the electronic part accommodating portion while causing the bonding face of the electrode pad of the electronic part accommodating portion to be exposed to an outside, and a multi-layered wiring structure configured to include insulating layers laminated on the first face of the reinforcing board and an interconnection pattern, wherein the interconnection pattern is directly connected to the electrode pad of the electronic part and the through electrode.Type: GrantFiled: March 29, 2010Date of Patent: May 1, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenta Uchiyama, Akihiko Tateiwa
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Patent number: 8164904Abstract: An electronic component module includes at least one first multi-layer circuit board module (21, 22; 31, 32; 41, 42) and a cooling arrangement (23, 33, 43), the cooling arrangement (23, 33, 43) being in contact with an upper side of the circuit board module (21, 22; 31, 32; 41, 42). The cooling arrangement (23, 33, 43) is designed such that waste heat generated during operation of the electronic component module (2, 3, 4) is extracted in a lateral direction with relation to the arrangement of the circuit board module (21,22; 31, 32; 41, 42) by the cooling arrangement (23, 33, 43).Type: GrantFiled: April 11, 2007Date of Patent: April 24, 2012Assignee: OSRAM AGInventors: Richard Matz, Bernhard Siessegger, Steffen Walter
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Patent number: 8164916Abstract: Provided is an integrated circuit system and method for biasing the same that features bifurcating a power distribution network to provide a bias voltage to the integrated circuit system. One of the branches of the power distribution network attenuates an impedance in the power distribution network that supplies transient currents and the remaining branch supplies a substantially steady-state currents.Type: GrantFiled: January 10, 2008Date of Patent: April 24, 2012Assignee: Altera CorportationInventor: Hong Shi
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Patent number: 8164917Abstract: A base mechanism for use in a multi-chip module (MCM) is described. This base mechanism includes a substrate having top and bottom surfaces. The bottom surface includes first electrical connectors that convey power, and through-substrate vias (TSVs) between the top and bottom surfaces are electrically coupled to these electrical connectors. Furthermore, a bridge chip is rigidly mechanically coupled to the top surface. This bridge chip includes proximity communication connectors that communicate information via proximity communication with one or more island chips in the MCM. Additionally, spacers are rigidly mechanically coupled to the top surface of the substrate. In conjunction with the bridge chip, the spacers define cavities on the top surface, which include second electrical connectors. These second electrical connectors are electrically coupled to the TSVs, and communicate additional information with and convey power to the one or more island chips.Type: GrantFiled: December 23, 2009Date of Patent: April 24, 2012Assignee: Oracle America, Inc.Inventors: Jing Shi, Nyles Nettleton, Bruce M. Guenin
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Patent number: 8164915Abstract: A system for electronic components mounted on a circuit board is disclosed. One embodiment provides placing an elastic, anisotropically conductive material on top of a printed circuit board. An electronic component is placed over the elastic, anisotropically conductive material, fixing the electronic component on the printed circuit board.Type: GrantFiled: November 19, 2007Date of Patent: April 24, 2012Assignee: Qimonda AGInventor: Jens Niemax
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Publication number: 20120092842Abstract: An encapsulated circuit device has a substrate, components configured on a substrate surface portion of a component side of the substrate, an encapsulation, at least one electrical contact having an outer portion projecting out of the encapsulation and an inner portion provided in the circuit device that is electrically connected to the substrate. The encapsulation includes a rigid outer encapsulation, which extends completely around the substrate, the components and the inner portion of the at least one electrical contact, as well as a compressible deformation absorption layer, which is provided between the components and the outer encapsulation and at least completely covers the substrate surface portion on which the components are configured.Type: ApplicationFiled: February 26, 2010Publication date: April 19, 2012Inventors: Jochen Neumeister, Reinhard Rieger
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Patent number: 8159829Abstract: Relay substrate (1) connecting between at least a first circuit board and a second circuit board, including housing (10) having recess (10a) provided in the outer circumference and hole (22) provided in the inner circumference; plural connecting terminal electrodes (12a, 12c) connecting between the top and bottom surfaces of housing (10); shield electrode (11) provided in recess (10a); and ground electrode (13) provided on a part of the top and bottom surfaces of housing (10).Type: GrantFiled: March 23, 2007Date of Patent: April 17, 2012Assignee: Panasonic CorporationInventors: Masato Mori, Daido Komyoji, Koichi Nagai, Yoshihiko Yagi