Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated-charge-extinguishment layer, at the first substrate surface, extends across the pixel array.

Abstract: A monolithically integrated cadmium telluride (CdTe) photovoltaic (PV) module includes a first electrically conductive layer and an insulating layer. The first electrically conductive layer is disposed below the insulating layer. The PV module further includes a back contact metal layer and a CdTe absorber layer. The back contact metal layer is disposed between the insulating layer and the CdTe absorber layer. The PV module further includes a window layer and a second electrically conductive layer. The window layer is disposed between the CdTe absorber layer and the second electrically conductive layer. At least one first trench extends through the back contact metal layer, at least one second trench extends through the absorber and window layers, and at least one third trench extends through the second electrically conductive layer. A method for monolithically integrating CdTe PV cells is also provided.

Abstract: A backside illuminated image sensor includes a substrate layer having a frontside and a backside. An array of photosensitive pixels is disposed within the substrate layer and is sensitive to light incident through the backside of the substrate layer. A metal grid is disposed over the backside of the substrate layer. The metal grid surrounds each of the photosensitive pixels and defines optical apertures for receiving the light into the photosensitive pixels through the backside. The metal grid includes intersecting wires each having a triangular cross-section. A material layer surrounds the metal grid.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A method of fabricating a solar cell includes forming a front contact layer over a substrate, and the front contact layer is optically transparent at specified wavelengths and electrically conductive. A first scribed area is scribed through the front contact layer to expose a portion of the substrate. A buffer layer doped with an n-type dopant is formed over the front contact layer and the first scribed area. An absorber layer doped with a p-type dopant is formed over the buffer layer. A back contact layer that is electrically conductive is formed over the absorber layer.

Abstract: Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: Fabrication methods for a flexible device for retina prosthesis are described. Layered structures including an array of pixel units may be formed over a substrate. Each pixel unit may comprise a processing circuitry, a micro electrode and a photo sensor. A first set of biocompatible layers may be formed over the layered structures. The substrate may be thinned down to a controlled thickness of the substrate to allow bending of the substrate to the curvature of a retina. A second set of biocompatible layers may be formed over the thinned substrate. The second set of biocompatible layers may be in contact with the first set of biocompatible layers to form a biocompatible seal wrapping around the device to allow long-term contact of the device with retina tissues. Micro electrodes of the pixel units may be exposed through the openings of these biocompatible layers.

Abstract: A method for forming a reduced conductive area in transparent conductive. The method includes providing a transparent, electrically conductive, chemically reducible material. A reducing atmosphere is provided and concentrated electromagnetic energy from an energy source is directed toward a portion of the transparent, electrically conductive, chemically reducible material to form a reduced conductive area. The reduced conductive area has greater electrical conductivity than the transparent, electrically conductive, chemically reducible material. A thin film article and photovoltaic module are also disclosed.

Abstract: The present invention relates to a backside illuminated (BSI) imager having a plurality of layers. A plurality of pixel sensors are positioned on a first layer of a substrate. Pixel select conductors are positioned on the substrate in front of the first layer. Pixel readout conductors including a plurality of output lines, pixel power conductors, and a ground conductor are positioned on the substrate in front of the pixel select conductors. A plurality of sample and hold capacitors coupled to the pixel output lines are positioned vertically and/or horizontally on the substrate in front of the ground conductor.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

Abstract: A method of forming trenches in a semiconductor device includes forming an etchant barrier layer above a first portion of a semiconductor layer. A first trench is etched in a second portion of the semiconductor layer using a first etchant. The second portion of the semiconductor layer is not disposed underneath the etchant barrier layer. The etchant barrier layer is etched through using a second etchant that does not substantially etch the semiconductor layer. A second trench is etched in the first portion of the semiconductor layer using a third etchant. The third etchant also extends a depth of the first trench.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: A method for reducing stripe patterns comprising receiving scattered light signals from a backside surface of a laser annealed backside illuminated image sensor wafer, generating a backside surface image based upon the scattered light signals, determining a distance between an edge of a sensor array of the laser anneal backside illuminated image sensor wafer and an adjacent boundary of a laser beam and re-calibrating the laser beam if the distance is less than a predetermined value.

Abstract: An imaging apparatus includes: a sensor substrate, wherein the sensor substrate has plural photoelectric conversion devices and driving devices thereof formed on a substrate, signal lines for reading imaging signals obtained in the photoelectric conversion devices through the driving devices and relay electrodes electrically connecting between the driving devices and the signal lines to relay between them.

Abstract: The present disclosure relates to a method of forming a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the method comprises forming a plurality of photodetectors within a front-side of a semiconductor substrate. An implant is performed on the back-side of the semiconductor substrate to form an implantation region having a doping concentration that is greater in the center than at the edges of the semiconductor substrate. The back-side of the workpiece is then exposed to an etchant, having an etch rate that is inversely proportional to the doping concentration, which thins the semiconductor substrate to a thickness that allows for light to pass through the back-side of the substrate to the plurality of photodetectors. By implanting the substrate prior to etching, the etching rate is made uniform over the back- side of the substrate improving total thickness variation between the photodetectors and the back-side of the substrate.

Abstract: A photovoltaic module is disclosed. The photovoltaic module comprises an array of shingled tiles disposed between a transparent front substrate and a back substrate, wherein the array of shingled tiles comprises a plurality of photovoltaic tiles in electrically contact with each other and positioned in overlapping rows. Each photovoltaic tile comprises a front metallic contact layer disposed on an epitaxial film stack disposed on a back metallic contact layer disposed on a support carrier layer. The photovoltaic module includes at least one busbar in electrical contact with the array of shingled tiles and disposed between the front and back glass substrates. The photovoltaic module also includes an encapsulation layer between the front and back glass substrates.

Abstract: Designs of image sensors with subpixels are disclosed. According to one aspect of an image sensor in one embodiment, subpixels within a pixel are designed without significantly increasing the cell or pixel area of the pixel. The readouts from the subpixels are accumulated to increase the sensitivity of the pixel without increasing the area of the image sensor. According to another aspect of the image sensors in the present invention, some subpixels within a pixel are respectively coated with filters, each designed for a frequency range. Thus the frequency response of a CMOS image sensor can be enhanced significantly according to application.

Abstract: A semiconductor apparatus including a substrate, a pixel array on the substrate, first and second conductive pads between which the substrate locates is provided. The apparatus also comprises an insulating layer arranged between the substrate and the first conductive pad; a third conductive pad arranged between the substrate and the insulating layer; a first conductive member which passes through the insulating layer and connects the first and third conductive pads to each other; and a second conductive member which passes through the substrate and connects the second and third conductive pads to each other. The pixel array further comprises a conductive line connected to circuit elements included in pixels aligned in a row or column direction. The first conductive pad is connected to the conductive line in an interval between the pixels.

Abstract: A method for forming an image sensing device is disclosed. An epitaxy layer having the first conductivity type is formed on a substrate, wherein the epitaxy layer comprises a first pixel area corresponding to a first incident light, a second pixel area corresponding to a second incident light, and a third pixel area corresponding to a third incident light. A first deep well is formed in a lower portion of the epitaxy layer for reducing pixel-to-pixel talk of the image sensing device. A second deep well is formed in a lower portion of the epitaxy layer.

Abstract: A method for manufacturing a thin-film photoelectric conversion device includes forming a first electrode layer, a photoelectric conversion layer having three conductive semiconductor layers laminated thereon, and a second electrode layer sequentially laminated in this order on a translucent insulating substrate, such that adjacent thin-film photoelectric conversion cells are electrically connected in series, isolating a thin-film photoelectric conversion cell into a plurality of thin-film photoelectric conversion cells by forming isolation trenches that reach from the second electrode layer to the first electrode layer, removing a part of sidewalls at an external periphery of the thin-film photoelectric conversion cells positioned at an external peripheral edge of the thin-film photoelectric conversion device, along with the external periphery, and modifying into insulation layers by performing an oxidation process on all of the sidewalls of the isolation trenches of the photoelectric conversion layer and al

Abstract: There is provided a solid-state imaging device including a pixel array portion in which multiple unit pixels are arranged on a semiconductor substrate, the multiple unit pixels each including a photoelectric conversion portion generating and accumulating a light charge based on a quantity of received light and a charge accumulation portion accumulating the light charge, wherein at least part of an electrode closer to an incidence side on which light enters the unit pixel of the charge accumulation portion, is formed with a metal film functioning as a light blocking film.

Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.

Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.

Abstract: Disclosed herein is a solid-state imaging element including: a semiconductor layer; a plurality of photoelectric conversion sections arranged within the semiconductor layer; and a pixel separating section disposed in a shape of a same width from a light receiving surface of the semiconductor layer to an opposite surface of the semiconductor layer from the light receiving surface in a position of separating the photoelectric conversion sections from each other for each pixel, the pixel separating section being formed by a material including an impurity.

Abstract: An image pickup device includes a sensor substrate. The sensor substrate includes: plural photoelectric conversion elements and driving elements for the plural photoelectric conversion elements which are formed on a substrate; wirings electrically connected to the driving elements; and a shield electrode disposed in a region between the plural photoelectric conversion elements and the wirings in a layer different from that of the wirings.

Abstract: A method for reducing dark current in image sensors comprises providing a backside illuminated image sensor wafer, depositing a first passivation layer on a backside of the backside illuminated image sensor wafer, depositing a plasma enhanced passivation layer on the first passivation layer and depositing a second passivation layer on the plasma enhanced passivation layer.

Abstract: Several embodiments for semiconductor devices and methods for forming semiconductor devices are disclosed herein. One embodiment is directed to a method for manufacturing a microelectronic imager having a die including an image sensor, an integrated circuit electrically coupled to the image sensor, and electrical connectors electrically coupled to the integrated circuit. The method can comprise covering the electrical connectors with a radiation blocking layer and forming apertures aligned with the electrical connectors through a layer of photo-resist on the radiation blocking layer. The radiation blocking layer is not photoreactive such that it cannot be patterned using radiation. The method further includes etching openings in the radiation blocking layer through the apertures of the photo-resist layer.

Abstract: A photovoltaic (PV) device has at least one lower PV cell on a substrate, the cell having a metallic back contact, and a I-III-VI absorber, and a transparent conductor layer. An upper PV cell is adhered to the lower PV cell, electrically in series to form a stack. The upper PV cell has III-V absorber and junction layers, the cells are adhered by transparent conductive adhesive having filler of conductive nanostructures or low temperature solder. The upper PV cell has no substrate. An embodiment has at least one shape of patterned conductor making contact to both a top of the upper and a back contact of the lower cells to couple them together in series. In an embodiment, a shape of patterned conductor draws current from excess area of the lower cell to the upper cell, in an alternative embodiment shapes of patterned conductor couples I-III-VI cells not underlying upper cells in series strings, a string being in parallel with at least one stack.

Abstract: A method for forming a magnetic tunnel junction cell includes forming a pinning layer, a pinned layer, a dielectric layer and a free layer over a first electrode, forming a second electrode on the free layer, etching the free layer and the dielectric layer using the second electrode as an etch barrier to form a first pattern, forming a prevention layer on a sidewall of the first pattern, and etching the pinned layer and the pinning layer using the second electrode and the prevention layer as an etch barrier to form a second pattern.

Abstract: The invention provides an organic solar cell, including: a substrate having a first electrode formed thereon; a hole transport layer overlying the first electrode; a metal layer having a first pattern in the hole transport layer; a photoactive layer, including: a first organic semiconductor film having a second pattern complementary to the first pattern and overlying the metal layer and the hole transport layer; a second organic semiconductor film having a first pattern substantially aligned to the first pattern of the metal layer and overlying the first organic semiconductor film, wherein the first organic semiconductor film and the second organic semiconductor film have opposite conductive types; a second electrode overlying the photoactive layer. The invention further provides a method for forming the organic solar cell.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.

Abstract: A photoelectric conversion section contains a semiconductor element having a laminated structure which contains an electroconductor, a semiconductor, and an insulator provided between the electroconductor and the semiconductor, in which the insulator is a silicon oxide film containing nitrogen in a main portion located between the electroconductor and the semiconductor.

Abstract: A cell for a silicon-based photoelectric multiplier may comprise a first layer of a first conductivity type and a second layer of a second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction. The cell may be processed by an ion implantation act wherein parameters of the ion implantation are selected such that due to an implantation-induced damage of the crystal lattice, an absorption length of infrared light of a wavelength in a range of ?800 nm to 1000 nm is decreased.

Abstract: A method of fabricating a solar cell is disclosed. The method includes the steps of forming a sacrificial layer on a silicon substrate, forming a doped silicon layer atop the sacrificial substrate, forming a silicon film atop the doped silicon layer, forming a plurality of interdigitated contacts on the silicon film, contacting each of the plurality of interdigitated contacts with a metal contact, and removing the sacrificial layer.

Abstract: A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges.

Abstract: The present invention discloses a micro/nanostructure PN junction diode array thin-film solar cell and a method for fabricating the same, wherein a microstructure or sub-microstructure PN junction diode array, such as a nanowire array or a nanocolumns array, is transferred from a source-material wafer to two pieces of transparent substrates, which are respectively corresponding to two electric conduction types, to fabricate a thin-film solar cell. In the present invention, the micro/nanostructure PN junction diode array has advantages of a fine-quality crystalline semiconductor, and the semiconductor substrate can be reused to save a lot of semiconductor material. Besides, the present invention can make the best of sunlight energy via stacking up the solar cells made of different types of semiconductor materials to absorb different wavebands of the sunlight spectrum.

Abstract: A detector includes a substrate; two first regions, each first region having a linear shape, and the two first regions being separated from each other on the substrate and arranged in parallel; and a pixel region provided between the two first regions and including a plurality of pixels, the pixel region including a plurality of second regions perpendicular to the two first regions, each of the two first regions including a peripheral circuit portion, each of the plurality of second regions including a driver line, and a width of each of the plurality of second regions being equal to or less than a width of a single pixel.

Abstract: A method of forming a metal pattern is provided. In the method, a first titanium layer, a copper layer and a second titanium layer are sequentially formed on a substrate. A photo pattern is formed on the second titanium layer. The first titanium layer, the copper layer and the second titanium layer are patterned using the photo pattern to form a first titanium pattern, a copper pattern formed on the first titanium pattern and a second titanium pattern formed on the copper pattern. Therefore, a fine metal pattern may be formed.

Abstract: A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed to form a suitable surface for epitaxial film growth. An epitaxial reactor is used to grow n- and p-type films forming the PV cell structures. A glass/ceramic handling layer is then formed on the PV cell structures. The PV cell structures with handling layers are then exfoliated from the mother wafer. The array of mother wafers may be reused multiple times, thereby reducing materials costs for the completed solar panels. The glass/ceramic handling layers provide structural integrity to the thin epitaxial solar cells during the separation process and subsequent handling.

Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.

Abstract: An aqueous acidic solution and an aqueous acidic etching solution suitable for texturizing the surface of single crystal and polycrystal silicon substrates, hydrofluoric acid; nitric acid; and at least one anionic polyether, which is surface active; a method for texturizing the surface of single crystal and polycrystal silicon substrates comprising the step of (1) contacting at least one major surface of a substrate with the said aqueous acidic etching solution; (2) etching the at least one major surface of the substrate for a time and at a temperature sufficient to obtain a surface texturization consisting of recesses and protrusions; and (3) removing the at least one major surface of the substrate from the contact with the aqueous acidic etching solution; and a method for manufacturing photovoltaic cells and solar cells using the said solution and the said texturizing method.

Abstract: A sensor array is integrated onto the same chip as core logic. The sensor array uses a first polysilicon and the core logic uses a second polysilicon. The first polysilicon is etched to provide a tapered profile edge in the interface between the sensor array and the core logic regions to avoid an excessive step. Amorphous carbon can be deposited over the interface region without formation of voids, thus providing for improved manufacturing yield and reliability.

Abstract: A thin film photovoltaic device includes a substrate and a first conductive layer coupled to the substrate. The first conductive layer includes at least one first groove extending through a first portion of the first conductive layer to a portion of the substrate. The device also includes at least one semiconductor layer coupled to a remaining portion of the first conductive layer and the portion of the substrate. The at least one semiconductor layer includes a plurality of non-overlapping vias, each via extending through a portion of the at least one semiconductor layer to a portion of the first conductive layer. The device further includes a second conductive layer coupled to a remaining portion of the at least one semiconductor layer and portions of the first conductive layer. The second conductive layer includes at least one second groove extending through a portion of the second conductive layer to a portion of the at least one semiconductor layer.

Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface and a plurality of conductive vias through the silicon wafer. The photodiode array further includes a patterned doped epitaxial layer on the first surface, wherein the patterned doped epitaxial layer and the substrate form a plurality of diode junctions. A patterned etching defines an array of the diode junctions.

Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface. The photodiode array also includes a plurality of refilled conductive vias through the silicon wafer, wherein the refilled conductive vias have a doping type different than the doping type of the substrate, and an interface between the refilled conductive vias and the substrate form diode junctions. The photodiode array further includes a patterned doped layer on the first surface overlapping the refilled conductive vias, wherein the patterned doped layer defines an array of photodiodes.

Abstract: A method for manufacturing a semiconductor device, the method comprising, forming a first opening in a first insulating layer provided above a semiconductor substrate, forming a first contact plug by depositing a conductive member in the first opening and removing a part of the conductive member so as to expose the first insulating layer, forming a second insulating layer over the first insulating layer after forming the first contact plug, forming a second opening in the first and second insulating layers without exposing the first contact plug, forming a second contact plug by depositing the conductive member in the second opening and removing a part of the conductive member so as to expose the second insulating layer, and removing the second insulating layer so as to expose the first contact plug after forming the second contact plug.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.