Abstract: A hardware and/or software facility for executing a multithreaded program is described. The facility causes each of a plurality of machines to execute the multithreaded program deterministically, such that the deterministic execution of the multithreaded program is replaced across the plurality of machines. The facility detects a problem in the execution of the multithreaded Program by one of the plurality of machines. In response, the facility adjusts the execution of the multithreaded program by at least one of the machines of the plurality.

Abstract: A method for implementing a just-in-time compiler involves obtaining high-level code templates in a high-level programming language, where the high-level programming language is designed for compilation to an intermediate language capable of execution by a virtual machine, and where each high-level code template represents an instruction in the intermediate language. The method further involves compiling the high-level code templates to native code to obtain optimized native code templates, where compiling the high-level code templates is performed, prior to runtime, using an optimizing static compiler designed for runtime use with the virtual machine. The method further involves implementing the just-in-time compiler using the optimized native code templates, where the just-in-time compiler is configured to substitute an optimized native code template when a corresponding instruction in the intermediate language is encountered at runtime.

Abstract: In one approach, a method is described of generating an interface for an operating system kernel. The method calls for creating an input file, where the input file includes a node structure for the interface. A kernel component of the interface is generated from the input file. A user space component of the interface is also generated from the input file.

Abstract: A method of compiling code includes ordering instructions that protect and release critical sections in the code to improve parallel execution of the code according to an intrinsic order of the critical sections. According to one embodiment, the intrinsic order of the critical sections in the code is determined from data dependence and control dependence of instructions in the critical sections, and additional dependencies are generated to enforce the intrinsic order of the critical sections. Other embodiments are described and claimed.

Abstract: According to some embodiments, a token synchronization gateway may be recognized in a graph-based business process model, such as a business process modeling notation model. A number of upstream artifacts located upstream from the token synchronization gateway may then be identified in the business process modeling notation model. In addition, a final artifact may be identified directly in front of the token synchronization gateway. The token synchronization gateway may then be compiled into code that will be executed at runtime to perform a synchronization process. The synchronization process may, for example, include handling tokens T1 through Tn to synchronize the upstream artifacts, with each token being associated with one of the n upstream artifacts.

Abstract: A method for binarizing initial script on an operating system includes: calling shell script to be binarized in a secondary memory unit; generating an execution table by translating the called shell script; generating a source program by merging a previously prepared source code template with the execution table; and combining a command sub-routine with the source program and binarizing the shell script by performing compile and building operations. According to the above, it is possible to minimize a booting delay time without using a fork & exec technique by applying the binary script instead of the shell script during performing system initialization while booting.

Abstract: A method, apparatus and software for processing software code for use in a multithreaded processing environment in which lock verification mechanisms are automatically inserted in the software code and arranged to determine whether a respective shared storage element is locked prior to the use of the respective shared storage element by a given processing thread in a multithreaded processing environment.

Abstract: A high-level language, architecture-independent probe program compiler is disclosed. A base program is executable by one or processors, and has one or more breakpoints. A probe program is associated with each breakpoint and is also indirectly executable by the one or more processors. The probe program is independent of the architecture of the processors, and is generated from source code written in a high-level language. The probe program associated with each breakpoint is executed when the breakpoint is reached during execution of the base program. The compiler may employ an abstract syntax tree to switch between an address space of the probe program and an address space of the base program, by traversing the tree. Some of the nodes of the tree may more simply represent address space-specific objects of the base program. The probe program may be able to pass messages by manipulating the state of the base program.

Abstract: The present invention is directed to a method and system for translating a high-level language (HLL) code such as C, C++, Fortran, Java or the like into a HDL code such as Verilog or VHDL which requires no modification in the original HLL source code, while supporting a cross call between software and hardware, and even recursive calls in hardware. The system includes: a HLL-to-HLL source translator which reads user programming directive from a translation-targeted high-level language code marked with the user directive, and separates the translation-targeted high-level language code into a hardware code part and a software code part; a main compiler which compiles the software code part; a HLL-to-HDL translator which includes the front-end and middle-end of the main compiler and a HDL backend; a main core which executes the compiled software code part; and a dedicated hardware which executes the HDL code.

Abstract: A computer system is provided for compiling program code and a method for compiling program code by a processor. The method, for example, includes, but is not limited to, receiving, by the processor, the program code and compiling, by the processor, the program code, wherein the processor, when compiling the program code, parses the program code and assigns a default address space qualifier to each member functions without a defined address space qualifier and, when the member function is used, infers an address space for each default address qualifier based upon how the respective member function is being used.

Abstract: A modular compiler architecture utilizes partial compiler modules that cooperatively produce object code for operation on a complex execution infrastructure. The partial compilers may invoke the services of other partial compilers, wherein each partial compiler operates as a self-contained “black-box” module. This structure, in turn, may allow the partial compilers of such implementations to be arranged in modular hierarchies for multi-level compilation and specialization of each partial compiler. These various implementations, in turn, produce compiled programs able to correctly run on large computer clusters comprising a mix of computational resources (machines, multiple cores, graphics cards, SQL server engines, etc.). Certain implementations may also be directed to compilers comprising modular partial compilers, and partial compilers may be formed from generalized forms of traditional compilers. Further disclosed is a set of high-level operations that manipulate partial compilers.

Abstract: A system and method for modeling simulation and game artificial intelligence as a data management problem are described. A scripting language provides game designers and players with a data-driven artificial intelligence scheme for customizing behavior for individual agents. Query processing and indexing techniques efficiently execute large numbers of agent scripts, thus providing a framework for games with a large number of agents.

Abstract: Approaches for generating a hardware definition from a program specified in a high-level language. In one approach, a first set of blocks of instructions in the high-level language program is identified. Each block in the first set is bounded by a respective loop designation in the high-level language. For each block in the first set, an associated respective second set of one or more blocks of the program is identified. Each block in the second set is outside the block in the first set. A hardware definition of the program is generated and stored. For each block in the first set, the hardware definition specifies power-reducing circuitry for one or more blocks in the associated second set. The power-reducing circuitry is controlled based on a status indication from the hardware definition of the block in the first set.

Abstract: The specification of a string within source code written in a programming language is received. The source code is processed for ultimate execution of a computer program encompassing the source code, by at least performing the following. It is determined whether the string specified is a short string or a long string. The string is processed in accordance with a first manner where the string is a short string. The string is processed in accordance with a second manner where the string is a long string.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: A single software project in an integrated development environment (IDE) may be built for multiple target environments in a single build episode. Multiple different output artifacts may be generated by the build process for each of the target environments. The output artifacts are then deployed to the target environments, which may be homogeneous or heterogeneous environments. The same source project may be used to generate multiple output artifacts for the same target environment.

Abstract: Programming for a data processor to execute a data processing application is provided using microcode source code. The microcode source code is assembled to produce microcode that includes digital microcode instructions with which to signal the data processor to execute the data processing application.

Abstract: In some embodiments, a method and apparatus for automatically parallelizing a sequential network application through pipeline transformation are described. In one embodiment, the method includes the configuration of a network processor into a D-stage processor pipeline. Once configured, a sequential network application program is transformed into D-pipeline stages. Once transformed, the D-pipeline stages are executed in parallel within the D-stage processor pipeline. In one embodiment, transformation of a sequential application program is performed by modeling the sequential network program as a flow network model and selecting from the flow network model into a plurality of preliminary pipeline stages. Other embodiments are described and claimed.

Abstract: System and method for implicit downcasting at compile time in a data flow program. A first data flow function in an object-oriented dataflow program is identified, where the first function includes an input of a parent data type and an output of the parent data type. The first function is analyzed to determine if the output preserves the run-time data type of the input. A second dataflow function in the object-oriented data flow program is identified, where the second function includes a program element that calls the first function, passing an input parameter of a child data type of the parent data type as input. If the analysis determines that an output parameter returned by the output of the first function will always be of the child data type, the program element is automatically configured at compile time to always downcast the output parameter from the parent data type to the child data type at run-time.

Abstract: The disclosure is applied to a generic microprocessor architecture with a set (e.g., one or more) of controlling elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs using program code embodied as a set of virtualized control threads. The arrangement also enables MPEs delegate functionality to one or more groups of SPEs such that those group(s) of SPEs will act as pseudo MPEs. The pseudo MPEs will utilize pseudo virtualized control threads to control the behavior of other groups of SPEs. In a typical embodiment, the apparatus includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements.

Abstract: Disclosed herein are modular and open platform systems and related methods. In accordance with an aspect, a system may comprise multiple hardware subsystems configured to be selectively and operatively connected together. The system may include a main software module comprising multiple software sub-modules that each corresponds to one of the hardware subsystems. Each hardware subsystem may be configured to implement a target function. The system may also include one or more processors and memory configured to detect operative connection of one of the hardware subsystems. Further, the processor and memory may dynamically load the software sub-module that corresponds to the connected hardware subsystem into the main software module, and integrate the main software module with the loaded software sub-module for performing the target function associated with the corresponding hardware subsystem in response to detection of the operative connection.

Abstract: Methods, systems, and computer-readable media for determining whether dependencies of configuration files have changed such that the compilation strategy should be recomputed. Local build checksums are computed for individual configuration files. The local build checksums are computed by sorting input paths to the configuration files plus data indicating whether the path refers to a file or a directory and a checksum computed on the configuration file itself. The transitive closure of local build checksums are then used to compute a global build checksum: the local build checksums are sorted in order to compute the global build checksum. If the global build checksum is different from a previously computed global build checksum, then the compilation strategy should be recomputed, since this is a signal that the compilation strategy may not be valid anymore, e.g. because some dependencies in the configuration files have changed.

Abstract: An exemplary method for preventing exploitation of byte sequences that violate compiler-generated instruction alignment may comprise: 1) identifying instantiation of a process, 2) identifying an address space associated with the process, 3) identifying, within the address space associated with the process, at least one control-transfer instruction, 4) determining that at least one byte preceding the control-transfer instruction is capable of resulting in an out-of-alignment instruction, and then 5) preventing the control-transfer instruction from being executed. In one example, the system may prevent the control-transfer instruction from being executed by inserting a hook in place of the intended instruction that executes the intended instruction and then returns control flow back to the instantiated process. Corresponding systems and computer-readable media are also disclosed.

Abstract: A system which combines sequential and iterative source code is provided. The system decides which type of processing would be most suitable for all portions of the source code, regardless of type. The system can adjust that decision based on the specific nature of the constructs within the source code, and can also adjust that decision based on the platform upon which the resulting executable program will run.

Abstract: A single instruction multiple data processor may accomplish register allocation by identifying live ranges that have incompatible write masks during compilation. Then, edges are added in an interference graph between live ranges that have incompatible masks so that those live ranges will not be assigned to the same physical register.

Abstract: Disclosed herein are systems, computer-implemented methods, and non-transitory computer-readable storage media for obfuscating code, such as instructions and data structures. Also disclosed are non-transitory computer-readable media containing obfuscated code. In one aspect, a preprocessing tool (i.e. before compilation) identifies in a source program code a routine for replacement. The tool can be a software program running on a computer or an embedded device. The tool then selects a function equivalent to the identified routine from a pool of functions to replace the identified routine. A compiler can then compile computer instructions based on the source program code utilizing the selected function in place of the identified routine. In another aspect, the tool replaces data structures with fertilized data structures. These approaches can be applied to various portions of source program code based on various factors. A software developer can flexibly configure how and where to fertilize the source code.

Abstract: Execution of a query is optimized. A plurality of plans for executing the query on a multi-database system are analyzed. A first plan having a first step and a second step is selected. The first step of the first plan is executed. The plan selection is re-evaluated before executing the second step of the first plan. A second plan of the plurality of plans for executing the query is executed to produce a result. The result is stored.

Abstract: Thermal-aware source code compilation including: receiving, by a compiler, an identification of a target computing system, the identification of the target computing system specifying temperature sensors that measure temperature of a memory module; compiling the source code into an executable application including inserting in the executable application computer program instructions for thermal-aware execution, the computer program instructions, when executed on the target computing system, carry out the steps of: retrieving temperature measurements of one or more of the target computing system's temperature sensors; determining, in real-time in dependence upon the temperature measurements, whether a memory module is overheated; if a memory module is overheated, entering a thermal-aware execution state including, for each memory allocation in the executable application, allocating memory on a different memory module than the overheated memory module; and upon the temperature sensors indicating the memory modu

Abstract: System and method for analyzing a graphical program. A graphical program is displayed on a display. A semantic edit operation is performed on the graphical program in response to user input. The semantic edit operation is performed by a first process. Semantic analysis of the graphical program is performed by a second process in response to performing the semantic edit operation, where the second process is asynchronous with respect to the first process. Results from the semantic analysis of the graphical program are displayed in response to completion of the semantic analysis. If during the semantic analysis, another semantic edit operation is performed on the graphical program, the semantic analysis may be preemptively terminated and re-initiated. Displaying results from the semantic analysis of the graphical program may then include displaying results from the re-initiated semantic analysis of the graphical program in response to completion of the re-initiated semantic analysis.

Abstract: A computing device receives an object at runtime of a compiled application, wherein the object is a component of the application. The computing device generates a transactional proxy for the object, the transactional proxy including transactional logic, a transactional marker and a pointer to the object. The transactional proxy is passed to the application, wherein the application to make calls on the transactional proxy instead of on the object.

Abstract: An object code generating system includes: a storage unit configured to store a first source file; and an object code generating section. The object code generating section is configured to read the first source file, generate function data indicating an arrangement address and size of each of the functions in the first source file, generate an execution format file for the first source file; and read a second source file obtained by modifying at least one of the functions as a specific function in the first source file, and the function data from the storage unit, generate a dummy function corresponding to the modified specific function when the modified specific function is discovered in the second source file, arrange the dummy function at an arrangement address different from the arrangement addresses of the functions, and arrange a branch command to the dummy function at the different arrangement address.

Abstract: While optimizing executable code, compilers traditionally make static determinations about whether or not to inline functions. Embodiments of the invention convert dynamic hardware-event sampling information into context-specific edge frequencies, which can be used to make inlining decisions for functions.

Abstract: A computer implemented method, apparatus, and computer usable program code for compiling source code for performing a complex operation followed by a complex reduction operation. A method is determined for generating executable code for performing the complex operation and the complex reduction operation. Executable code is generated for computing sub-products, reducing the sub-products to intermediate results, and summing the intermediate results to generate a final result in response to a determination that a reduced single instruction multiple data method is appropriate.

Abstract: Compiling a graphical program including a textual program portion for execution on a real time target. The graphical program may be created on a display or stored in a memory medium. The graphical program may include a plurality of connected nodes which visually indicate functionality of the graphical program. The graphical program may include at least one node which corresponds to a textual language program portion. The textual language program portion may be written or specified in a dynamically typed programming language. The graphical program may be compiled for deployment on the real time target. Compiling the graphical program may include compiling the plurality of connected nodes and the textual language program portion for deterministic real time execution on the real time target.

Abstract: The invention is a method and apparatus for use in developing a program. More particularly, a method and apparatus for compiling a source code program during editing of the same is disclosed, where editing can be initial entry or modification subsequent to initial entry. The method comprises compiling at least a portion of a source code program defined by a waypoint during the editing of the source code program. In other aspects, the invention includes a program storage medium encoded with instructions that, when executed, perform this method and a computer programmed to perform this method. The apparatus includes a computing apparatus, comprising a text editor through which a source code program may be entered; and a compiler that may compile the source code program. The control block is capable of determining at least one waypoint in the source code program and invoking the compiler to compile the source code program up to the waypoint.

Abstract: System and method for converting a class oriented data flow program to a structure oriented data flow program. A first data flow program is received, where the first data flow program is an object oriented program comprising instances of one or more classes, and wherein the first data flow program is executable to perform a first function. The first data flow program is automatically converted to a second data flow program, where the second data flow program does not include the instances of the one or more classes, and where the second data flow program is executable to perform the first function. The second data flow program is stored on a computer memory, where the second data flow program is configured to be deployed to a device, e.g., a programmable hardware element, and where the second data flow program is executable on the device to perform the first function.

Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.

Abstract: Techniques are disclosed for generating fast vector masking SIMD code corresponding to source code having a conditional statement, where the SIMD code replaces the conditional statements with vector SIMD operations. One technique includes performing conditional masking using vector operations, bit masking operations, and bitwise logical operations. The need for conditional statements in SIMD code is thereby removed, allowing SIMD hardware to avoid having to use branch prediction. This reduces the number of pipeline stalls and results in increased utilization of the SIMD computational units.

Abstract: A method to selectively remove memoizing functions from computer program code includes initially locating a memoizing function call in the program code. The method then replaces the memoizing function call with a simple object allocation. Using escape analysis, the method determines whether the replacement is legal. If the replacement is not legal, the method removes the simple object allocation and reinserts the original memoizing function call in its place. If the replacement is legal, the method retains the simple object allocation in the program code. If desired, certain compiler optimizations, such as stack allocation and scalarization, may then be performed on the simple object allocation. A corresponding computer program product and apparatus are also disclosed.

Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.

Abstract: According to an embodiment, a compiling device compiling a source program written so as to use a frame memory includes a processing delay amount calculator configured to calculate respective processing delay amounts between a plurality of process tasks in the source program on the basis of processing states of pieces of data processed by the process tasks. The compiling device also includes a line memory amount calculator configured to calculate respective line memory sizes required for each of the process tasks on the basis of an access range of a frame memory from which the process task reads data and an instruction code converter configured to convert the plurality of process tasks to instruction codes executable in a pipeline on the basis of the processing delay amounts and the line memory sizes.

Abstract: A computer is programmed to automatically have multiple sessions update a common counter which is shared therebetween, when interpreting a given method so that system-wide statistics are collected for each method. The single counter is commonly accessed for updating by the respective interpreters in the multiple sessions which are executing the method. The computer is further programmed to asynchronously compile the method (regardless of the state of the multiple sessions), to obtain compiled software in the form of executable machine instructions. Specifically, asynchronous compilation starts dynamically, whenever a method's common multi-session counter satisfies a predetermined condition. Finally, each session is informed when compilation is completed so that the next time the method needs to be run, it is not interpreted and instead the compiled software is executed. The compiled software is kept in a shared memory which is accessible to each session.

Abstract: Disclosed herein are methods, systems, and computer-readable storage media for annotation driven integrity program verification. The method includes distributing verification calls configured to verify a function across call paths leading to the function in source code, generating a binary from the source code having placeholders associated with the verification calls, and filling each placeholder in the binary with verification data or reference checksums. Alternatively, the method includes receiving source code having a verification call, replacing the verification call with one or more equivalent verification calls distributed over a call path, replacing each verification call with a checksum function generating placeholders while compiling, generating a binary based on the placeholders, and filling each placeholder in the binary with reference checksums. The system includes a processor and a module controlling the processor to perform the methods.

Abstract: A system and method for compiling and matching regular expressions is disclosed. The regular expression compiling system includes a syntax analyzing module and at least two types of compiling modules. The syntax analyzing module is configured to analyze syntactic characteristics of a regular expression and send the regular expression to an appropriate compiling module according to preset syntactic rules and the syntactic characteristics of the regular expression; and the appropriate compiling module is configured to receive the regular expression and compile the regular expression into a data structure of a specific form.

Abstract: In response to receiving pre-processed code, a compiler identifies a code section that is not a candidate for acceleration and a code block that is a candidate for acceleration. The code block specifies an iterated operation having a first operand and a second operand, where each of multiple first operands and each of multiple second operands for the iterated operation has a defined addressing relationship. In response to the identifying, the compiler generates post-processed code containing lower level instruction(s) corresponding to the identified code section and creates and outputs an operand data structure separate from the post-processed code. The operand data structure specifies the defined addressing relationship for the multiple first operands and for the multiple second operands. The compiler places a block computation command in the post-processed code that invokes processing of the operand data structure to compute operand addresses.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing software code capable of automated runtime negotiation of computation block execution between different computers. In one aspect, a method includes storing, on each of multiple devices, code blocks for a software application that performs a particular set of functions and assigning at runtime of the software application which of the devices is to execute each of the code blocks. Each of the code blocks is executed on the assigned devices and data is communicated between the assigned devices to facilitate executing different code blocks on different devices.

Abstract: A mechanism is disclosed for operating local version-independent service program code for infrastructure services, wherein the mechanism is automatically and optionally linked to a central, remote service infrastructure, and wherein both an online and an offline processing mode is included and automatically supported, and wherein the mechanism is embedded in a generic runtime environment. In at least one embodiment, it contains service program code implemented in the runtime environment for calling by way of the application program code with standardized interfaces, wherein the service program code is intended for the provision of functionalities for predetermined services that an application program code can use.

Abstract: Scripts are incrementally compiled at runtime to generate executable code. The incremental compilation generates executable code corresponding to a basic block of the script. The executable code for a basic block of script is generated for a set of types of variables of the basic block resulting from execution of the script in response to a request. The generated executable code is stored and executed for subsequent requests if these requests result in the same types of variables for the basic block. The incremental compilation of the script is performed in a lazy fashion, such that executable code is not generated for combinations of types of variables of the script code that are not obtained from requests received at runtime. The script may dynamically generate portions of a web page that is returned in response to a request for execution of the script.

Abstract: A system for communicating with a microprocessor includes an interface agent that facilitates a communications link between customized windows applications and a suite of development tools. The system allows for interactive hardware and software verification testing of a microcontroller or microprocessor contained within any type of platform, such as mass produced electronic subassembly, consumer product, or a demonstration board. The system also allows for interactive tutorials about the suite of development tools and capabilities of a selected microcontroller or microprocessor. The interface agent affords a high level of interactivity during the tutorials, which involves requesting the user to perform tasks and monitoring for execution of the tasks.