Abstract: An apparatus includes a semiconductor substrate, elongated diffused well regions, and elongated conductors. The semiconductor substrate has a first electrical conductivity type. The elongated diffused well regions are in the semiconductor substrate. The diffused well regions have a second electrical conductivity type opposite the first electrical conductivity type. Each of the elongated electrical conductors crosses the diffused well regions at respective locations of one-time programmable memory cells. Each of the memory cells includes a antifuse structure between the respective diffused well region and the respective electrical conductor. Each of the memory cells has a first state in which the antifuse structure has a first electrical resistance and a second state in which the antifuse structure has a second electrical resistance lower than the first electrical resistance.

Abstract: A method of forming a microphone forms a backplate, and a flexible diaphragm on at least a portion of a wet etch removable sacrificial layer. The method adds a wet etch resistant material, where a portion of the wet etch resistant material is positioned between the diaphragm and the backplate to support the diaphragm. Some of the wet etch resistant material is not positioned between the diaphragm and backplate. The method then removes the sacrificial material before removing any of the wet etch resistant material added during the prior noted act of adding. The wet etch resistant material then is removed substantially in its entirety after removing at least part of the sacrificial material.

Abstract: The present invention relates to a semiconductor device and a method of manufacturing the same. A high-resistance silicon wafer is manufactured in such a manner that a large-sized silicon wafer manufactured by the Czochralski method is irradiated with neutrons, and high-resistance and low-resistance elements are simultaneously formed on the high-resistance silicon wafer. Thus, the manufacturing cost can be remarkably saved, and the reliability of products can be enhanced.

Abstract: A semiconductor memory device includes a semiconductor substrate having a dummy cell region adjacent to a memory cell region, a plurality of memory cell transistors, a selective gate transistor, a peripheral circuit transistor, a selective gate line, a contact plug, a dummy contact plug formed in an element forming region of the memory cell region adjacent to the selective gate line, and a spacer insulating film formed on a sidewall of the peripheral circuit transistor. The sidewall of the selective gate electrode is formed with no spacer insulating film, and the selective gate line has a sidewall facing an region of the dummy cell region in which the dummy contact plug is formed, except for the sidewall of the selective gate electrode. The sidewall of the selective gate line is formed with a spacer insulating film.

Abstract: A BiCMOS-compatible JFET device comprising source and drain regions (17, 18) which are formed in the same process as that used to form the emitter out-diffusion or a vertical bipolar device, wherein the semiconductor layer which forms the emitter cap in the bipolar device forms the channel (16) of the JFET device and the layer of material (i.e. the base epi-stack) which forms the intrinsic base region of the bipolar device forms the intrinsic gate region (14) of the JFET device. As a result, the integration of the JFET device into a standard BiCMOS process can be achieved without the need for any additional masking or other processing steps.

Abstract: A semiconductor component is proposed which has a semiconductor body having a first semiconductor zone of the first conduction type, at least one first rectifying junction with respect to the first semiconductor zone, at least one second rectifying junction with respect to the first semiconductor zone, wherein the three rectifying junctions each have a barrier height of different magnitude.

Abstract: A manufacturing method of a semiconductor device of this invention includes forming metal pads on a Si substrate through a first oxide film, bonding the Si substrate and a holding substrate which bolsters the Si substrate through a bonding film, forming an opening by etching the Si substrate followed by forming a second oxide film on a back surface of the Si substrate and in the opening, forming a wiring connected to the metal pads after etching the second oxide film, forming a conductive terminal on the wiring, dicing from the back surface of the Si substrate to the bonding film and separating the Si substrate and the holding substrate.

Abstract: A ferroelectric capacitor (42) is formed over a semiconductor substrate (10), and thereafter, a barrier film (46) directly covering the ferroelectric capacitor (42) is formed. Then, an interlayer insulating film (48) is formed and flattened. Then, an inclined groove is formed in the interlayer insulating film (48), and a barrier film (50) is formed over the entire surface.

Abstract: There are provided a memory device capable of writing and reading data at a low voltage and a method of manufacturing the same. The memory device comprises: a bit line formed in one direction; a plurality of word lines provided crosswise above the bit line, the word lines formed in parallel with a vacant space formed therebetween; a flip electrode electrically connected to the bit line, formed over one of the word lines above the bit line to pass the vacant space, and configured to be bent in one direction with respect to the plurality of word lines by electric fields induced between the plurality of word lines; and a contact part protruding from a lower end of the flip electrode concentrates charges induced by the flip electrode in response to charges applied by the word line to selectively bring the word line into contact with the flip electrode.

Abstract: A method of manufacturing a floating structure capable of providing increased device yield. The method includes: a) forming an insulation film, a predetermined area of which is removed, between a first substrate and a second substrate; and b) forming a floating structure in the removed predetermined area.

Abstract: Scribe-line structures and methods of forming such scribe-line structures on a face of a semiconductor substrate are provided. By means of the scribe-line structures and the methods of this invention, physical shock and cracking tendencies along a semiconductor substrate can be minimized during performance of a cutting process on the semiconductor substrate as part of post-fabrication processing. A representative method according to this invention comprises the sequential steps of: forming a lower layer on a semiconductor substrate; forming a molding layer on the lower layer such that the molding layer includes at least one protective contact hole; subsequently forming a dielectric layer and an upper layer on the molding layer so as to fill the protective contact hole, such dielectric layer being formed of a material having a greater mechanical intensity than that of the molding layer; and then forming protective layer patterns on the upper layer.

Abstract: A method for manufacturing a semiconductor device comprising: a first step of successively forming a silicon oxide film and a silicon nitride film on a silicon substrate, followed by forming a silicon nitride oxide film or a multilayered film containing the silicon nitride oxide film on the silicon nitride film; a second step of forming a photoresist film having an opening portion located at the position corresponding to an element isolation area of the silicon substrate on the silicon nitride film or the multilayered film according to a photolithography method; a third step of forming a trench having a pair of tapered side surface portions on the confronting side surfaces thereof on the silicon nitride oxide film or the multilayered film by using the photoresist film as a mask, the tapered side surface portions being inclined toward the substrate side so as to approach each other; and a fourth step of patterning the silicon nitride film and the silicon oxide film by dry etching by using the photoresist fi

Abstract: A method for the production of a silicon single crystal by pulling the single crystal, according to the Czochralski method, from a melt which is held in a rotating crucible, the single crystal growing at a growth front, heat being deliberately supplied to the center of the growth front by a heat flux directed at the growth front. The method produces a silicon single crystal with an oxygen content of from 4*1017 cm?3 to 7.2*1017 cm?3 and a radial concentration change for boron or phosphorus of less than 5%, which has no agglomerated self-point defects. Semiconductor wafers are separated from the single crystal. These semiconductor wafers have may have agglomerated vacancy defects (COPs) as the only self-point defect type or may have certain other defect distributions.

Abstract: Disclosed is a method of manufacturing integrated circuit chips that partially joins an integrated circuit wafer to a supporting wafer at a limited number of joining points. Once joined, the integrated circuit wafer is chemically-mechanically polished to reduce the thickness of the integrated circuit wafer. Then, after reducing the thickness of the integrated circuit wafer, the invention performs conventional processing on the integrated circuit wafer to form devices and wiring in the integrated circuit wafer. Next, the invention cuts through the integrated circuit wafer and the supporting wafer to form chip sections. During this cutting process, the integrated circuit wafer separates from the supporting wafer in chip sections where the integrated circuit wafer is not joined to the supporting wafer by the joining points.