Chamber wall liner for a semiconductor manufacturing apparatus

Description

FIG. 1 is a perspective view of a chamber wall liner for a semiconductor manufacturing apparatus, showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

Claims

The ornamental design for a chamber wall liner for a semiconductor manufacturing apparatus, as shown and described.