Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.

Abstract: In an active matrix type light emitting device, a top surface exit type light emitting device in which an anode formed at an upper portion of an organic compound layer becomes a light exit electrode is provided. In a light emitting element made of a cathode, an organic compound layer and an anode, a protection film is formed in an interface between the anode that is a light exit electrode and the organic compound layer. The protection film formed on the organic compound layer has transmittance in the range of 70 to 100%, and when the anode is deposited by use of the sputtering method, a sputtering damage to the organic compound layer can be inhibited from being inflicted.

Abstract: The present invention discloses a control TFT structure (i.e. a driving TFT) for reducing leakage in an OLED display. A semiconductor layer, such as a polysilicon layer, is deposited on a transparent substrate as a channel region. A lightly doped region and a drain region are disposed on one side of the polysilicon layer and a source region is disposed on the opposite side of the polysilicon layer. An insulating layer is deposited covering the surface of the polysilicon layer, the lightly doped region, and the source/drain regions. Source and drain electrodes are disposed in the insulating layer, electrically connecting the source and drain region respectively. A gate metal layer is disposed on the insulating layer, at approximately the top right portion of the polysilicon layer to form a transistor structure.

Abstract: An in-plane switching mode active matrix type liquid crystal display device includes a first substrate, a second substrate located opposing the first substrate, and a liquid crystal layer sandwiched between the first and second substrates. The first substrate includes a thin film transistor, a pixel electrode, a common electrode, a data line, a scanning line, and a common electrode line. The scanning line and the common electrode line are formed in a common layer in parallel with each other. The common electrode overlaps the data line and the scanning line with an interlayer insulating film existing therebetween. The common electrode line is singly formed at either side about the scanning line. The common electrode is electrically connected to the common electrode line through a contact hole formed throughout the interlayer insulating film, and shields a gap formed between the scanning line and the common electrode line.

Abstract: This invention provides a structure and method for improved transmission line operation on integrated circuits. One method of the invention includes forming transmission lines in an integrated circuit. The method includes forming a first layer of electrically conductive material on a substrate. A first layer of insulating material is formed on the first layer of the electrically conductive material. A pair of high permeability metal lines are formed on the first layer of insulating material. The pair of high permeability metal lines include permalloy and/or Ni45Fe55 films. A transmission line is formed on the first layer of insulating material and between and parallel with the pair of high permeability metal lines. A second layer of insulating material is formed on the transmission line and the pair of high permeability metal lines. And, the method includes forming a second layer of electrically conductive material on the second layer of insulating material.

Abstract: A photodiode is provided which can operate at a high rate and is suitable for optical communications. The photodiode with a pin-type configuration of an end surface incidence type includes a first photodiode unit having a first n-type blocking layer, a first light-absorbing layer constituted by an intrinsic semiconductor, and a first p-type blocking layer on a semiinsulating substrate; a second photodiode unit having layers of the same configuration formed thereon; a contact layer; a first electrode; and a second electrode, wherein the thickness of each light-absorbing layer is half that in a conventional monolayer photodiode. As a result, the maximum travel time of the carriers (electrons and holes) in each photodiode unit is reduced by half and the photodiode can operate at a rate higher than that of the conventional photodiode.

Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.

Abstract: A cascaded imaging storage system for a pixel is disclosed for improving intrascene dynamic range. Charges accumulated in a first capacitor spill over into a second capacitor when a charge storage capacity of the first capacitor is exceeded. A third capacitor may also be provided such that charges accumulated by said second capacitor spill over into the third capacitor when the charge storage capacity of the second capacitor is exceeded.

Abstract: Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive materials containing silicon include polysilicon and silicon-germanium. There is also provided a method and structure for isolating the regions by providing a trench in an active area of a substrate, growing an epitaxial layer in the trench to fill the trench or to partially fill the trench and depositing an insulating material over the epitaxial layer and within the trench to completely fill the trench.

Abstract: In an optoelectronic component assembly and a method for the production thereof, the optoelectronic component assembly includes an optoelectronic component arranged on a support element, which is surrounded by a closed dam. An encapsulation is arranged in an inner area of the dam, which encapsulates the optoelectronic component and includes two sealing materials. The inner area of the dam may be filled with a first sealing material up to the top edge of the optoelectronic component. The inner area of the dam located above the optoelectronic component is filled with a second transparent sealing material at least in one area of the window.

Abstract: A photon detector capable of detecting gigahertz frequency optical signals utilizes a layer of photonic material that is formed below of the coil of an inductor. When a pulsed light source is applied to the layer of photonic material, the photonic material generates eddy currents that alter the magnetic flux of the inductor. The signals can then be detected by detecting the change in magnetic flux of the inductor.

Abstract: A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 ?m2 to about 10 ?m2. The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.

Abstract: A camera module for a mobile device is reduced in size and manufacturing cost. A filter material made of a multi-layer thin film is bonded to a surface of a lens which is bonded to a surface of an image sensor chip. The filter material is a filter to block radiation within a predetermined range of wave length in an incident radiation to the lens, for example, an IR filter to block infrared radiation. An iris material made of a film such as an acrylic film or a polyolefin film is bonded to the lens covered with the filter material.

Abstract: A photodiode array device having an absorption layer and a cladding layer formed on one surface of a single substrate, anodes formed on the cladding layer, a cathode formed on the other surface of the substrate, and a plurality of light-receiving regions; a photodiode module including the photodiode array device; and a structure for connecting the photodiode module and an optical connector. The photodiode array device has trenches formed on the one surface of the substrate and having such a depth as to divide the absorption layer into subdivisions, for cutting off propagation of light between adjacent light-receiving regions.

Abstract: Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted.

Abstract: The invention relates to very small-sized color image sensors.

Abstract: To transfer signal charges at high speed with small noise, there is provided a charge transfer apparatus including a semiconductor substrate of one conductivity type, a charge transfer region of a conductivity type opposite to that of the semiconductor substrate that is formed in the semiconductor substrate and joined to the semiconductor substrate to form a diode, a signal charge input portion which inputs a signal charge to the charge transfer region, a signal charge output portion which accumulates the signal charge transferred from the charge transfer region, and a plurality of independent potential supply terminals which supply a potential gradient to the semiconductor substrate, wherein the signal charge in the charge transfer region is transferred by the potential gradient formed by the plurality of potential supply terminals.

Abstract: An active matrix substrate for a liquid crystal display and method of forming the same. To form the active matrix substrate five masks are needed. The first mask forms gate lines on the transparent substrate. The second mask patterns a stacked layer of a metal layer/an n-doped layer/a semiconductor layer formed on a gate insulating layer to form data lines. After forming a low k dielectric layer, the third mask forms openings therein. The forth mask patterns pixel electrodes and conducting lines with source pattern on the low k dielectric layer and further patterns the metal layer and the n-doped layer. After depositing a passivating layer the fifth mask defines the passivating layer.

Abstract: An active pixel array has the signal output of each pixel connected to a first column conductor, and a reset switch connected to a second column conductor. The first and second column conductors are connected to a read-reset amplifier. The read-reset amplifier operates in a first mode in which a reset voltage is applied to the second column line, and in a second mode in which pixel output signals are buffered from the first column line. The read-reset amplifier can also operate as a comparator forming part of an ADC circuit.

Abstract: A TFT is provided completely separated by an insulating film, in which a parasitic MOSFET is not generated at ends of a semiconductor layer, and the variation in characteristics is small. At least one portion of the ends in the gate-width direction of a gate electrode forming the TFT is disposed in a semiconductor region which forms the TFT, and the ends in the gate-length direction of the gate electrode extend toward the outside of the semiconductor region forming the TFT. With this arrangement, a uniform TFT in which a parasitic MOSFET is not generated at the ends in the gate-width direction is obtainable.

Abstract: A semiconductor detector of electromagnetic radiation which utilizes a dual-purpose electrode which extends significantly beyond the edge of a photodiode. This configuration reduces the sensitivity of device performance on small misalignments between manufacturing steps while reducing dark currents, kTC noise, and “ghost” images. The collection-mode potential of the dual-purpose electrode can be adjusted to achieve charge confinement and enhanced collection efficiency, reducing or eliminating the need for an additional pinning layer. Finally, the present invention enhances the fill factor of the photodiode by shielding the photon-created charge carriers formed in the substrate from the potential wells of the surrounding circuitry.

Abstract: The solid-state imaging device according to one embodiment of the present invention includes a semiconductor substrate, a plurality of photoelectric conversion regions arrayed in the vertical direction and the horizontal direction on the surface of the substrate, and an electric charge transfer region disposed between the photoelectric conversion regions adjacent in the horizontal direction of the substrate. The substrate comprises a n-type semiconductor substrate, a first p-type impurity region formed on the n-type semiconductor substrate, a semiconductor regions formed on the first p-type impurity region, and a second p-type impurity region disposed below the electric charge transfer region. The photoelectric conversion region and the electric charge transfer region are n-type impurity regions formed on the surface portion of the semiconductor region.

Abstract: A non-volatile memory capable of preventing the antenna effect and the fabrication thereof are described. The non-volatile memory includes a word-line having a high resistance portion and a memory cell portion on a substrate and a charge trapping layer located between the word-line and the substrate. The high resistance portion is electrically connected with a grounding doped region in the substrate and the memory cell portion is electrically connected with a metal interconnect over the substrate.

Abstract: An image sensor optoelectronic product and a method for fabrication thereof comprise a photodiode region overlapping a source/drain region of the same polarity within a reset metal oxide semiconductor field effect transistor device. The image sensor optoelectronic product also comprises a bridging implant region of the same polarity as the photodiode region and the source/drain region. The bridging implant region overlaps the photodiode region, encompasses the source/drain region and extends laterally into the channel region of the reset metal oxide semiconductor field effect transistor device. The bridging implant region provides the image sensor optoelectronic product with attenuated leakage and attenuated white pixel cell susceptibility.

Abstract: A method and apparatus for high density nanostructures is provided. The method and apparatus include Nano-compact optical disks, such as nano-compact disks (Nano-CDS). In one embodiment a 400 Gbit/in2 topographical bit density nano-CD with nearly three orders of magnitude higher than commercial CDS has been fabricated using nanoimprint lithography. The reading and wearing of such Nano-CDS have been studied using scanning proximal probe methods. Using a tapping mode, a Nano-CD was read 1000 times without any detectable degradation of the disk or the silicon probe tip. In accelerated wear tests with a contact mode, the damage threshold was found to be 19 &mgr;N. This indicates that in a tapping mode, both the Nano-CD and silicon probe tip should have a lifetime that is at least four orders of magnitude longer than that at the damage threshold.

Abstract: A transparent substrate is provided thereon with a first thin film transistor and a second thin film transistor to configure a driver circuit; a conductive layer to be connected to a data line or a scan line; a conductive layer to connect the first thin film transistor with the second thin film transistor; and an anode wire layer connected to the second thin film transistor. The anode wire layer is provided thereon with a light emitting diode including a plurality of light emitting layers and electron-hole pair generating layers alternately interposed between the light emitting layers.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of said light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: A method for fabricating an MRAM device structure includes providing a substrate on which is formed a first transistor and a second transistor. An operative memory element device is formed in electrical contact with the first transistor. At least a portion of a false memory element device is formed in electrical contact with the second transistor. A first dielectric layer is deposited overlying the at least a portion of a false memory element device and the operative memory element device. The first dielectric layer is etched to simultaneously form a first via to the at least a portion of a false memory element device and a second via to the operative memory element device. An electrically conductive interconnect layer is deposited so the electrically conductive interconnect layer extends from the at least a portion of a false memory element device to the operative memory element device.

Abstract: A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that at of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving “surplus” charge from the FD region during saturation conditions.

Abstract: A method for making a solid-state imaging device that can form a first P-type well region deep in a substrate without being affected by the heat applied during an epitaxial growth process is disclosed. The method includes a first step of preparing a substrate composite comprising an first substrate and a second substrate on the first substrate, a second step of implanting impurity ions from the surface of the second substrate at an energy exceeding 3 MeV so as to form a barrier layer, and a third step of forming a photosensor in the second substrate.

Abstract: A semiconductor device wherein the data read time in the case of replacing a defective memory cell with an address storage circuit and a data storage circuit is equal to the data read time in the case of reading data from a memory cell array and chip area is small is provided.

Abstract: A solid-state imaging device, comprises an image pickup unit having unit cells including opto-electrical converter elements, said unit cells being disposed in two-dimensional array, a selection line made of polysilicon for selectively determining the unit cells in the same row within the image pickup unit, a read-out line made of polysilicon for reading out electric charge accumulated in the opto-electrical converter elements of the unit cells in the same row within the image pickup unit, a signal line transmitting pixel signals produced from the unit cells in the same row within the image pickup unit, a reset line made of polysilicon for discharging the unit cells in the same row within the image pickup unit down to the desired voltage level, a driver circuit located on one side of the image pickup unit for supplying drive signals to the read-out line, the selection line, and the reset line, respectively, and a read-out auxiliary wiring disposed along at least the read-out line and electrically connected to

Abstract: A method for fabricating a vertical nitride read-only memory (NROM) cell. A substrate having at least one trench is provided. A spacer is formed over the sidewall of the trench. Subsequently, ion implantation is performed on the substrate using the spacer as a mask to form doping areas as bit lines in the substrate near its surface and the bottom of the trench. Bit line oxides are formed over each of the doping areas. After the spacer is removed, a conformable insulating layer as gate dielectric is deposited on the sidewall of the trench and the surface of the bit line oxide. Finally, a conductive layer as a word line is deposited over the insulating layer and fills in the trench.

Abstract: An image sensor is disclosed that has a concave micro-lens structure. The image sensor includes a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a base material having a first index of refraction is formed over the pixels. Micro-lens cavities are formed in the base material over the light sensitive elements, the micro-lens cavity having a concave shape. Finally, color filters are formed into the micro-lens cavities, the color filters having a second index of refraction that is higher than the first index of refraction.

Abstract: An N-type impurity diffusion region is formed in an element forming region surrounded by a field insulating film. In a region between an end portion of the N-type impurity diffusion region and an end portion of the field oxide film, a P-type impurity diffusion region is formed so as to contain an interface level present portion under a bird's beak portion. Thus, a PN junction is formed in a position distant from the interface level present portion. Therefore, even if a voltage is applied to the PN junction, a depletion layer will not reach the interface level present portion. Consequently, a semiconductor device, which suppresses an occurrence of a leakage current along the lower surface of an element isolation insulating film caused by the interface level present portion undesirably included in the depletion layer, as well as a manufacturing method of the same can be obtained.

Abstract: An image sensor with improved productivity and sensitivity is provided. The image sensor includes a plurality of unit pixels, and each unit pixel includes: an oxide film formed upon a semiconductor substrate; a gate electrode formed on the oxide film; a photodiode N-type region formed within the semiconductor substrate and having an interface with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and disposed on one side of the gate electrode; and an N+-type region acting as a floating diffusion region, formed within the semiconductor substrate and having an interface with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and is disposed on the other side of the gate electrode.

Abstract: A monolithic photodetector including a photodiode, a precharge MOS transistor, a control MOS transistor, a read MOS transistor, and a transfer MOS transistor, the photodiode and the transfer transistor being formed in a same substrate of a first conductivity type, the photodiode including a first region of the second conductivity type formed under a second region of the first conductivity type more heavily doped than the first region, and above a third region of the first conductivity type more heavily doped than the substrate, the first region being the source of the second conductivity type of the transfer transistor, the second and third regions being connected to the substrate and being at a fixed voltage.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: A solid-state image sensing device includes a semiconductor substrate, insulating film, electrode/interconnection, light-shielding film, planarizing film, microlens, and film thickness measuring pattern. The substrate has an image sensing region where elements including photodiodes are formed and a monitor region for film thickness measurement. The insulating film is formed on the entire substrate surface. The electrode/interconnection is selectively formed in the image sensing region on the substrate via the insulating film. The light-shielding film having an opening corresponding to a photodiode is formed in the image sensing region on the electrode/interconnection via the insulating film. The planarizing film is formed in the image sensing region on the light-shielding film and insulating film. The microlens is formed on the planarizing film in correspondence with the photodiode and opening.

Abstract: On a transparent electrically insulating substrate, formed are a scanning line, and a gate electrode of a switching element, further formed are a gate insulating film, a semiconductor layer, an n+-Si layer to be formed into a source electrode and a drain electrode. After the patterning of the foregoing structure, the dielectric film is formed, and the portion corresponding to the contact hole is removed by etching, and photosensitive resin is applied to form the interlayer insulating film. Then, the transparent electrode is extended from the pixel electrode over the switching element, whereon a conversion layer and a gold layer for use in electrode are vapor-deposited. In this structure, an increase in capacitor between the pixel electrode and the signal line can be suppressed by the interlayer insulating film, and the transparent electrode functions as a top gate and release excessive electric charge.

Abstract: A solid-state imaging device such as a CMOS image sensor includes photodiode portions that are designed for both improving sensitivity and reducing crosstalk of electrical charge to adjacent pixels. A p-type layer, which has an impurity concentration that is lower than that of a substrate p+-layer, is formed on the substrate p+-layer which is a p-type silicon semiconductor substrate of high impurity concentration. An n-type photoelectric conversion region is provided at a position on the upper side of the p-type layer. By means of this configuration, of the photoelectrons that are generated in the p-type layer, electrons that diffuse in the direction of the substrate are reliably captured in substrate p+-layer and annihilated by recombination.

Abstract: A TDI sensor includes a column of pixels ordered from an initial pixel to a final pixel where each pixel includes reticulated clock conductors arranged to define a reticulation area and a pixel charge handling capacity. The reticulation area of a pixel increases from the final pixel to the initial pixel, and the pixel charge handling capacity increases from the initial pixel to the final pixel. The sensor includes a first bus structure of polysilicon, where the bus structure includes register element sets and each register element set includes a plurality of clock conductors. Each register element set includes a corresponding pixel reticulation area, and the pixel reticulation area of a first register element set is unequal to a pixel reticulation area of another register element set. The sensor also includes a second bus structure of metal disposed substantially diagonally to the first bus structure. The second bus structure includes clock bus sets, and each clock bus set includes bus conductors.

Abstract: A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer a polysilicon line. A trapping layer is further located between the word line and the substrate. A polysilicon protection line is formed over the substrate and the polysilicon protection line connects the word line and a grounded doped region in the substrate, wherein the resistance of the polysilicon protection line is higher than that of the word line.

Abstract: A semiconductor device comprising: a semiconductor substrate having a light receiving or emitting element; a condenser lens provided above the element; a first transparent film provided on the condenser lens for planarization over the condenser lens; a light-transmittable optical element provided above the first transparent film; and a second transparent film interposed between the first transparent film and the optical element; wherein the first transparent film is comprised of a fluorine compound so that the first transparent film is lower in refractive index than the condenser lens and the second transparent film is lower in water- and oil-repellent properties than the first transparent film.

Abstract: A substrate is overlaid with each pixel electrode and a TFT connected thereto, each scanning line and each data line which are connected to the TFT, each pixel potential side capacitance electrode which is connected to the pixel electrode and which constitutes a storage capacitor, each fixed potential side capacitance electrode which is arranged in opposition to the pixel potential side capacitance electrode via a dielectric film and which constitutes the storage capacitor, and a contact hole which electrically connects the fixed potential side capacitance electrode and a lower light shield film disposed under the TFT so as to shield the TFT from the entrance of light. Thus, in an electro-optical device having the TFT, crosstalk, burn-in ascribable to the narrowing of the storage capacitor are prevented or substantially prevented from occurring, and also a light leakage current in the TFT is prevented or substantially prevented from being generated.

Abstract: The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to an embodiment of the invention a resistance variable memory element is provided having at least one silver-selenide layer in between glass layers, wherein at least one of the glass layers is a chalcogenide glass, preferably having a GexSe100−x composition.

Abstract: A honeycomb CCD, whose light receiving portion and a certain light receiving portion 105 adjoining thereto are arranged at a position to be shifted by half a pixel pitch in line and row directions, has charge transfer electrodes 111-114 formed of double-layered polysilicon electrode, a metal wiring 125, having smaller resistivity thereto, which is arranged in the longitudinal direction along each VCCD to intersect and cross over the charge transfer electrodes 111-114 being connected by a contact hole 126, by which electrical resistance of the polysilicon layer of the charge transfer electrodes can be lowered without increasing thickness thereof.

Abstract: To achieve a high density, high resolution, or size reduction, there is provided a solid-state image pickup device having a plurality of photoelectric conversion elements formed in a semiconductor substrate, conductive layers formed on the semiconductor substrate between the neighboring photoelectric conversion elements via an interlayer layer, a first interlayer layer formed on the photoelectric conversion elements and conductive layers, a second interlayer layer formed on the first interlayer layer, and microlenses formed above the photoelectric conversion elements, wherein the refraction index of the first interlayer layer located above the photoelectric conversion elements is different from that of the second interlayer layer.

Abstract: The present invention provides an image sensor capable of suppressing the dark current due to crystalline defects occurring at an edge of a field oxide layer and a method for fabricating the same. The present invention provides an image sensor including: a semiconductor substrate; an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area; a field area for isolating electrically the active area; a field stop layer being formed beneath the field area by having a wider area than the field area through an expansion towards the active area with a first width; and a gate electrode formed on the substrate by covering the channel area and having one side superposed with a second width on one entire side of the photodiode contacted to the channel area.

Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.