Non-electrical Input Responsive (e.g., Light Responsive Imager, Input Programmed By Size Of Storage Sites For Use As A Read-only Memory, Etc.) Patents (Class 257/225)
  • Patent number: 5962844
    Abstract: An active pixel image cell which includes a photosensor and an embedded memory element and may be used to produce signals corresponding to the photosensor outputs for successive frames. The structure of the active pixel cell includes an analog, non-volatile, or dynamic memory element and the control elements needed to store the output of the photosensor generated during a previous frame. The pixel elements then generate a signal representing the current frame output of the photosensor. The current frame output and previous frame output are then provided as output signals for the pixel and may be subjected to off-pixel processing as desired. For example, the two values may be subtracted from one another by an off-pixel difference amplifier to form a signal representing the difference between the image on the photodiode sensor of the pixel between successive frames. The difference signal may then be used for purposes of video compression, motion detection, or image stabilization.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: October 5, 1999
    Assignee: Foveon, Inc.
    Inventors: Richard Billings Merrill, Albert Bergemont, Min-hwa Chi
  • Patent number: 5936866
    Abstract: A photoelectric semiconductor light-detection system with programmable dynamic performance includes a semiconductor photocell, preferably a photodiode, by which the impinging light intensity can be converted into a proportional photoelectric current. The drain of a first MOS FET of corresponding channel-type operated to saturation is coupled to the semiconductor photocell, e.g., the cathode or anode of the photodiode, and its source is maintained at a constant potential. A second MOS FET applies a predetermined variable charge amount to the gate of the first MOS FET. A capacitor is provided at the gate of the first MOS FET. The difference between the offset current and the photoelectric current can be integrated by an integration device. A third MOS FET can be operated as a switch to read the integration device and to reset it at a given value.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: August 10, 1999
    Assignee: Leica AG
    Inventors: Peter Seitz, Oliver Vietze
  • Patent number: 5883397
    Abstract: A plastic functional element comprising a lower electrode and a transparent upper electrode provided perpendicular to the contact surface between a first oxidation reduction material membrane and a second oxidation reduction material membrane, the oxidation reduction potentials of which being different each other, wherein, based on the difference in oxidation reduction potentials between the oxidation reduction material membranes, by irradiating light to the contact surface or applying a voltage between the electrodes, the condition of electron in the oxidation reduction material is controlled, so as to store information of incident light or applied voltage, and an operational function responding to an input voltage is given, thereby the minimization in size is possible to realize a high density and high speed operation.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: March 16, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoru Isoda, Hiroaki Kawakubo, Satoshi Nishikawa, Kouichi Akiyama
  • Patent number: 5880494
    Abstract: An active type photoelectric converting device includes: a transistor formed in a surface region of a semiconductor body, the transistor accumulating signal charges generated by light incident on the transistor at the surface region of the semiconductor body in the transistor, and outputting variation of an electric signal in response to variation of the accumulated signal charges; and a first gate region including a portion of the semiconductor body, a first insulating film formed on the portion of the semiconductor body, and a first gate electrode formed the first insulating film; the gate region, provided adjacent to the transistor, for transferring the accumulated signal charges from the surface region of the semiconductor body into an inside of the semiconductor body in response to a voltage applied to the first gate electrode.
    Type: Grant
    Filed: February 1, 1995
    Date of Patent: March 9, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takashi Watanabe
  • Patent number: 5852321
    Abstract: A thermal type infrared radiation solid state image pick-up device includes a temperature-electrical signal converting function element and a heat isolation structural body supporting the temperature-electrical signal converting function element. The heat isolation structural body is formed of a silicon oxide or a silicon nitride in porous structure. Since the heat isolation structural body has porous structure, heat flowing out from the heat isolation structural body depends on an actual area derived by subtracting the area of the holes from the area of the cross-section of the leg (nominal cross section). On the other hand, the mechanical strength of the heat isolation structural body relies on the area of the cross section of the leg. Therefore, for obtaining the photo sensitivity equivalent to that of the conventional heat isolation structural body, the cross sectional area of the leg can be made greater to improve mechanical strength thereof.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: December 22, 1998
    Assignee: NEC Corporation
    Inventor: Shigeru Tohyama
  • Patent number: 5828118
    Abstract: An electromagnetic energy detector system down converts electromagnetic egy from a relatively high energy beyond the detectable range of an electromagnetic energy detector to a lower energy level within the detectable range of the electromagnetic energy detector. The detector includes a transparent substrate, a porous silicon structure formed on the substrate for down converting electromagnetic energy characterized by a first wavelength W1 to electromagnetic energy characterized by a second wavelength W2, where W2>W1; and an electromagnetic energy detector for detecting the down converted electromagnetic energy. The detector is useful in applications where the electromagnetic energy detector would ordinarily be incapable of detecting the higher level electromagnetic energy directly without going through the down conversion process effectuated by the porous silicon structure.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: October 27, 1998
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Stephen D. Russell
  • Patent number: 5804843
    Abstract: In a solid state image pickup device including a semiconductor substrate, a photo/electro conversion element and a register formed within the semiconductor substrate, and an photoshield layer having a slit-type aperture for limiting light incident to the photo/electro conversion element, an optical element is provided for the slit-type aperture, to thereby pass polarized light having an electric field polarization face polarized in the longitudinal direction of the slit-type aperture.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: September 8, 1998
    Assignee: NEC Corporation
    Inventors: Masayuki Furumiya, Yasuaki Hokari
  • Patent number: 5796154
    Abstract: When light enters a solid-state imaging device obliquely, the light passing an optical path which misses a photodiode part is gathered by a second microlens located in the lower part which directs the light more vertically. A convergent rate of the oblique incident light can be prevented from decreasing. In this way, a solid-state imaging device having high sensitivity ratio, less smear (stray light), and excellent image characteristics can be provided. A metal with a high melting point or a metal silicide film thereof is used as a photo-shielding film. After making the photo-shielding film thinner, a Boro-Phospho-Silicate-Glass (BPSG) film is provided on the entire surface. Then, the second microlens is directly formed on an element provided with a surface protective coating comprising SiO.sub.2, SiON, or SiN, and on top of that, a color filter and an intermediate transparent film are formed, and then a first microlens is formed thereon.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: August 18, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Yoshikazu Sano, Yoko Shigeta, Hiromitsu Aoki
  • Patent number: 5786607
    Abstract: A solid-state image pick-up device having a structure in which the amount of transferred charges is not reduced in a vertical CCD portion even if a pixel portion is made finer, and a method for manufacturing the solid-state image pick-up device are provided. A first p-type well and a second p-type well are formed on an N (100) silicon substrate. A vertical CCD n.sup.+ layer is formed in the second p-type well 3. Then, impurity ions are implanted into a surface layer of the N (100) silicon substrate including an upper layer portion of the vertical CCD n.sup.+ layer to form a p.sup.- layer. An isolating portion for isolating photodiode portions from the vertical CCD n.sup.+ layer and a read control portion for controlling the read of charges from the photodiode n layer are simultaneously formed on a portion adjacent to the vertical CCD n.sup.+ layer.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: July 28, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Katsuya Ishikawa, Takao Kuroda, Yuji Matsuda, Masahiko Niwayama, Keishi Tachikawa
  • Patent number: 5744831
    Abstract: A solid-state image pick-up device 20 having a photoreceiving section 3 disposed on the obverse surface of a substrate 2 and performing photoelectric conversion. A readout gate 5 is disposed at one end of the photoreceiving section 3. A channel stop 8 is disposed at the other end of the photoreceiving section 3. A vertical transfer register 7 is provided for each of the readout gate 5 and the channel stop 8 at the end opposite to the photoreceiving section 3. A transfer electrode 10 is located in a position substantially right above the vertical transfer register 7. A light-shielding film 21 is disposed in such a manner that the transfer electrode 10 can be covered and that the portion right above the photoreceiving section 3 can be at least partially opened. The width W.sub.3 of the readout gate 5 is formed greater than the width W.sub.4 of the channel stop 8. The width W.sub.5 of the projecting portion 21b of the light-shielding film 21 adjacent to the readout gate 5 is formed smaller than the width W.sub.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: April 28, 1998
    Assignee: Sony Corporation
    Inventor: Hiroaki Tanaka
  • Patent number: 5742081
    Abstract: A charge transfer image pickup device is disclosed. One embodiment of the device includes a plurality of photoelectric conversion elements for producing signal charges in response to light applied thereto. A vertical charge transfer part including a first region having a first well layer and for transferring the signal charges produced by the photoelectric conversion elements is provided. A horizontal charge transfer part including a second region having a second well layer and coupled to the vertical charge transfer part to receive transferred signal charges by using a terminal vertical transfer electrode of the vertical charge transfer part is also included. The first and second well layers partially overlap to form an overlap section that does not extend over the terminal vertical transfer electrode in the direction from the second region to the first region.
    Type: Grant
    Filed: February 6, 1995
    Date of Patent: April 21, 1998
    Assignee: NEC Corporation
    Inventor: Masayuki Furumiya
  • Patent number: 5710446
    Abstract: The amount of silicon real estate consumed by a photodiode-based active pixel sensor cell is reduced by utilizing a parasitic transistor to reset the voltage on the photodiode in lieu of the conventional use of a reset transistor. The parasitic transistor is formed by forming a doped region a distance apart from the well region of the photodiode, which defines a parasitic channel region therebetween, and a reset gate over the parasitic channel region.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: January 20, 1998
    Assignee: National Semiconductor Corporation
    Inventors: Min-hwa Chi, Richard Billings Merrill, Albert Bergemont
  • Patent number: 5661317
    Abstract: Solid state image sensor which can improve photic sensitivity of photodiodes by providing only one transmission line between the photodiodes, leading to reduction of width of the transmission line passing between the photodiodes, including a substrate, photodiodes formed on the substrate, a first to a fourth transmission gates arranged in sequence by four for every two photodiodes on a part of the substrate on one side of each of the photodiode, a first, and a second transmission lines arranged one by one alternatively extended at length on the substrate between adjacent photodiodes connected to the first, and the second transmission gates respectively for applying a first, and a second driving clock signals, respectively, a first contact formed at the third transmission gate, a second contact formed at the fourth transmission gate, and a third, and a fourth transmission lines formed over the transmission gates in parallel at length connected through the third, and the fourth transmission gates and the first,
    Type: Grant
    Filed: July 26, 1995
    Date of Patent: August 26, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventor: Jae-Hong Jeong
  • Patent number: 5656824
    Abstract: A thin film transistor (TFT) having a reduced channel length and method of making same are disclosed for liquid crystal display (LCD) applications. The method of making the TFT includes the following process steps: (i) depositing and patterning the gate on a substrate; (ii) depositing and patterning an intrinsic a-Si layer, a n+ a-Si layer, and a source metal layer (e.g. Cr) over the gate; (iii) depositing and patterning an ITO layer to form a pixel electrode portion and a TFT source portion; (iv) etching the source metal layer so that it remains only under the ITO source portion so as to form the TFT source electrode; (v) depositing and patterning a metal (e.g. Mo) to form the drain of the TFT; and (vi) etching the n+ a-Si layer in the TFT channel area so that only the intrinsic semiconductor layer remains between the source and drain. The resulting TFT has a reduced channel length (e.g. less than about 4 .mu.m) less than the feature size of the lithography used so as to maximize I.sub.ON /C.sub.
    Type: Grant
    Filed: September 22, 1995
    Date of Patent: August 12, 1997
    Assignee: OIS Optical Imaging Systems, Inc.
    Inventors: Willem den Boer, Tieer Gu
  • Patent number: 5650643
    Abstract: A light receiving device includes, in addition to a photodiode and a reset element, a comparator formed by a first and a second MOS transistor and a counter. The comparator compares an output potential of the photodiode applied to a gate electrode of the first MOS transistor with a threshold potential externally applied to a gate electrode of the second MOS transistor. The counter counts a time duration from a point of time when the photodiode is reset by the switching element to a point of time at which the output potential of the photodiode exceeds the threshold potential, and outputs the time duration in a numeral value corresponding to the quantity of light incident on the photodiode. The required light sensitivity can be maintained even when the quantity of light is either large or small. Also, non-destructive reading can be carried out.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: July 22, 1997
    Assignee: NEC Corporation
    Inventor: Kazuo Konuma
  • Patent number: 5635738
    Abstract: An infrared solid-state image sensing apparatus is provided with a plurality of photoelectric converting sections arranged vertically and horizontally in a matrix pattern on a semiconductor substrate of a first conducting type; a plurality of vertical CCDs which have first buried channels of a second conducting type and electrodes disposed thereon with an insulating film between and which are disposed adjacently to the photoelectric converting sections; and a horizontal CCD having a second buried channel of the second conducting type and electrodes disposed thereon with an insulating film between and which is disposed adjacently to one side of the vertical CCDs. The first and second buried channels are provided with a low-concentration region having a uniform diffusion depth. Further, the surface of each first buried channel is provided with a high-concentration region of the second conducting type having a higher concentration than that of the surface of the second buried channel.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: June 3, 1997
    Assignee: Nikon Corporation
    Inventors: Masahiro Shoda, Keiichi Akagawa, Tetsuya Tomofuji
  • Patent number: 5592222
    Abstract: A sensor chip includes output signal lines for outputting signals outside the sensor chip from light-receiving elements of the sensor chip, a switch for connecting/disconnecting the output signal lines, and a controller for closing the switch only for a duration including a time interval in which signals are output outside the sensor chip from the light-receiving elements, and opening the switch for a duration except for the signal output duration.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 7, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenichi Nakamura, Yoshio Koide
  • Patent number: 5572051
    Abstract: A solid state image sensing device, comprises: an n-type semiconductor substrate (11), a p-type well (12) formed on a surface of the semiconductor substrate, and a p.sup.+ -type diffusion layer (13, 21) having an impurity concentration higher than that of the well. In particular, the P.sup.+ -type diffusion layer (13) is formed so as to cover at least a part of circumference of an n-type diffusion layer (17) of a load transistor (N3) formed in the well (12) as a source follower circuit. Instead, the P.sup.+ -type diffusion layer (21) is formed between the n-type diffusion layer (17) of the load transistor (N3) and the semiconductor substrate (11).
    Type: Grant
    Filed: December 7, 1994
    Date of Patent: November 5, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Arakawa, Kenji Nakahara
  • Patent number: 5567955
    Abstract: A far infrared (FIR) to near infrared (NIR) light converter is comprised of a quantum well intersubband photodetector (QWIP) integrated vertically with a light emitting diode (LED).
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: October 22, 1996
    Assignee: National Research Council of Canada
    Inventor: Hui C. Liu
  • Patent number: 5563404
    Abstract: In accordance with the invention, a full frame solid-state image sensor with altered accumulation potential comprises a substrate that includes a semiconductor of one conductivity type and has a surface at which is situated a photodetector that comprises a first storage area and a second storage area. The first and second storage areas each comprise a CCD channel of conductivity type opposite to the conductivity type of the semiconductor, and the channel comprises an uppermost region of opposite conductivity type to the remainder of the CCD channel. A first barrier region separates the first storage area from the second storage area, and a second barrier region separates the second storage area from an adjacent photodetector; the second barrier region is shallower than the first barrier region. Adjacent to one side of the photodetector is a channel stop of the same conductivity type as the semiconductor.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: October 8, 1996
    Assignee: Eastman Kodak Company
    Inventor: Constantine N. Anagnostopoulos
  • Patent number: 5517038
    Abstract: Adjacent memory cells has a two-layer structure formed of first layer and second layer. The first layer is provided with driver transistors of the memory cell, access transistors of the memory cell, and driver transistors formed of the memory cell. The second layer is provided with load transistors of the memory cell, load transistors and of the memory cell, and access transistors of the memory cell. The transistors formed in the first layer are of an NMOS type, and the transistors formed in the second layer are of a PMOS type.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: May 14, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigenobu Maeda, Hirotada Kuriyama
  • Patent number: 5514887
    Abstract: In a solid state image sensor comprising a first impurity layer of a first conductivity type forming a photodiode, the impurity layer is composed of a first impurity region formed of a low concentration at a deep level, and a second impurity region formed of a high concentration at a shallow level. The first impurity region extends under a second impurity layer of a second conductivity type formed for device isolation, and also extends under a gate region of a transistor for transferring an electric charge from the photodiode to a CCD channel.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: May 7, 1996
    Assignee: NEC Corporation
    Inventor: Yasuaki Hokari
  • Patent number: 5510623
    Abstract: A solid state image sensor CCD array (10a) has a two block, full-frame, parallel-register structure. The two blocks of the array, each comprised of photosensitive radiation sensors or pixels (20), feed into a single centrally disposed serial read-out register (10b) so as to form one unified photosensitive domain. The read-out register is photosensitive except for two associated narrow clock buses (H1, H2) that are spaced apart so as to only block a minimum of input radiation in any one pixel (22) of the read-out register. Each stage of the read-out register can act as a pixel that is approximately square and that is approximately the same size as the pixels of the two full-frame blocks. In operation, the centrally disposed read-out register can be stationary for a significant first portion of a total frame time (integration period), and then in a latter part of the frame time it can be read out one or more times to provide exposure update information for all of the pixels of the array.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: April 23, 1996
    Assignee: Loral Fairchild Corp.
    Inventors: Michel Sayag, Steven Onishi
  • Patent number: 5504355
    Abstract: A solid state image sensor device having an effective light detecting element and a peripheral circuit includes a light-shielding film for shielding a periphery of the effective light detecting element, a first wiring film made of the same material as that of the light-shielding film and formed in the same process as that for the light-shielding film, and a second wiring film of aluminum for the peripheral circuit. The first wiring film and the second wiring film form a two layer wiring structure of the peripheral circuit and are electrically interconnected through contact holes in an interlayer insulating film. With this arrangement, it is possible to lower the wiring resistance for the peripheral circuit and also to cause a signal transfer clock pulse of high-frequency to propagate without its waveform becoming dull.
    Type: Grant
    Filed: October 7, 1994
    Date of Patent: April 2, 1996
    Assignee: NEC Corporation
    Inventor: Keisuke Hatano
  • Patent number: 5457311
    Abstract: A wide semiconductor transducer device comprises a linear array of semiconductor chips. Each of the semiconductor chips has a plurality of transducer elements arranged on it along a front edge at a constant spacing, the constant spacing being maintained across the semiconductor chip boundaries. Each of the semiconductor chips also includes associated transducer circuits which are each connected one of the plurality of transducer elements formed on the semiconductor chip. While the requirement that the transducer elements maintain the constant spacing requires them to be located within a damage zone created during the dicing and/or thermally induced compression of the semiconductor chip, the associated transducer circuits can be located within an interior portion of the semiconductor chip. The interior portion of the semiconductor chip is located a sufficient distance from the edges of the semiconductor chip such that it does not encroach on the damage zone.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: October 10, 1995
    Assignee: Xerox Corporation
    Inventors: Donald J. Drake, William G. Hawkins, Thomas A. Tellier
  • Patent number: 5436493
    Abstract: A photosensitive apparatus comprises a single crystal structure, wherein different regions of the structure are of different compositions. A first photosensitive region comprises a material adapted to generate electron-hole pairs in an area thereof exposed to light within a predetermined first range of wavelength, and a second photosensitive region, comprises a material adapted to generate electron-hole pairs in an area thereof exposed to light within a predetermined second range of wavelength different from the first range of wavelength.
    Type: Grant
    Filed: August 18, 1994
    Date of Patent: July 25, 1995
    Assignee: Xerox Corporation
    Inventor: David A. Mantell
  • Patent number: 5378916
    Abstract: A photosensitive apparatus comprises a single crystal structure, wherein different regions of the structure are of different compositions. A first photosensitive region comprises a material adapted to generate electron-hole pairs in an area thereof exposed to light within a predetermined first range of wavelength, and a second photosensitive region, comprises a material adapted to generate electron-hole pairs in an area thereof exposed to light within a predetermined second range of wavelength different from the first range of wavelength.This application incorporates by reference a previously-filed application, Ser. No. 07/973,811, entitled "Color Imaging Charge-Coupled Array with Photosensitive Layers in Potential Wells," filed Nov. 5, 1992, and having the same inventor and assignee as the present application.
    Type: Grant
    Filed: February 17, 1993
    Date of Patent: January 3, 1995
    Assignee: Xerox Corporation
    Inventor: David A. Mantell
  • Patent number: 5369040
    Abstract: An improved MOS photodetector having polysilicon gate material which is made more transparent to visible light by the addition of up to 50% carbon, and preferably about 10% carbon. The surfaces of the polysilicon-carbon gates are oxidized to form a silicon dioxide dielectric layer, thus eliminating the need to deposit a separate dielectric layer for isolation of adjacent gates in an overlapping gate array. The elimination of a separate dielectric layer permits all gates to be formed directly on the substrate dielectric layer, thus providing a uniform drive voltage requirement across the array.
    Type: Grant
    Filed: April 12, 1993
    Date of Patent: November 29, 1994
    Assignee: Westinghouse Electric Corporation
    Inventors: James Halvis, Nathan Bluzer, Robert R. Shiskowski, Li-Shu Chen
  • Patent number: 5241198
    Abstract: A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multi-layer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: August 31, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Hiroyuki Okada, Wataru Kamisaka, Masaji Asaumi, Yuji Matsuda
  • Patent number: 5196719
    Abstract: A solid-state image pick-up device is fabricated on a p-type semiconductor substrate, and having a plurality of photo-electric converters respectively having n-type impurity regions and formed in a surface portion of the semiconductor substrate at spacings, a shift register having an n-type charge transfer region separated from the n-type impurity regions by respective channel forming regions, a thin insulating film covering the channel forming regions and outlet subregions of the n-type impurity regions, and a transfer gate electrode extending on the thin insulating film, wherein the transfer gate electrode is shaped in such a manner as to create an electric field over each outlet subregion and the associated channel forming region so that carriers are accelerated from each outlet subregion through the associated channel forming region to the shift register.
    Type: Grant
    Filed: August 18, 1992
    Date of Patent: March 23, 1993
    Assignee: NEC Corporation
    Inventor: Kazuo Miwada
  • Patent number: 5194750
    Abstract: A magnetic field sensor, having a charge-coupled device formed in a semiconductor region is disclosed. The magnetic field sensor has first and second contact zones, made of a heavily doped semiconductor material of a first conductivity type, located on an outer surface of the semiconductor region which is made of a semiconductor material of a second conductivity type. The magnetic field sensor also has an insulating layer, located on the outer surface of the semiconductor region, which has passages for sensor connections associated with each contact zone. The charge-coupled device has a plurality of gate electrodes located on the insulating layer which are arranged perpendicularly to the desired direction of charge propagation through the charge-coupled device. One end of at least one centrally located electrode at least partially overlaps the first contact zone while another end at least partially overlaps the second contact zone.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: March 16, 1993
    Assignee: Landis & Gyr Betriebs AG
    Inventor: Radivoje Popovic
  • Patent number: 5173757
    Abstract: A charge transfer device includes a pair of charge transfer registers which receive signal charges from a photo sensor cell array and which transfer the received signal charges in the same direction along the charge tranfer registers, and a floating diffusion type charge reading section for reading the signal charges alternately from final stages of the pair of charge transfer registers. A signal charge detection circuit includes an output gate assembly provided between the final stage of each of the pair of charge transfer registers and a floating diffusion. A reading circuit operates to cause the signal charges alternately read from the final stages of the pair of charge transfer registers, to flow through a single channel under formed the output gate assembly, into the floating diffusion. An electric field is formed in the channel formed under the output gate assembly, so as to forcibly guide the signal charge from the final stage of each of the pair of charge transfer registers to the floating diffusion.
    Type: Grant
    Filed: May 8, 1991
    Date of Patent: December 22, 1992
    Assignee: NEC Corporation
    Inventor: Kazuo Miwada