Abstract: A solid state imaging device has a plurality of photodetector parts 11 arranged in matrix, a plurality of vertical charge transfer electrodes 13 that read out signal charge from the photodetector parts and transfer the signal charge in the vertical direction, and a first light-shielding film 5 that shields the plural vertical charge transfer parts from incident light. Each of the vertical charge transfer electrodes includes: a transfer channel 12 provided along the vertical array of the plural photodetector parts, a plurality of first transfer electrodes 3a that are formed on the transfer channel so as to traverse the transfer channel and that is coupled in the horizontal direction in spacing between the photodetector parts; and second transfer electrodes 3b provided on the transfer channel and arranged between the first transfer electrodes. The first light-shielding film is formed continuously in the horizontal direction and has openings formed on the photodetector parts.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.

Abstract: A CMOS imager and non-volatile memory are integrated on a single substrate along with logic and support circuitry for decoding and processing optical information received by the CMOS imager. A protective layer covers the non-volatile memory contained on the substrate for blocking light received by the CMOS imager. The protective layer can be a metal layer used as an interconnect over other areas of the substrate or an opaque layer provided during the fabrication process. Integrating a CMOS imager, non-volatile memory and peripheral circuitry for decoding and processing optical information received by the CMOS imager allows for a single chip image sensing device, such as a digital camera.

Abstract: A solid-state image capturing element according to the present invention is provided, in which one or a plurality of light receiving sections for photoelectrically converting an incident light to generate a signal charge is provided on a surface of a semiconductor area or a surface of a semiconductor substrate and a peripheral circuit with a transistor is provided, where a reflection preventing film provided above the light receiving sections and a gate sidewall film of the transistor are formed with a common nitride film that is formed simultaneously.

Abstract: Low leakage contacts on leakage sensitive areas of a CMOS imager, such as a floating diffusion region or a photodiode, are disclosed. At least one low leakage polysilicon contact is provided over a leakage sensitive area of a CMOS imager. The polysilicon contact comprises a polysilicon region in direct contact with the area of interest (the leakage sensitive area) and a metal region located over the polysilicon region. The polysilicon contact provides an improved ohmic contact with less leakage into the substrate. The polysilicon contact may be provided with other conventional metal contacts, which are employed in areas of the CMOS imager that do not require low leakage.

Abstract: In a case when a structure of forming a p+ layer on a substrate rear surface side is employed in order to prevent dark current generation from the silicon boundary surface, various problems occur. According to this invention, an insulation film 39 is provided on a rear surface on a silicon substrate 31 and a transparent electrode 40 is further provided thereon, and by applying a negative voltage with respect to the potential of the silicon substrate 31 from a voltage supply source 41 to the insulation film 39 through the transparent electrode 40, positive holes are accumulated on a silicon boundary surface of the substrate rear surface side and a structure equivalent to a state in which a positive hole accumulation layer exists on aforesaid silicon boundary surface is to be created. Thus, various problems in the related art can be avoided.

Abstract: A CMOS solid-state imaging device configured to restrain the occurrence of white spots and dark current caused by pixel defects, and also to increase the saturation signal amount. Adjacent pixels are separated by an element isolation portion formed of a diffusion layer and an insulating layer thereon, and the insulating layer of the element isolation portion is formed in a position equal to or shallower than the position of a pn junction on the side of an accumulation layer of a photoelectric conversion portion 38 constituting a pixel.

Abstract: A CMOS photodetector pixel formed of a substrate, an epitaxial layer above the substrate including a first region having the same polarity but a lower impurity concentration as that of the substrate, and a gate arrangement including a first gate that forms a charge accumulation region in the epitaxial layer when the gate is energized, wherein the charge accumulation region extends deeper toward the substrate than in conventional constructions. The epitaxial layer includes a shielding structure for absorbing electrons generated therein by photons impinging on the pixel, except electrons generated close to the charge accumulation region. The shielding structure may have opposite polarity from that of the substrate, including a first portion under the first gate, and a second portion extending upward from the first portion at the margin of the pixel. Alternatively, the shielding structure may have the same polarity as the substrate, but a lower impurity concentration.

Abstract: To transfer signal charges generated by a semiconductor photoelectric conversion element in opposite directions, the center line of a first transfer gate electrode and that of a second transfer gate electrodes are arranged on the same straight line, and a U-shaped first exhausting gate electrode and a second exhausting gate electrode are arranged to oppose to each other. The first exhausting gate electrode exhausts background charges generated by a background light in the charge generation region, and the second exhausting gate electrode exhausts background charges generated by the background light in the charge generation region. The background charges exhausted by the first exhausting gate electrode are received by a first exhausting drain region and the background charges exhausted by the second exhausting gate electrode are received by a first exhausting drain region.

Abstract: In a cell contact pad method, a consecutive dummy cell contact pad intersecting with a cell gate electrode is formed at an outer peripheral portion of the memory cell array. The dummy cell contact pad blocks liquid and gas to intrude through a void, and prevents the cell contact pad from being decayed and having high resistivity.

Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.

Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.

Abstract: a photosensor structure; and switching means coupled between the photosensor structure and one of the plurality of signal lines, the switching means responsive to select signals on one or more of the plurality of select lines for conveying a photosensor signal between the photosensor structure and the one of the plurality of signal lines.

Abstract: A photo sensor exhibiting low noise, low smear, low dark current, high dynamic range and global shutter functionality consists either of a pinned (or buried) photodiode or a photo-sensitive charge-coupled device, each with associated transfer gate, a sub-linear element, a shutter transistor, a reset circuit and a read-out circuit. Using two output paths global shutter and high speed operation are possible for the linear and the sub-linear output of the sensor. Because of its compact size, the photo sensor can be employed in one- and two-dimensional image sensors, fabricated with industry-standard CMOS and CCD technologies.

Abstract: A transistor is provided comprising: a substrate; a gate electrode; a semiconducting material not located between the substrate and the gate electrode; a source electrode in contact with the semiconducting material; a drain electrode in contact with the semiconducting material; and a dielectric material in contact with the gate electrode and the semiconducting material; wherein the semiconducting material comprises: 1-99.9% by weight of a polymer having a dielectric constant at 1 kHz of greater than 3.3; 0.1-99% by weight of a functionalized pentacene compound as described herein.

Abstract: Disclosed is a solid-state imaging device includes for each pixel a photoelectric conversion unit, a charge accumulating portion, and a potential barrier provided between the photoelectric conversion unit and the charge accumulating portion, in a thickness direction of a substrate. When light is received, a first charge derived from one of electron-hole pairs generated by photoelectric conversion is accumulated in the photoelectric conversion unit as signal charge, and the potential barrier is modulated by a second charge derived from the other of the electron-hole pairs so that the first charge that has accumulated in the charge accumulating portion is supplied to the photoelectric conversion unit.

Abstract: In a solid imaging device, a photoelectric converting section is configured to generate electric charges through photoelectric conversion, and a first charge transfer section is connected with the photoelectric converting section. A first read gate section is provided between the photoelectric converting section and the first charge transfer section, and is configured to transfer the electric charges from the photoelectric converting section to the first charge transfer section. A second charge transfer section operates independently from the first charge transfer section and configured to receive the electric charges transferred from the first charge transfer section.

Abstract: Forming an impurity region 6 and an impurity region 5 having a lower concentration than the impurity region 6 in a lower layer region of a gate electrode close to the boundary with a signal electron-voltage conversion section of a horizontal CCD outlet makes it possible to smooth a potential distribution at the time of transfer, improve the transfer efficiency, increase the number of saturated electrons and reduce variations in the transfer efficiency and variations in saturation.

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: The invention relates to a semiconductor detector, in particular a pnCCD detector, for radiation detection, including a guard ring (12, 14) and a readout anode (3, 4) arranged inside the guard ring (12, 14) for reading out radiation-generated signal charge carriers (e?), and also including a clearing contact (9) arranged outside the guard ring (12, 14) for removing the collected signal charge carriers (e?) from the readout anode (3, 4). According to the invention, the semiconductor detector furthermore includes a gap (15, 16) in the guard ring (12, 14) and also a controllable gate (17, 18) which is arranged over the gap (15, 16) in the guard ring (12, 14) and makes the gap (15, 16) in the guard ring (12, 14) permeable or impermeable to the signal charge carriers (e?) to be removed, depending on an electrical actuation of the gate (17, 18).

Abstract: An integrated circuit has at least one semiconductor device for storing charge that includes at least one elementary active component and at least one elementary storage capacitor. The device includes a substrate having a lower region containing at least one buried capacitive elementary trench forming the elementary storage capacitor, and an elementary well located above the lower region of the substrate and isolated laterally by a lateral electrical isolation region. The elementary active component is located in the elementary well or in and on the elementary well. The capacitive elementary trench is located under the elementary active component and is in electrical contact with the elementary well. In one preferred embodiment, the lateral electrical isolation region is formed by a trench filled with a dielectric material and has a greater depth than that of the elementary well. Also provided is a method for fabricating an integrated circuit that includes a semiconductor device for storing charge.

Abstract: A pixel cell array architecture having a dual conversion gain. A dual conversion gain element is coupled between a floating diffusion region and a respective storage capacitor. The dual conversion gain element having a control gate switches in the capacitance of the capacitor to change the conversion gain of the floating diffusion region from a first conversion gain to a second conversion gain. In order to increase the efficient use of space, the dual conversion gain element gate also functions as the bottom plate of the capacitor. In one particular embodiment of the invention, a high dynamic range transistor is used in conjunction with a pixel cell having a capacitor-DCG gate combination; in another embodiment, adjacent pixels share pixel components, including the capacitor-DCG combination.

Abstract: The invention provides a method of fabricating a micromachined structure, and in particular to a method of forming a micro-electro-mechanical system (MEMS) structure. A thin silicon cantilevered or suspended structure used to make micromachined structures is first formed from a SOI wafer or a bulk silicon wafer, followed by formation of the micromachined structures by semiconductor manufacturing techniques.

Abstract: An image sensor includes at least first and second photo-sensitive regions; a color filter array having at least two different colors that selectively absorb specific bands of wavelengths, and the two colors respectively span portions of predetermined photo-sensitive regions; and wherein the two photo sensitive regions are doped so that electrons that are released at two different depths in the substrate are collected in two separate regions of the photo sensitive regions so that, when wavelengths of light pass through the color filter array, light is absorbed by the photo sensitive regions which photo sensitive regions consequently releases electrons at two different depths of the photo sensitive regions and are stored in first and second separate regions; at least two charge-coupled devices adjacent the first photo sensitive regions; and a first transfer gate associated with the first photo sensitive region that selectively passes charge at first and second levels which, when at the first level, causes the

Abstract: A cascaded imaging storage system for a pixel is disclosed for improving intrascene dynamic range. Charges accumulated in a first capacitor spill over into a second capacitor when a charge storage capacity of the first capacitor is exceeded. A third capacitor may also be provided such that charges accumulated by said second capacitor spill over into the third capacitor when the charge storage capacity of the second capacitor is exceeded.

Abstract: A pixel cell array architecture having a dual conversion gain. A dual conversion gain element is coupled between a floating diffusion region and a respective storage capacitor. The dual conversion gain element having a control gate switches in the capacitance of the capacitor to change the conversion gain of the floating diffusion region from a first conversion gain to a second conversion gain. In order to increase the efficient use of space, the dual conversion gain element gate also functions as the bottom plate of the capacitor. In one particular embodiment of the invention, a high dynamic range transistor is used in conjunction with a pixel cell having a capacitor-DCG gate combination; in another embodiment, adjacent pixels share pixel components, including the capacitor-DCG combination.

Abstract: A solid-state element has: a semiconductor layer formed on a substrate, the semiconductor layer having a first layer that corresponds to an emission area of the solid-state element to and a second layer through which current is supplied to the first layer; a light discharge surface through which light emitted from the first layer is externally discharged, the light discharge surface being located on the side of the substrate; and an electrode having a plurality of regions that are of a conductive material and are in ohmic-contact with the second layer.

Abstract: An image sensor having a plurality of pixels; each pixel includes one or more photosensitive elements that collect charge in response to incident light; one or more transfer mechanisms that respectively transfer the charge from the one or more photosensitive elements; a charge-to-voltage conversion region having a capacitance, and the charge-to-voltage region receives the charge from the one or more photosensitive elements; a first reset transistor connected to the charge-to-voltage conversion region; a second reset transistor connected to the first reset transistor, which in combination with the first reset transistor, selectively sets the capacitance of the charge-to-voltage conversion regions from a plurality of capacitances.

Abstract: A pixel sensor cell of improved dynamic range comprises a coupling transistor that couples a capacitor device to a photosensing region (e.g., photodiode) of the pixel cell, the photodiode being coupled to a transfer gate and one terminal of the coupling transistor. In operation, the additional capacitance is coupled to the pixel cell photodiode when the voltage on the photodiode is drawn down to the substrate potential. Thus, the added capacitance is only connected to the imager cell when the cell is nearing its charge capacity. Otherwise, the cell has a low capacitance and low leakage. In an additional embodiment, a terminal of the capacitor is coupled to a “pulsed” supply voltage signal that enables substantially full depletion of stored charge from the capacitor to the photosensing region during a read out operation of the pixel sensor cell. In various embodiments, the locations of the added capacitance and photodiode may be interchanged with respect to the coupling transistor.

Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.

Abstract: A solid image pick-up element comprises: a photoelectric converting portion; a charge transmitting portion comprising a charge transmitting electrode that transmits a charge generated by the photoelectric converting portion; and a peripheral circuit portion connected to the charge transmitting portion, wherein a surface level of a field oxide film provided at the peripheral circuit portion and the charge transmitting portion to surround an effective image pick-up region of the photoelectric converting portion is to a degree the same as a surface level of the photoelectric converting portion.

Abstract: An image sensor and manufacturing process thereof are provided. An image sensor according to an embodiment comprises a first wafer formed with a photodiode cell without a microlens and a second wafer formed with a circuit part including transistor and a capacitor. The first wafer is stacked on the second wafer such that a connecting electrode can be used to electrically connect the photodiode cell of the first wafer to the circuit part of the second wafer.

Abstract: An image sensor including a pixel assembly, each pixel including a photodiode and an access transistor connected to a read circuit, the photodiode and the access transistor being formed in and above a first semiconductor substrate, all or part of the read circuit being formed in a second semiconductor substrate, the second substrate being placed above the first substrate and separated therefrom by an intermediary insulating layer covering the access transistor, the photodiode receiving incident photons on its lower surface side opposite to the intermediary insulating layer.

Abstract: It is an object to provide solid-state imaging device, which can easily be manufactured and has a high reliability, and a method of manufacturing the solid-state imaging device. In the present invention, a manufacturing method comprises the steps of forming a plurality of IT-CCDs on a surface of a semiconductor substrate, bonding a translucent member to the surface of the semiconductor substrate in order to have a gap opposite to each light receiving region of the IT-CCD, and isolating a bonded member obtained at the bonding step for each of the IT-CCDs.

Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.

Abstract: The solid image pickup device of the present invention comprises a photoelectric conversion part, a charge-voltage conversion part for converting electric charges from the photoelectric conversion part to voltage signals, a signal amplifier for amplifying the voltage signals generated in the charge-voltage conversion part, charge transfer means for transferring photo-electric charges from the photoelectric conversion part to the charge-voltage conversion part, and means for applying a certain voltage to a charge-voltage conversion part, wherein at least two readout operations for reading out the photo-electric charges accumulated during a period of accumulating photo-electric charges in the photoelectric conversion part via a signal amplifier.

Abstract: A charge coupled device includes a substrate; a plurality of image pixels arranged in a two dimensional array in the substrate for capturing an electronic representation of an image and for transferring charge in a first direction; a transfer mechanism for transferring charge in a second direction from the plurality of the image pixels for further processing; an amplifier structure disposed in the substrate that receives the charge from the transfer mechanism and converts the charge into a voltage signal; a first opaque layer spanning over the amplifier for blocking near-infrared light inherently generated by an electrical field within the amplifier structure when a voltage is applied; and a second opaque layer deposited into the substrate for also blocking near-infrared light inherently generated by an electrical field within the amplifier structure when a voltage is applied.

Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.

Abstract: Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base.

Abstract: A method of manufacturing a photodiode sensor and an associated charge transfer transistor includes forming an insulation region on a substrate, forming the diode on a first side of the insulation region with the diode being self-aligned on the insulation region, and replacing the insulation region by a gate of the charge transfer transistor. The invention has particular utility in the manufacture of CMOS or CCD image sensors.

Abstract: A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.

Abstract: A solid-state image pick-up unit comprises: a semiconductor substrate comprising an area in which a photoelectric converting portion is formed; and an electric charge transfer portion that transfers an electric charge formed by the photoelectric converting portion, wherein the electric charge transfer portion comprises: an electric charge transfer electrode including a first layer electrode and a second layer electrode; and a gate oxide film, the gate oxide film comprises a second gate oxide film formed under the second layer electrode, the second gate oxide film comprising an ONO film which comprises a SiO film, a SiN film and a SiO film in this order, and the second gate oxide film is continuously formed to cover whole of a region between the first layer electrode and the second layer electrode and a region under the second layer electrode.

Abstract: An interconnect layout, an image sensor including the interconnect layout and a method for fabricating the image sensor each use a first electrically active physical interconnect layout pattern within an active pixel region and a second electrically active physical interconnect layout pattern spatially different than the first electrically active physical interconnect layout pattern within a dark pixel region. The second electrically active physical interconnect layout pattern includes at least one electrically active interconnect layer interposed between a light shield layer and a photosensor region aligned therebeneath, thus generally providing a higher wiring density. The higher wiring density within the second layout pattern provides that that the image sensor may be fabricated with enhanced manufacturing efficiency and a reduction of metallization levels.

Abstract: Memory devices include a semiconductor substrate and a plurality of wordlines on the semiconductor substrate. A ground select line is on the semiconductor substrate on a first side of the wordlines and a string select line is on the semiconductor substrate on a second side of the wordlines. The wordlines extend between the ground select line and the string select line. First spacers are disposed between the wordlines, between the ground select line and an adjacent one of the wordlines and between the string select line and an adjacent one of the wordlines. Second spacers are disposed on sidewalls of the ground select line and the string select line displaced from the first spacers. The second spacers are a different material than the first spacers. The memory devices may be nonvolatile memory devices. Methods are also provided for forming the memory devices.

Abstract: A complementary metal-oxide-semiconductor (CMOS) image sensor including a substrate, a p type well, a light emitting diode, a p type gate structure and a plurality of n type gate structures is provided. The substrate has a photo sensitive region and a transistor device region, and the p type well is disposed in the substrate. The light emitting diode is disposed in the p type well and the substrate of the photo sensitive region. The p type gate structure is disposed on the substrate of the transistor device region. The n type gate structures are disposed on the substrate of the transistor device region.

Abstract: Light guides are formed above each light receiving element. These light guides are made of a high refractive index material, and surrounded by a material of lower refractive index. The light guides are each made up of a light introduction region leading with a constant width from a light entrance surface, and a tapered reduced region leading from the light introduction region to a light exit surface. The light introduction region totally reflects the incident light toward the reduced region. The reduced region, owing to its tapered shape, surely directs the light onto a light receiving element, and prevents the light from entering charge transfer paths around the light receiving element.

Abstract: A method of making a backside illuminated sensor is provided. A substrate is provided and a high energy ion implantation is performed over the substrate to implant a first doped region. A layer is formed over the substrate and a self-align high energy ion implantation is performed over the substrate to implant a second doped region over the first doped region. The combined thickness of the first and second doped region is greater than 50 percent of thickness of the substrate and the distance between back surface of the substrate and the first and second doped regions is less than 50 percent of thickness of the substrate. In this way, an enlarged light sensing region is formed through which electrons generated from back surface of the surface may easily reach the pixel.

Abstract: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.