Abstract: A method of forming a low profile semiconductor package, and a semiconductor package formed thereby, is disclosed. The semiconductor die is formed with one or more sloped edges on which electrically conductive traces may be deposited to allow the semiconductor die to be coupled to another die and/or a substrate on which the die is mounted. Depositing the electrical traces directly on the surface and sloped edge of the die allows the die to be electrically coupled without bond wires, thereby allowing a reduction in the overall thickness of the package.

Abstract: Example embodiments provide tape structures including a base layer, a neutralizing layer and an adhesive layer. The base layer may support an object. The neutralizing layer may be arranged on the base layer. The neutralizing layer may be grounded to neutralize charges between the base layer and the object. The adhesive layer may be arranged on the neutralizing layer. The object may be attached to the adhesive layer. Example embodiments also provide methods of manufacturing the tape structures, methods of separating a wafer, and apparatuses for separating a wafer.

Abstract: A method of making a single-crystalline Si wafer with an approximately polygonal cross section and having a material property that is the same as a zone-pulled Si crystal, and the single-crystalline Si wafer. The method includes pulling at least one bottle neck of a crystal vertically downwards from a rotating hanging melt drop. The rotational speed of the crystal is reduced to between 0 and less than 1 rpm. In a crystal-growth phase, a Si single crystal ingot is pulled vertically downwards with an approximately polygonal cross section. An inductor is used to generate a temperature profile at a growth phase boundary of the crystal that corresponds to the shape of a cross section of the pulled Si single crystal ingot. The growth is ended at a desired pulling length and the Si single crystal ingot is cut into wafers having an approximately polygonal cross section.

Abstract: Semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a method of manufacturing a semiconductor device includes forming a plurality of first side trenches to an intermediate depth in a molded portion of a molded wafer having a plurality of dies arranged in rows and columns. The method also includes removing material from a second side of the molded portion at areas aligned with the first side trenches, wherein removing the material forms openings through the molded portion. The method further includes forming a plurality of electrical contacts at the second side of the molded portion at the openings and electrically connecting the second side contacts to corresponding bond-sites on the dies.

Abstract: An apparatus to saw a wafer and having a nozzle to remove burrs in scribe lanes, a method of sawing a wafer, and a semiconductor package fabricated by the same. The apparatus includes a blade to cut scribe lanes of the wafer and a burr removing nozzle disposed spaced apart from the blade. The burr removing nozzle removes metal burrs generated adjacent to the blade during cutting the wafer.

Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.

Abstract: A method of manufacturing a nitride semiconductor device includes the steps of: forming a mask of a pattern selectively covering a cutting line on a first major surface of a substrate; forming group III nitride semiconductor layers exposing the mask provided on the cutting line by selectively growing a group III nitride semiconductor from exposed portions of the first major surface of the substrate; forming a division guide groove on the substrate along the cutting line; and dividing the substrate along the division guide groove. The step of forming the division guide groove may be a step of forming the division guide groove by laser processing.

Abstract: A power semiconductor component having a basic body and at least one contact area. At least one first thin metallic layer of a first material is arranged on the contact area. A second metallic layer—thicker than the first—of a second material is arranged on the first material by a pressure sintering connection of said material. The associated method has the following steps: producing a plurality of power semiconductor components in a wafer; applying at least one first thin metallic layer on at least one contact area of a respective power semiconductor component; arranging a pasty layer, composed of the second material and a solvent, on at least one of the first metallic layers for each power semiconductor component; pressurizing the pasty layer; and singulating the semiconductor components.

Abstract: Methods are provided, and devices made by such methods. One of the methods includes procuring a semiconductor wafer, processing the wafer to form a plurality of circuits on a top side, forming trenches on the top side between the adjacent circuits, forming a trench passivation layer on side walls of the trenches, forming conductive bumps on the top side of the wafer; and removing material from the bottom side to thin the wafer, and eventually separate the wafer along the trenches into dies, where each die includes only one of the circuits.

Abstract: In a wafer dividing method of dividing a wafer into individual devices, the wafer being sectioned by streets to form the devices each made of a laminated body in which an insulating film and a function film are laminated on a front surface of a semiconductor substrate, the method includes a laser processing groove forming step for forming a laser processing groove on the laminated body so as to reach the semiconductor substrate by applying a laser beam formed with an annular spot to the laminated body side of the wafer along the street, the annular spot having an outer diameter larger than a width of a cutting blade and smaller than a width of the street; and a cutting step for allowing a cutting blade to cut the semiconductor substrate of the semiconductor wafer along the laser processing groove formed at the street.

Abstract: A semiconductor apparatus includes a semiconductor device having electrodes on its opposed frontside and backside, respectively, a first external electrode connected to the electrode at the frontside, the first external electrode having a first major surface generally parallel to the frontside of the semiconductor device, and a first side surface generally perpendicular to the first major surface, and a second external electrode having a second major surface generally parallel to the backside of the semiconductor device, a second side surface generally perpendicular to the second major surface, and a projection protruding perpendicular to the second major surface and connected to the electrode at the backside, The first side surface of the first external electrode and the second side surface of the second external electrode serve as mount surfaces. The semiconductor device is located between the first external electrode and the second external electrode.

Abstract: A method of fabricating and separating semiconductor structures comprises the steps of: (a) partially forming a semiconductor structure attached to a support structure, the partially formed semiconductor structure comprising a plurality of partially formed devices, where the partially formed devices are attached to one another by at least one connective layer; (b) forming a partial mask layer over at least a part of the partially formed devices; (c) etching the connective layer to separate the devices; and (d) removing the partial mask layer. Advantages of the invention include higher yield than conventional techniques. In addition, less expensive equipment can be used to separate the devices. The result is a greater production of devices per unit of time and per dollar.

Abstract: Provided is a method comprising: back grinding a back side of a semiconductor wafer W having a protective tape applied on the surface thereof leaving annularly an outer peripheral part un-ground; separating the protective tape from a surface of the semiconductor wafer W having an annular projected part formed in the outer peripheral part of the back side; applying a holding tape over the surface of the semiconductor wafer W from which the protective tape having been separated and a surface of a ring frame f; removing and separating the outer peripheral part in the semiconductor wafer applied and held on the holding tape, by annularly cutting; applying a dicing tape over the back side of the semiconductor wafer having been made flat and the back side of the ring frame; and separating the holding tape from the ring frame and the semiconductor wafer.

Abstract: In general, the invention relates to manufacturing a wafer. The method includes manufacturing a wafer that includes a front side and a back side, thinning the wafer down to a thickness suitable for an intended operation of the wafer, polarizing the substrate wafer from the back side, and cutting the wafer. The wafer is polarized such that an attempt to thin the wafer from the backside results in at least one selected from a group consisting of destruction of the wafer and damage to the wafer.

Abstract: A semiconductor device and a fabrication method thereof are disclosed. The method includes attaching a wafer with a plurality of chips on a carrier board having an insulating layer, a plurality of conductive circuits and a bottom board; forming a plurality of first grooves between solder pads of adjacent chips to expose the conductive circuits, and filling the first grooves with an insulating adhesive layer; forming second grooves in the insulating adhesive layer; and cutting among the chips to separate the chips from one another.

Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

Abstract: Disclosed are radiation-resistant zone plates for use in laser-produced plasma (LPP) devices, and methods of manufacturing such zone plates. In one aspect, a method of manufacturing a zone plate provides for forming a masking layer over a supporting membrane, and creating openings through the masking layer in a diffractive grating pattern. Such a method also provides depositing radiation absorbent material in the openings in the masking layer and on the supporting membrane, and then stripping the remaining portions of the masking layer. Then, portions of the supporting membrane not covered by the absorbent material are removed, wherein the remaining portions of the supporting membrane covered by the absorbent material form separate grates. Also in such methods, cross-members are coupled to the grates for holding positions of the grates with respect to each other.

Abstract: A wafer dividing method that includes a modifying layer forming step in which a laser beam with a wavelength that can pass through the wafer is focused on the inside of the wafer from a rear surface side thereof, and applied along the street to form a modifying layer having a thickness corresponding to at least a device-finishing thickness from the front surface of the wafer; a rear surface grinding step in which an area, corresponding to the device area, of the rear surface of the wafer subjected to the modifying layer forming step is ground and formed to have a thickness corresponding to the device-finishing thickness and to have an annular reinforcing section at an area corresponding to the outer circumferential redundant area; a reinforcing section cutting step in which the wafer is cut along the inner circumference of the annular reinforcing section; a wafer support step in which the rear surface of the wafer whose annular reinforcing section is cut is stuck to a dicing tape attached to an annular frame;

Abstract: A package structure for packaging at least one of a plurality of integrated circuit devices of a wafer is provided. The package structure includes an extension metal pad, a first conductive bump and an insulator layer. The extension metal pad electrically contacts the at least one of the plurality of integrated circuit devices. The first conductive bump is located on the extension metal pad. The insulator layer is located over the at least one of the plurality of integrated circuit devices and on a sidewall of it.

Abstract: It is an object of the present invention to decrease a unit cost of an IC chip and to achieve the mass-production of IC chips. According to the present invention, a substrate having no limitation in size, such as a glass substrate, is used instead of a silicon substrate. This achieves the mass-production and the decrease of the unit cost of the IC chip. Further, a thin IC chip is provided by grinding and polishing the substrate such as the glass substrate.

Abstract: A semiconductor wafer of the present invention is provided with a substrate having a semiconductor element formation layer, a lowermost metal layer formed on the semiconductor element formation layer and an uppermost layer formed on the lowermost metal layer, and the semiconductor wafer also has plural chip regions and an evaluation element region that is that is defined as a region between the plurality of chip regions and that has a cutaway region that is subjected to dicing when separating an individual chip and a remnant region that is not subjected to dicing when separating the chip, and a lowermost layer electrode pad and an uppermost layer electrode pad that are formed at the remnant region and at a pad region are configured by a combination of metals having a line width of less than or equal to a predetermined value.

Abstract: A method for forming a semiconductor structure having a deep sub-micron or nano scale line-width is disclosed. Structure consisting of multiple photoresist layers is first formed on the substrate, then patterned using adequate exposure energy and development condition so that the bottom photoresist layer is not developed while the first under-cut resist groove is formed on top of the bottom photoresist layer. Anisotropic etching is then performed at a proper angle to the normal of the substrate surface, and a second resist groove is formed by the anisotropic etching. Finally, the metal evaporation process and the lift-off process are carried out and the ?-shaped metal gate with nano scale line-width can be formed.

Abstract: A variable astigmatic focal beam spot is formed using lasers with an anamorphic beam delivery system. The variable astigmatic focal beam spot can be used for cutting applications, for example, to scribe semiconductor wafers such as light emitting diode (LED) wafers. The exemplary anamorphic beam delivery system comprises a series of optical components, which deliberately introduce astigmatism to produce focal points separated into two principal meridians, i.e. vertical and horizontal. The astigmatic focal points result in an asymmetric, yet sharply focused, beam spot that consists of sharpened leading and trailing edges. Adjusting the astigmatic focal points changes the aspect ratio of the compressed focal beam spot, allowing adjustment of energy density at the target without affecting laser output power. Scribing wafers with properly optimized energy and power density increases scribing speeds while minimizing excessive heating and collateral material damage.

Abstract: A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip has a top side with contact areas and a rear side with a rear side electrode. In this case, the rear side electrode is cohesively connected to a chip pad of a circuit carrier via an electrically conductive layer. In another embodiment, the thinned semiconductor chips of this semiconductor device according to the invention have low-microdefect edge side regions with semiconductor element structures and edge sides patterned by etching technology.

Abstract: A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.

Abstract: A semiconductor substrate eliminates a restriction caused by a width of scribe lines so as to increase a number of semiconductor elements formed on the semiconductor substrate. A plurality of semiconductor element areas are formed by forming a plurality of unit exposed and printed areas, each of which contains the semiconductor element areas. A first scribe line extends between the semiconductor element areas formed within the unit exposed and printed area. A second scribe line extends between the unit exposed and printed areas. A width of the first scribe line is different from a width of the second scribe line.

Abstract: A method of manufacturing a device, including the steps of forming dividing grooves with a predetermined depth along planned dividing lines of a wafer, then grinding the back-side surface of the wafer to expose the dividing grooves on the back side, dividing the wafer into individual devices, attaching a UV-curable adhesive film to the backside surface of the wafer divided into the individual devices, adhering the adhesive film side of the wafer to a dicing tape attached to an annular frame, radiating UV rays from the face side of the wafer to cure those regions of the adhesive film which correspond to the dividing grooves, radiating a laser beam along the dividing grooves to divide the cured adhesive film on a device basis, and releasing the devices from the dicing tape, thereby picking up the devices.

Abstract: The present invention discloses methods and apparatuses for substrate singulation. Embodiments of the present invention comprise cryogenic-assist scribing or cutting mechanism for debris reduction, preferably cryogenic-assist laser scribe or cutting; controlling mechanism for debris flow and redeposition during laser process; and integrated, dry debris removal scribing process with breaking mechanism. An exemplary embodiment comprises an integrated housing for aligning a laser beam with the cryogenic cleaning beam. The integrated housing is preferably made of low thermal conductivity material to provide a high temperature gradient between the low temperature of the cryogenic fluid and the ambient temperature, preventing condensation of the moisture. The entire areas, or the critical areas of the apparatus can also be purged with flowing “dry” inert gases to further reduce the condensation moisture. Reactive gas can be introduced to react with debris, converting into gaseous form for ease of removal.

Abstract: A method of forming substrates, e.g., silicon on insulator, silicon on silicon. The method includes providing a donor substrate, e.g., silicon wafer. The method also includes forming a cleave layer on the donor substrate that contains the cleave plane, the plane of eventual separation. In a specific embodiment, the cleave layer comprising silicon germanium. The method also includes forming a device layer (e.g., epitaxial silicon) on the cleave layer. The method also includes introducing particles into the cleave layer to add stress in the cleave layer. The particles within the cleave layer are then redistributed to form a high concentration region of the particles in the vicinity of the cleave plane, where the redistribution of the particles is carried out in a manner substantially free from microbubble or microcavity formation of the particles in the cleave plane. That is, the particles are generally at a low dose, which is defined herein as a lack of microbubble or microcavity formation in the cleave plane.

Abstract: A method for forming a median crack and an apparatus for forming a median crack are provided, where the formation of a deep, straight median crack is possible, and an excellent broken surface of a brittle substrate can be gained as a result of breaking.

Abstract: Techniques for dicing wafer assemblies containing multiple metal device dies, such as vertical light-emitting diode (VLED), power device, laser diode, and vertical cavity surface emitting laser device dies, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, such techniques are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

Abstract: A semiconductor device includes a substrate having a resin layer on at least a surface thereof; a thin-film circuit layer provided on the substrate, and a reinforcing section provided on the surface of the substrate so as to surround the thin-film circuit layer.

Abstract: A manufacturing method for semiconductor devices includes a process of forming a conductive layer 4 on the other principle surface of a semiconductor wafer 10 having circuit elements 2 formed in one principle surface of the semiconductor wafer, a process of forming a protecting layer 5 on at least a part of the conductive layer, the protecting layer 5 being made from material having hard-to-shave characteristics in comparison with the conductive layer and a process of cutting the semiconductor wafer 10 into pieces with respect to each of the semiconductor devices 1. By the manufacturing method, each semiconductor device 1 is provided with a semiconductor substrate 3 having the circuit elements 2 formed in one principle surface of the semiconductor substrate 3, the conductive layer 4 formed on the other principle surface of the semiconductor substrate 3 and the protecting layer 5 formed on the conductive layer 4 in lamination to have hard-to-shave characteristics in comparison with the conductive layer 4.

Abstract: A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned photoresist layer. A second inactive layer and a second patterned photoresist layer are sequentially formed thereon. The second patterned photoresist layer has second through holes exposing the first through holes. Pins are formed inside the first and the second through holes. A second metal layer is formed on the second patterned photoresist layer. One end of each pin is connected to the second metal layer. The pins and the second metal layer are taken out. A circuit carrier having third through holes is provided. The pins are inserted into the third through holes. The second metal layer is patterned to form pinheads.

Abstract: A method for fabricating a semiconductor device includes dividing an off substrate so that a first edge face, the off substrate having an operation layer on a main surface of the off substrate, and cutting the off substrate to form a second edge face crossing the first edge face so that an entire surface of the second edge face is closer to a direction vertical to the main surface of the off substrate than a surface cleaved along with the second edge face.

Abstract: A semiconductor substrate whose surface roughness is reduced by optimizing an inclination (off angle) with respect to a {110} surface of the semiconductor substrate surface and a manufacturing method thereof are provided. The surface of the semiconductor substrate has the inclination (off angle) of 0 degree or more and 0.12 degrees or less, or 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface. The manufacturing method of a semiconductor substrate has a process in which a semiconductor single crystal ingot is sliced at an inclination (off angle) of 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface.

Abstract: Provided is a method of dicing a wafer where a plurality of semiconductor device regions is formed on a front side of the wafer, the semiconductor device regions being separated by scribe lanes, the method comprising dicing the wafer by irradiating a laser beam on a backside of the wafer along the scribe lanes. A laser beam is irradiated from an opposite side of the semiconductor device regions of the wafer so that thermal influence on the semiconductor device regions is minimized to improve the strength of a semiconductor chip. Furthermore, a third tape is used to maintain an arrangement of the semiconductor chips so as to minimize adherence problems caused by the laser beam.

Abstract: According to example embodiments, an apparatus for picking up a semiconductor die includes an electromagnetic collet unit configured to selectively generate an attractive force between the electromagnetic collet unit and a magnetic wafer adhesive tape disposed on a surface of the semiconductor die. The apparatus further includes a transfer head unit attached to the electromagnetic collet unit, the transfer head unit structured to move the semiconductor die picked up by the collet unit through a drive of a drive device.

Abstract: Semiconductor wafer sawing systems and methods are described in which a wafer may be secured in a sawing position having a surface exposed to incur sawing with at least a portion of the exposed wafer surface positioned below the center of gravity of the wafer such that prevailing force of gravity may be used to assist in the removal of contaminants from the wafer.

Abstract: A wafer system is provided including providing a wafer having a topside and a backside, forming a partial cut from the topside of the wafer within a wafer rim and thinning the wafer from the backside for exposing the partial cut at the backside within the wafer rim.

Abstract: An MOS device comprising a gate dielectric formed on a first conductivity type region. A gate electrode formed on the gate dielectric. A pair of sidewall spacers are formed along laterally opposite sidewalls of the gate electrode. A pair of deposited silicon or silicon alloy source/drain regions are formed in the first conductivity region and on opposite sides of a gate electrode wherein the silicon or silicon alloy source/drain regions extend beneath the gate electrode and to define a channel region beneath the gate electrode in the first conductivity type region wherein the channel region directly beneath the gate electrode is larger than the channel region deeper into said first conductivity type region.

Abstract: The invention relates to a method for separation of a silicon wafer (12a) from a vertical stack (10) of silicon wafers (12). The method is characterised in that it comprises attaching a movable transport device (2) to a surface of the silicon wafer (12a) in the stack (10), and horizontal movement of the silicon wafer (12a) parallel (A) to the surface of the silicon wafer (12a) until the silicon wafer (12a) is separated from the stack (10). The invention also comprises a device for implementing the method.

Abstract: A fabricating method for a flat panel display device having a thin film pattern over a substrate is disclosed. The fabricating method includes depositing a hydrophilic resin over a substrate and patterning the hydrophilic resin to form hydrophilic resin patterns over areas outside where thin film patterns are to be formed over the substrate. The fabricating method also includes depositing a hydrophobic nano powder thin film material over the substrate and between the hydrophilic resin patterns and removing the hydrophilic resin patterns to form hydrophobic nano powder thin film patterns over the substrate. Moreover, the fabricating method includes treating the hydrophobic nano powder thin film patterns to form the thin film pattern.

Abstract: Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 ?m or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.

Abstract: Provided are a semiconductor chip and a method of producing the semiconductor chip. The chip and the method of producing the chip may remove or reduce chip performance issues involving current leakage and/or short-circuit malfunctions caused by inadvertent or intentional contacting of bonding wires with a surface and/or edge of the semiconductor chip. Also, the thickness of a semiconductor package in which semiconductor chips are stacked may be reduced.

Abstract: The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A semiconductor substrate is etched to form a via hole from a back surface of the semiconductor substrate to a pad electrode. This etching is performed under an etching condition such that an opening diameter of the via hole at its bottom is larger than a width of the pad electrode. Next, a second insulation film is formed on the back surface of the semiconductor substrate including in the via hole 16, exposing the pad electrode at the bottom of the via hole. Next, a penetrating electrode and a wiring layer are formed, being electrically connected with the pad electrode exposed at the bottom of the via hole 16. Furthermore, a protection layer and a conductive terminal are formed. Finally, the semiconductor substrate is cut and separated in semiconductor dies by dicing.

Abstract: In a semiconductor wafer that has semiconductor devices arranged in a plurality of device-formation-regions and a TEG placed in dividing regions that define the device-formation-regions, a TEG-placement portion is arranged in the dividing regions partially expanded in width, and the TEG is placed in the TEG-placement portion. And, a protective sheet is stuck to the semiconductor wafer, then plasma etching is performed, and the TEG in a state where it remains in the dividing region and stuck to the protective sheet is removed together with the protective sheet by peeling off the protective sheet, thereby the device-formation-regions are divided into individual pieces, and the semiconductor chips are manufactured.

Abstract: An undefill material is provided on the surface of a wafer in such a manner as to cover bumps, then the wafer is irradiated with a laser beam from the surface thereof and along planned cutting lines so as to remove an insulation layer and the underfill material present over the planned cutting lines, and the debris generated in this instance are deposited on the underfill material and are thereby prevented from being deposited on the wafer surface and/or on the bumps. Subsequently, a surface layer of the underfill material is cut so as to make the bumps flush in height and to expose the tips of the bumps.

Abstract: A method for manufacturing an electronic part, including: cutting a wiring substrate, which contains a base substrate, a wiring pattern provided on a first surface of the base substrate, and a reinforcing member provided on a second surface of the base substrate, along a line intersecting with an outer circumference of the reinforcing member; wherein a wire, out of a plurality of wires composing the wiring pattern, arranged closest to an intersecting point of the outer circumference of the reinforcing member and the line has a widest width.

Abstract: A method and system for utilizing a semiconductor wafer is disclosed. The wafer comprises a plurality of semiconductor die and a plurality of scribe areas interspersed between. The method and system comprises forming bond out pads in the scribe areas such that the bond out pads are disposed on the semiconductor wafer between the plurality of semiconductor die. Additionally, the method and system comprises separating the semiconductor wafer into individual die such that when the semiconductor wafer is separated in a first manner at least one product die is provided. Furthermore, when the semiconductor wafer is separated in a second manner at least one test die is provided.