Of Silicon (epo) Patents (Class 257/E21.285)
  • Patent number: 10403507
    Abstract: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon from the semiconductor substrate. The methods may include isotropically etching a silicon-containing material from the semiconductor substrate.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: September 3, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Tom Choi, Jungmin Ko, Nitin Ingle
  • Patent number: 10283402
    Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, a textured oxide, nitride, or oxynitride layer, a polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer. The multilayer structure is prepared in a manner that reduces wafer bow.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: May 7, 2019
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Gang Wang, Jeffrey L. Libbert, Shawn George Thomas, Igor Peidous
  • Patent number: 10269571
    Abstract: The present disclosure provide methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures on a substrate includes supplying an oxygen containing gas mixture to a multi-material layer on a substrate in a processing chamber, wherein the multi-material layer includes repeating pairs of a first layer and a second layer, the first and the second layers having a first group and a second group of sidewalls respectively exposed through openings defined in the multi-material layer, maintaining a process pressure at greater than 5 bar, and selectively forming an oxidation layer on the second group of sidewalls in the second layer.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: April 23, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Keith Tatseun Wong, Shiyu Sun, Sean S. Kang, Nam Sung Kim, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 10186832
    Abstract: A method for fabricating a surface emitting laser includes the steps of: preparing a processing apparatus with a first part and a second part, the processing apparatus including a first heater and a second heater that heat the first part and the second part, respectively; preparing a wafer product for forming a surface emitting laser, the wafer product including a semiconductor post including a III-V compound semiconductor layer containing aluminum as a constituent element, the III-V compound semiconductor layer being exposed at a side face of the semiconductor post; after disposing the wafer product in the second part, energizing the first heater and the second heater; supplying a first gas containing no oxidizing agent to the processing apparatus; and after stopping supplying the first gas, oxidizing the III-V compound semiconductor layer by supplying a second gas containing an oxidizing agent to the processing apparatus.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: January 22, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yukihiro Tsuji
  • Patent number: 9893160
    Abstract: A method of fabricating a semiconductor device includes contacting water with a silicon oxide layer. The method further includes diffusing an ozone-containing gas through water to treat the silicon oxide layer. The method further includes forming a dielectric layer over the treated silicon oxide layer.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: February 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Liang-Gi Yao, Chia-Cheng Chen, Clement Hsingjen Wann
  • Patent number: 9786563
    Abstract: A semiconductor device is provided that includes a first plurality of fin structures having a first width in a first region of a substrate, and a second plurality of fin structures having a second width in a second region of the substrate, the second width being less than the first width. A first gate structure is formed on the first plurality of fin structures including a first high-k gate dielectric that is in direct contact with a channel region of the first plurality of fin structures and a first gate conductor. A second gate structure is formed on the second plurality of fin structures including a high voltage gate dielectric that is in direct contact with a channel region of the second plurality of fin structures, a second high-k gate dielectric and a second gate conductor.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: October 10, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert, Junli Wang
  • Patent number: 9570589
    Abstract: FinFET semiconductor devices and fabrication methods are provided. Discrete fins are formed on a substrate. An insulation layer is formed on the substrate between the discrete fins, the insulation layer having a top surface lower than a top surface of the fin and covering a portion of a sidewall surface of the fin. A sidewall spacer is formed covering the sidewall surface of the fin and exposing the top surface of the fin. A top portion of the fin is selectively nitrided to convert a thickness portion of the fin into a semiconductor nitride layer on a remainder fin. The semiconductor nitride layer is removed to form an opening on the remainder fin and between adjacent sidewall spacers. A stress layer is formed to fill the opening.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: February 14, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Yonggen He, Bing Wu
  • Patent number: 9530674
    Abstract: Embodiments include methods and systems of 3D structure fill. In one embodiment, a method of filling a trench in a wafer includes performing directional plasma treatment with an ion beam at an angle with respect to a sidewall of the trench to form a treated portion of the sidewall and an untreated bottom of the trench. A material is deposited in the trench. The deposition rate of the material on the treated portion of the sidewall is different than a second deposition rate on the untreated bottom of the trench. In one embodiment, a method includes depositing a material on the wafer, filling a bottom of the trench and forming a layer on a sidewall of the trench and a top surface adjacent to the trench. The method includes etching the layer with an ion beam at an angle with respect to the sidewall.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: December 27, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Ellie Yieh, Ludovic Godet, Srinivas Nemani, Er-Xuan Ping, Gary Dickerson
  • Patent number: 9269566
    Abstract: A substrate processing apparatus capable of forming an oxide film on a substrate by forming a layer on the substrate by supplying a source gas into a process vessel accommodating the substrate via the first nozzle, and simultaneously supplying an oxygen-containing gas through a second nozzle and a hydrogen-containing gas through a first nozzle into the process vessel having an inside pressure thereof lower than atmospheric pressure; mixing and reacting the oxygen-containing gas with the hydrogen-containing gas in a non-plasma atmosphere within the process vessel to generate atomic oxygen; and oxidizing the layer with the atomic oxygen to change the layer into an oxide layer is disclosed.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: February 23, 2016
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota
  • Patent number: 9263282
    Abstract: A method of fabricating semiconductor patterns includes steps as follows: Firstly, a substrate is provided and has at least a first semiconductor pattern and at least a second semiconductor pattern, wherein a line width of the first semiconductor pattern is identical to a line width of the second semiconductor pattern. Then, a barrier pattern is formed over a surface of the first semiconductor pattern, and the second semiconductor pattern is exposed. Then, a surface portion of the second semiconductor pattern is reacted to form a sacrificial structure layer. Then, the barrier pattern and the sacrificial structure layer are removed, and the line width of the second semiconductor pattern is shrunken to be less than the line width of the first semiconductor pattern. A third semiconductor pattern having a line width can be further provided.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: February 16, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chin-Fu Lin, Chih-Chien Liu, Chia-Lin Hsu, Chin-Cheng Chien, Chun-Yuan Wu
  • Patent number: 8906772
    Abstract: A system and method for forming graphene layers on a substrate. The system and methods include direct growth of graphene on diamond and low temperature growth of graphene using a solid carbon source.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: December 9, 2014
    Assignee: UChicago Argonne, LLC
    Inventor: Anirudha V. Sumant
  • Patent number: 8889565
    Abstract: Oxygen is selectively removed from metal-containing materials in a partially-fabricated integrated circuit. In some embodiments, the partially-fabricated integrated circuit has exposed silicon and metal-containing materials, e.g., as part of a transistor. The silicon and metal-containing material are oxidized. Oxygen is subsequently removed from the metal-containing material by an anneal in an atmosphere containing a reducing agent. Advantageously, the silicon oxide formed by the silicon oxidation is maintained while oxygen is removed from the metal-containing material, thereby leaving a high quality metal-containing material along with silicon oxide.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: November 18, 2014
    Assignee: ASM International N.V.
    Inventors: Jerome Noiray, Ernst H. A. Granneman
  • Patent number: 8809204
    Abstract: A method of manufacturing a semiconductor device, the method comprising: forming an oxide film on a substrate by alternately repeating: (a) forming an element-containing layer on the substrate by supplying a source gas containing an element into a process vessel accommodating the substrate; and (b) changing the element-containing layer to an oxide layer by supplying an oxygen-containing gas and a hydrogen-containing gas into the process vessel having an inside pressure lower than atmospheric pressure, reacting the oxygen-containing gas with the hydrogen-containing gas to generate an atomic oxygen, and oxidizing the element-containing layer by the atomic oxygen.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: August 19, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota
  • Patent number: 8759225
    Abstract: The present disclosure relates to a method and composition to limit crystalline defects introduced in a semiconductor device during ion implantation. A high-temperature low dosage implant is performed utilizing a tri-layer photoresist which maintains the crystalline structure of the semiconductor device while limiting defect formation within the semiconductor device. The tri-layer photoresist comprises a layer of spin-on carbon deposited onto a substrate, a layer of silicon containing hard-mask formed above the layer of spin-on carbon, and a layer of photoresist formed above the layer of silicon containing hard-mask. A pattern formed in the layer of photoresist is sequentially transferred to the silicon containing hard-mask, then to the spin-on carbon, and defines an area of the substrate to be selectively implanted with ions.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: June 24, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung Chien Wang, Yeur-Luen Tu, Cheng-Ta Wu, Jiech-Fun Lu, Chun-Wei Chang, Wang-Pen Mo, Jhy-Jyi Sze, Chia-Shiung Tsai
  • Patent number: 8735303
    Abstract: One illustrative method disclosed herein includes forming a first recess in a first active region of a substrate, forming a first layer of channel semiconductor material for a first PFET transistor in the first recess, performing a first thermal oxidation process to form a first protective layer on the first layer of channel semiconductor material, forming a second recess in the second active region of the semiconducting substrate, forming a second layer of channel semiconductor material for the second PFET transistor in the second recess and performing a second thermal oxidation process to form a second protective layer on the second layer of channel semiconductor material.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: May 27, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Hans-Juergen Thees, Stephan Kronholz, Peter Javorka
  • Patent number: 8722497
    Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: May 13, 2014
    Assignees: Nissan Motor Co., Ltd., Rohm Co., Ltd.
    Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
  • Publication number: 20130309826
    Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.
    Type: Application
    Filed: July 1, 2012
    Publication date: November 21, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Krishnaswamy RAMKUMAR, Sagy LEVY, Jeong BYUN
  • Publication number: 20130277723
    Abstract: Some embodiments include methods of forming silicon dioxide in which silicon dioxide is formed across silicon utilizing a first treatment temperature of no greater than about 1000° C., and in which an interface between the silicon dioxide and the silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. Some embodiments include methods of forming transistors in which a trench is formed to extend into monocrystalline silicon. Silicon dioxide is formed along multiple crystallographic planes along an interior of the trench utilizing a first treatment temperature of no greater than about 1000° C., and an interface between the silicon dioxide and the monocrystalline silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. A transistor gate is formed within the trench, and a pair of source/drain regions is formed within the monocrystalline silicon adjacent the transistor gate. Some embodiments include DRAM cells.
    Type: Application
    Filed: April 19, 2012
    Publication date: October 24, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Shivani Srivastava, Kunal Shrotri, Fawad Ahmed
  • Patent number: 8497218
    Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: July 30, 2013
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
  • Publication number: 20130109197
    Abstract: A method of forming a silicon oxide film includes forming a seed layer on a base, forming a silicon film on the seed layer, and forming the silicon oxide film on the base by oxidizing the silicon film and the seed layer.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: TOKYO ELECTRON LIMITED
  • Patent number: 8367557
    Abstract: A method of manufacturing a semiconductor device, the method comprising: forming an oxide film on a substrate by alternately repeating: (a) forming an element-containing layer on the substrate by supplying a source gas containing an element into a process vessel accommodating the substrate; and (b) changing the element-containing layer to an oxide layer by supplying an oxygen-containing gas and a hydrogen-containing gas into the process vessel having an inside pressure lower than atmospheric pressure, reacting the oxygen-containing gas with the hydrogen-containing gas to generate oxidizing species containing oxygen, and oxidizing the element-containing layer by the oxidizing species; wherein the hydrogen-containing gas is supplied into the process vessel together with the source gas in step (a).
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: February 5, 2013
    Assignee: Hitachi Kokosai Electric, Inc.
    Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota
  • Patent number: 8357619
    Abstract: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times a cycle alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing or nitriding the adsorption layer on the surface of the target substrate. The second step includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: January 22, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Shigeru Nakajima, Jun Ogawa
  • Publication number: 20130017689
    Abstract: Novel silicon dioxide and silicon nitride deposition methods are generally disclosed. In one embodiment, the method includes depositing silicon on the surface of a substrate having a temperature of between about 65° C. and about 350° C. The heated substrate is exposed to a silicon source that is substantially free from an oxidizing agent. The silicon on the surface is then oxidized with an oxygen source that is substantially free from a silicon source. As a result of oxidizing the silicon, a silicon oxide layer forms on the surface of the substrate. Alternatively, or in additionally, a nitrogen source can be provided to produce silicon nitride on the surface of the substrate.
    Type: Application
    Filed: May 7, 2007
    Publication date: January 17, 2013
    Inventors: Asif Khan, Vinod Adivarahan
  • Publication number: 20120329285
    Abstract: A gate dielectric layer forming method is applied to a fabrication process of a metal-oxide-semiconductor field-effect transistor. The gate dielectric layer forming method includes the following steps. Firstly, a substrate is provided. Then, an interlayer is formed on the substrate. Then, a high-k dielectric layer is formed on the interlayer. A nitridation process is performed to convert the high-k dielectric layer into a nitridated high-k dielectric layer. A first low temperature post-nitridation annealing process is performed to treat the nitridated high-k dielectric layer with a first gas. Afterwards, a second low temperature post-nitridation annealing process is performed to treat the nitridated high-k dielectric layer with a second gas.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shao-Wei WANG, Chien-Liang Lin, Ying-Wei Yen, Yu-Ren Wang
  • Patent number: 8278165
    Abstract: Methods for fabricating semiconductor devices are provided. The methods include providing a semiconductor substrate having pFET and nFET regions, each having active areas and shallow trench isolation. A hardmask layer is formed overlying the semiconductor substrate. A photoresist layer is provided over the hardmask layer. The phoresist layer is patterned. An exposed portion of the hardmask layer is removed from one of the pFET region and nFET region with the patterned photoresist acting as an etch mask to define a masked region and an unmasked region. An epitaxial silicon layer is formed on the active area in the unmasked region. A protective oxide layer is formed overlying the epitaxial silicon layer. The hardmask layer is removed from the masked region with the protective oxide layer protecting the epitaxial silicon layer during such removal step. The protective oxide layer is removed from the epitaxial silicon layer.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: October 2, 2012
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Rohit Pal, Janice Monzet
  • Patent number: 8263501
    Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: September 11, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Yu-Ren Wang, Ying-Wei Yen
  • Publication number: 20120223338
    Abstract: A method of manufacturing a semiconductor device includes the steps of forming a silicon oxide film on a silicon carbide substrate, annealing the silicon carbide substrate and the silicon oxide film in gas containing hydrogen, and forming an aluminum oxynitride film on the silicon oxide film after the annealing of the silicon carbide substrate and the silicon oxide film.
    Type: Application
    Filed: September 2, 2010
    Publication date: September 6, 2012
    Applicant: Rohm Co. Ltd.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Publication number: 20120214309
    Abstract: A method of fabricating a SiC semiconductor device includes the steps of preparing a silicon carbide semiconductor including a first surface having impurities implanted at least partially, forming a second surface by dry etching the first surface of the silicon carbide semiconductor using gas including hydrogen gas, and forming an oxide film constituting the silicon carbide semiconductor device on the second surface.
    Type: Application
    Filed: February 23, 2011
    Publication date: August 23, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Satomi Itoh, Hiromu Shiomi, Yasuo Namikawa, Keiji Wada, Mitsuru Shimazu, Toru Hiyoshi
  • Patent number: 8222648
    Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: July 17, 2012
    Assignees: Nissan Motor Co., Ltd., Rohm Co., Ltd.
    Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
  • Publication number: 20120164847
    Abstract: A control unit heats a reaction pipe to a load temperature by controlling a temperature-raising heater 16, and then makes semiconductor wafers received in the reaction pipe. Next, the control unit heats the reaction pipe in which the semiconductor wafers are received to a film formation temperature by controlling the temperature-raising heater, and then forms thin films on the semiconductor wafers by supplying a film forming gas into the reaction pipe from a process gas introducing pipe. Also, the control unit sets the load temperature to a temperature higher than the film formation temperature.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 28, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshiyuki IKEUCHI, Pao-Hwa CHOU, Kazuya YAMAMOTO, Kentarou SERA
  • Publication number: 20120156891
    Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 21, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Liang LIN, Yu-Ren Wang, Ying-Wei Yen
  • Patent number: 8158534
    Abstract: Methods for reducing defects on the surface of a silicon oxynitride film are disclosed, in one embodiment, the methods include, forming a silicon oxynitride film on a semiconductor substrate and heating the silicon oxynitride film to increase a hydrophilicity of a surface of the silicon oxynitride film prior to treating the surface of the silicon oxynitride film with a hydrofluoric acid.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: April 17, 2012
    Assignee: Spansion LLC
    Inventor: Noriyuki Yokonaga
  • Patent number: 8153538
    Abstract: A process is disclosed for annealing a single crystal silicon wafer having a front surface and a back surface, and an oxide layer disposed on the front surface of the wafer extending over substantially all of the radial width. The process includes annealing the wafer in an annealing chamber having an atmosphere comprising oxygen. The process also includes maintaining a partial pressure of water above a predetermined value such that the wafer maintains the oxide layer through the annealing process. The annealed front surface is substantially free of boron and phosphorus.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: April 10, 2012
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Larry Wayne Shive, Brian Lawrence Gilmore
  • Patent number: 8143676
    Abstract: A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: March 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Inumiya, Takuya Kobayashi, Tomonori Aoyama
  • Publication number: 20120064731
    Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).
    Type: Application
    Filed: November 17, 2011
    Publication date: March 15, 2012
    Applicants: Rohm Co., Ltd., Nissan Motor Co., Ltd.
    Inventors: Satoshi TANIMOTO, Noriaki KAWAMOTO, Takayuki KITOU, Mineo MIURA
  • Patent number: 8084369
    Abstract: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber to process the plurality of substrates by oxidation, and transferring the plurality of the oxidation-processed substrates out from the processing chamber, wherein in the oxidation-processing, the hydrogen-containing gas is supplied from a plurality of locations of a region which is in proximity to the inner wall of the processing chamber and which corresponds to a substrate arrangement region in which the plurality of substrates are arranged in the processing chamber.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: December 27, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Takashi Ozaki, Kazuhiro Yuasa, Kiyohiko Maeda
  • Publication number: 20110250764
    Abstract: A method and apparatus for oxidizing materials used in semiconductor integrated circuits, for example, for oxidizing silicon to form a dielectric gate. An ozonator is capable of producing a stream of least 70% ozone. The ozone passes into an RTP chamber through a water-cooled injector projecting into the chamber. Other gases such as hydrogen to increase oxidation rate, diluent gas such as nitrogen or O2, enter the chamber through another inlet. The chamber is maintained at a low pressure below 20 Torr and the substrate is advantageously maintained at a temperature less than 800° C. Alternatively, the oxidation may be performed in an LPCVD chamber including a pedestal heater and a showerhead gas injector in opposition to the pedestal.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Yoshitaka Yokota, Sundar Ramamurthy, Vedapuram Achutharaman, Cory Czarnik, Mehran Behdjat, Christopher Olsen
  • Patent number: 8008214
    Abstract: In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: August 30, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Geun Jee, Young-Jin Noh, Bon-Young Koo, Chul-Sung Kim, Hun-Hyeoung Leam, Woong Lee
  • Patent number: 7951728
    Abstract: A method for selective oxidation of silicon containing materials in a semiconductor device is disclosed and claimed. In one aspect, a rapid thermal processing apparatus is used to selectively oxidize a substrate by in-situ steam generation at high pressure in a hydrogen rich atmosphere. Other materials, such as metals and barrier layers, in the substrate are not oxidized.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: May 31, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Yoshitaka Yokota, Norman Tam, Balasubramanian Ramachandran, Martin John Ripley
  • Patent number: 7939454
    Abstract: A method for packaging solar cell module. The method includes providing a first substrate member and forming a plurality of thin film photovoltaic cells overlying the surface region of the first substrate member. A first connector member and a second connector member having a second thickness are operably coupled to each of the plurality of thin film photovoltaic cells. A first spacer element and a second spacer element overly portions of the surface region of the first substrate member. The method provides a laminating material overlying the plurality of thin film photovoltaic cells, the spacer elements, and the connector members. A second substrate member overlies the laminating material. A lamination process is performed to form the solar cell module by maintaining a spatial gap occupied by the laminating material between an upper surface regions of the connector members and the second substrate member using the spacer elements.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: May 10, 2011
    Assignee: Stion Corporation
    Inventor: Chester A. Farris, III
  • Patent number: 7892984
    Abstract: Methods for reducing defects on the surface of a silicon oxynitride film are disclosed. In one embodiment, the methods include forming a silicon oxynitride film on a semiconductor substrate and heating the silicon oxynitride film to increase a hydrophilicity of a surface of the silicon oxynitride film prior to treating the surface of the silicon oxynitride film with a hydrofluoric acid.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: February 22, 2011
    Assignee: Spansion LLC
    Inventor: Noriyuki Yokonaga
  • Patent number: 7871938
    Abstract: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber which is in a heated state to process the plurality of substrates by oxidation, and transferring the plurality of the oxidation-processed substrates out from the processing chamber, wherein the hydrogen-containing gas is supplied from a plurality of locations of a region corresponding to a substrate arrangement region in which the plurality of substrates are arranged in the processing chamber.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: January 18, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Kazuhiro Yuasa, Kiyohiko Maeda
  • Patent number: 7825043
    Abstract: A method for fabricating a capacitor in a semiconductor device includes: forming a bottom electrode; forming a ZrxAlyOz dielectric layer on the bottom electrode using an atomic layer deposition (ALD) method, wherein the ZrxAlyOz dielectric layer comprises a zirconium (Zr) component, an aluminum (Al) component and an oxygen (O) component mixed in predetermined mole fractions of x, y and z, respectively; and forming a top electrode on the ZrxAlyOz dielectric layer.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: November 2, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kee-Jeung Lee
  • Publication number: 20100210117
    Abstract: Oxygen is selectively removed from metal-containing materials in a partially-fabricated integrated circuit. In some embodiments, the partially-fabricated integrated circuit has exposed silicon and metal-containing materials, e.g., as part of a transistor. The silicon and metal-containing material are oxidized. Oxygen is subsequently removed from the metal-containing material by an anneal in an atmosphere containing a reducing agent. Advantageously, the silicon oxide formed by the silicon oxidation is maintained while oxygen is removed from the metal-containing material, thereby leaving a high quality metal-containing material along with silicon oxide.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 19, 2010
    Applicant: ASM International N.V.
    Inventors: Jerome Noiray, Ernst H.A. Granneman
  • Publication number: 20100184267
    Abstract: To form a good quality silicon oxide film provided with both a superior Qbd characteristic and Rd characteristic, a wafer W is loaded into a plasma treatment apparatus where the surface of a silicon layer 501 of the wafer W is treated by plasma oxidation to form on the silicon layer 501 to a film thickness T1 a silicon oxide film 503. Next, the wafer W on which the silicon oxide film 503 is formed is transferred to a thermal oxidation treatment apparatus where the silicon oxide film 503 is treated by thermal oxidation to thereby form a silicon oxide film 505 having a target film thickness T2.
    Type: Application
    Filed: August 31, 2009
    Publication date: July 22, 2010
    Applicants: TOKYO ELECTRON LIMITED, University of Tsukuba
    Inventors: Yoshiro Kabe, Junichi Kitagawa, Kikuo Yamabe
  • Patent number: 7759138
    Abstract: A method of fabricating a microchannel plate includes forming a plurality of pores in a silicon substrate. The plurality of pores is oxidized, thereby consuming silicon at surfaces of the plurality of pores and forming a silicon dioxide layer over the plurality of pores. At least a portion of the silicon dioxide layer is stripped, which reduces a surface roughness of the plurality of pores. A semiconducting layer can be deposited onto the surface of the silicon dioxide layer. The semiconducting layer is then oxidized, thereby consuming at least some of the polysilicon or amorphous silicon layer and forming an insulating layer. Resistive and secondary electron emissive layers are then deposited on the insulating layer by atomic layer deposition.
    Type: Grant
    Filed: September 20, 2008
    Date of Patent: July 20, 2010
    Assignee: Arradiance, Inc.
    Inventors: David Beaulieu, Neal T. Sullivan
  • Publication number: 20100144161
    Abstract: A semiconductor device manufacturing method and a substrate processing apparatus are provided to reduce contaminants generating due to striping of an oxide film formed on a silicon carbide member. The manufacturing method includes: loading a substrate into a silicon carbide reaction tube; forming an oxide film on the substrate by supplying oxidizing gas into the reaction tube and causing thermal oxidation; unloading the processed substrate from the reaction tube; and in a state where the processed substrate is unloaded from the reaction tube, after increasing an inside temperature of the reaction tube until temperature of an oxide film formed on an inner wall of the reaction tube through the thermal oxidation is increased to at least a temperature corresponding to a strain point of the oxide film, decreasing the inside temperature of the reaction tube to below a temperature at which the processed substrate is unloaded from the reaction tube.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 10, 2010
    Applicant: HITACHI-KOKUSAI ELECTRIC INC.
    Inventor: Iwao NAKAMURA
  • Patent number: 7713805
    Abstract: A method of manufacturing a silicon carbide semiconductor device having a MOS structure includes preparing a substrate made of silicon carbide, and forming a channel region, a first impurity region, a second impurity region, a gate insulation layer, and a gate electrode to form a semiconductor element on the substrate. In addition, a film is formed on the semiconductor element to provide a material of an interlayer insulation layer, and a reflow process is performed at a temperature about 700° C. or over in an wet atmosphere so that the interlayer insulation layer is formed from the film and an edge portion of the gate electrode is rounded and oxidized.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: May 11, 2010
    Assignee: DENSO CORPORATION
    Inventors: Hiroki Nakamura, Hiroyuki Ichikawa, Eiichi Okuno
  • Patent number: 7713883
    Abstract: An object of this invention is to make it possible to suppress early-stage oxidation of a substrate surface prior to oxidation processing, and to remove a natural oxidation film. For this reason, a method is provided comprising the steps of loading a substrate into a processing chamber, supplying a hydrogen-containing gas and an oxygen-containing gas into the processing chamber, and subjecting a surface of the substrate to oxidation processing, and unloading the substrate subjected to oxidation processing from the processing chamber. In the oxidation processing step, the hydrogen-containing gas is introduced in advance into the processing chamber, with the pressure inside the processing chamber set at a pressure that is less than atmospheric pressure, and the oxygen-containing gas is then introduced in the state in which the introduction of the hydrogen-containing gas is continued.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: May 11, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Yasuhiro Megawa
  • Publication number: 20100093185
    Abstract: The present invention provides a method for forming a silicon oxide film, with a substantially uniform film thickness and without being so influenced by dense sites and scattered sites in a pattern provided on an object to be processed, while keeping advantageous points of a plasma oxidation process performed under a lower-pressure and lower-oxygen-concentration condition. In this method, plasma of a processing gas is applied to a surface of the object having a concavo-convex pattern, in a processing chamber of a plasma processing apparatus, so as to oxidize silicon on the surface of the object, thereby forming the silicon oxide film. The plasma is generated under the condition that a ratio of oxygen in the processing gas is within a range of 0.1% to 10% and pressure is within a range of 0.133 Pa to 133.3 Pa.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 15, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshiro Kabe, Takashi Kobayashi, Toshihiko Shiozawa, Junichi Kitagawa