Abstract: One illustrative method disclosed herein includes forming a first recess in a first active region of a substrate, forming a first layer of channel semiconductor material for a first PFET transistor in the first recess, performing a first thermal oxidation process to form a first protective layer on the first layer of channel semiconductor material, forming a second recess in the second active region of the semiconducting substrate, forming a second layer of channel semiconductor material for the second PFET transistor in the second recess and performing a second thermal oxidation process to form a second protective layer on the second layer of channel semiconductor material.

Abstract: A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.

Abstract: The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.

Abstract: A semiconductor fabrication method is provided, in which a protective layer is deposited on the dummy wafer such that the protective layer fully encases the dummy wafer. Therefore, the dummy wafer will not be oxidized during thermal oxidation, thereby reducing dummy wafer consumption, decreasing production cost, avoiding particulate matter produced due to oxidation of the dummy wafer, and preventing the wafer to be oxidized from contamination.

Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.

Abstract: Methods for rounding the bottom corners of a shallow trench isolation structure are described herein. Embodiments of the present invention provide a method comprising forming a first masking layer on a sidewall of an opening in a substrate, removing, to a first depth, a first portion of the substrate at a bottom surface of the opening having the first masking layer therein, forming a second masking layer on the first masking layer in the opening, and removing, to a second depth, a second portion of the substrate at the bottom surface of the opening having the first and second masking layers therein. Other embodiments also are described.

Abstract: A method for fabricating semiconductor devices, e.g., SONOS cell. The method includes providing a semiconductor substrate (e.g., silicon wafer, silicon on insulator) having a surface region, which has a native oxide layer. The method includes treating the surface region to a wet cleaning process to remove a native oxide layer from the surface region. In a specific embodiment, the method includes subjecting the surface region to an oxygen bearing environment and subjecting the surface region to a high energy electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 10 milli-seconds to increase a temperature of the surface region to greater than 1000 Degrees Celsius. In a specific embodiment, the method causes formation of an oxide layer having a thickness of less than 10 Angstroms. In a preferred embodiment, the oxide layer is substantially free from pinholes and other imperfections.

Abstract: A method for manufacturing a fin-type field effect transistor simply and securely by using a SOI (Silicon On Insulator) wafer, capable of suppressing an undercut formation, is disclosed. The method includes forming a fin-shaped protrusion by selectively dry-etching a single crystalline silicon layer until an underlying buried oxide layer is exposed; forming a sacrificial oxide film by oxidizing a surface of the protrusion including a damage inflicted thereon; and forming a fin having a clean surface by removing the sacrificial oxide film by etching, wherein an etching rate r1 of the sacrificial oxide film is higher than an etching rate r2 of the buried oxide layer during the etching.

Abstract: Methods for compensating for a thermal profile in a substrate heating process are provided herein. In some embodiments, a method of processing a substrate includes determining an initial thermal profile of a substrate that would result from subjecting the substrate to a process; determining a compensatory thermal profile based upon the initial thermal profile and a desired thermal profile; imposing the compensatory thermal profile on the substrate prior to performing the process on the substrate; and performing the process to create the desired thermal profile on the substrate. The initial substrate thermal profile can also be compensated for by adjusting a local mass heated per unit area, a local heat capacity per unit area, or an absorptivity or reflectivity of a component proximate the substrate prior to performing the process. Heat provided by an edge ring to the substrate may be controlled prior to or during the substrate heating process.

Abstract: A semiconductor process is provided. The semiconductor process includes providing a substrate. Then, a surface treatment is performed to the substrate to form a buffer layer on the substrate. Next, a first pre-amorphous implantation is performed to the substrate.

Abstract: The invention provides a method for forming a semiconductor component with a rough buried interface. The method includes providing a first semiconductor substrate having a first surface of roughness R1. The method further includes thermally oxidizing the first surface of the first semiconductor substrate to form an oxide layer defining an external oxide surface on the first semiconductor substrate and a buried oxide-semiconductor interface below the oxide surface, so that the buried oxide surface has a roughness R2 that is less than R1. The method also includes assembling the oxide surface of the first semiconductor substrate with a second substrate. The invention also provides a component formed according to the method of the invention.

Abstract: A method for fabricating a gate dielectric of a field effect transistor is provided. In one embodiment, the method includes removing a native oxide layer, forming an oxide layer, forming a gate dielectric layer over the oxide layer, forming an oxide layer over the gate dielectric layer, and annealing the layers and underlying thermal oxide/silicon interface. Optionally, the oxide layer may be nitridized prior to forming the gate dielectric layer. In one embodiment, the oxide layer on the substrate is formed by depositing the oxide layer, and the oxide layer on the gate dielectric layer is formed by oxidizing at least a portion of the gate dielectric layer using an oxygen-containing plasma. In another embodiment, the oxide layer on the gate dielectric layer is formed by forming a thermal oxide layer, i.e., depositing the oxide layer on the gate dielectric layer.

Abstract: Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating.

Abstract: Conventionally, a MONOS type nonvolatile memory is fabricated by subjecting a silicon nitride film to ISSG oxidation to form a top silicon oxide film of ONO structure. If the ISSG oxidation conditions are severe, repeats of programming/erase operation cause increase of interface state density (Dit) and electron trap density. This does not provide a sufficient value of the on current, posing a problem in that the deterioration of charge trapping properties cannot be suppressed. For the solution to the problem, the silicon nitride film is oxidized by means of a high concentration ozone gas to form the top silicon oxide film.

Abstract: Transistors are formed using pitch multiplication. Each transistor includes a source region and a drain region connected by strips of active area material separated by shallow trench isolaton structures. The shallow trench isolaton structures are formed by dielectric material filling trenches that are formed by pitch multiplication. During pitch multiplication, rows of spaced-apart mandrels are formed and spacer material is blanket deposited over the mandrels. The spacer material is etched to define spacers on sidewalls of the mandrels and the mandrels are subsequently removed, thereby leaving free-standing spacers. The spacers constitute a mask, through which an underlying substrate is etched to form the trenches and strips of active area material. The trenches are filled to form the shallow trench isolaton structures. The substrate is doped to form source, drain and channel regions and a gate is formed over the channel region.

Abstract: The surface of an insulating film disposed on an electronic device substrate is irradiated with plasma based on a process gas comprising at least an oxygen atom-containing gas, to thereby form an underlying film at the interface between the insulating film and the electronic device substrate. A good underlying film is provided at the interface between the insulating film and the electronic device substrate, so that the thus formed underlying film can improve the property of the insulating film.

Abstract: The invention provides a method of fabricating a semiconductor device. In one aspect, the method comprises heating a gas mixture comprising chlorohydrocarbon having a general formula of CxHxClx, wherein x=2, 3, or 4, by passing it through a first chamber packed with surface area expanding members heated to a temperature to substantially dissociate the chlorohydrocarbon into chlorine and hydrocarbon. The dissociated chlorohydrocarbon is then passed, together with oxygen, into a second chamber heated to a lesser temperature to form an oxide film on a semiconductor substrate.

Abstract: Method for fabricating a semiconductor device, including the steps of providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon, forming a first insulating film, second conductive type polysilicon, and a second insulating film in succession on the semiconductor substrate, selectively removing the first insulating film, the polysilicon, and the second insulating film, to form a floating gate pattern at the cell region, elevating a temperature initially in a state O2 gas is injected, maintaining a fix temperature, and dropping the temperature in a state N2 gas is injected, to form a gate oxide film on a surface of the semiconductor substrate at the logic region, and forming a gate electrode pattern at each of the cell region and the logic region, whereby preventing a threshold voltage of a semiconductor device from dropping due to infiltration of impurities from doped polysilicon at the cell region to the active channel region.

Abstract: The invention provides a method of fabricating a semiconductive device. In one aspect, the method comprises heating a gas mixture [225] comprising chlorohydrocarbon having a general formula of CxHxClx, wherein x=2, 3, or 4. The chlorohydrocarbon is heated in a first chamber 210 to a first temperature that substantially disassociates the chlorohydrocarbon. The substantially disassociated chlorohydrocarbon is used to form a film on a semiconductive substrate [235] that is located in a second chamber [215].

Abstract: A semiconductor-based structure includes first and second layers bonded directly to each other at an interface. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. The first and second layers are each formed of essentially the same semiconductor. A method for making a semiconductor-based structure includes providing first and second layers that are formed of essentially the same semiconductor. The first and second layers have, respectively, first and second surfaces. The second layer has a different lattice spacing parallel to the second surface than the lattice spacing of the first layer parallel to the first surface. The method includes contacting the first and second surfaces, and annealing to promote direct atomic bonding between the first and second layers.

Abstract: A method is disclosed for controlling the formation of an interfacial oxide layer in a polysilicon emitter transistor device. The interfacial oxide layer is formed between an underlying substrate of single crystal silicon and an upper layer of polysilicon. The current gain and the emitter resistance of the transistor device are related to the thickness of the interfacial oxide layer. The oxide of the interfacial oxide layer is grown in a low pressure, low temperature pure oxygen (O2) environment that greatly reduces the oxidation rate. The low oxidation rate allows the thickness of the interfacial oxide layer to be precisely controlled and sources of variation to be minimized in the manufacturing process.

Abstract: A method for forming a shallow trench isolation (STI) structure is described. A patterned mask layer is formed on a substrate, having a trench-like opening therein exposing a portion of the substrate. A thermal oxidation process is performed to the substrate. An anisotropic etching process is performed using the patterned mask layer as a mask to form a trench in the substrate, and then the trench is filled with an insulating material.

Abstract: A method of fabricating a semiconductor device including gate dielectrics having different thicknesses may be provided. A method of fabricating a semiconductor device may include providing a substrate having a higher voltage device region and a lower voltage device region, forming an anti-oxidation layer on the substrate, and selectively removing portions of the anti-oxidation layer on the substrate. The method may also include performing a first thermal oxidization on the substrate to form a field oxide layer on the selectively removed portions of the anti-oxidation layer, removing the anti-oxidation layer disposed on the higher voltage device region, performing a second thermal oxidization on the substrate to form a central higher voltage gate oxide layer on the higher voltage device region, removing the anti-oxidation layer disposed on the lower voltage device region, and performing a third thermal oxidization on the substrate to form a lower voltage gate oxide layer on the lower voltage device region.

Abstract: A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate electrode and containing a dopant and arranged such that the gate electrode is formed on the gate electrode insulating film, and an oxidation process using ozone is performed to sufficiently round the shape of the lower edge of the gate electrode.

Abstract: A method for forming an oxide layer on a substrate. The method includes exposing a process gas containing H2, an oxygen-containing gas, and a halogen-containing oxidation accelerant gas to the substrate, where the process chamber is maintained at a subatmospheric pressure, and forming an oxide layer through thermal oxidization of the substrate by the process gas. According to one embodiment of the invention, the substrate can be maintained at a temperature between about 150° C. and about 900° C. A microstructure containing an oxide layer is described, where the oxide layer can be a gate dielectric oxide layer or an interface oxide layer integrated with a high-k layer.

Abstract: A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate electrode and containing a dopant and arranged such that the gate electrode is formed on the gate electrode insulating film, and an oxidation process using ozone is performed to sufficiently round the shape of the lower edge of the gate electrode.

Abstract: A peripheral processing method includes: by at least one of locally heating the periphery of a workpiece including a silicon-based substrate and selectively supplying reacting activation species to the periphery, allowing oxidation rate on the periphery to be higher than oxidation rate of native oxide film on a surface of the silicon-based substrate, thereby forming a first oxide film along the periphery, the first oxide film being thicker than the native oxide film.

Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.

Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.

Abstract: The present invention provides a method for processing a semiconductor device wherein a dielectric layer is partially converted into a silicon-oxy-nitride by incorporation of nitrogen atoms into the dielectric layer, which comprises a silicon oxide. Before the introduction of the nitrogen atoms into the dielectric layer, the dielectric layer is provided as a silicon oxide in which the atomic silicon to oxygen ration is greater than ½. In this way, MOS transistors are obtained with a high quality interface between the dielectric region and semiconductor substrate, and a dielectric region which is impermeable to impurity atoms from the gate region and which has a thickness which is substantially equal to the dielectric layer as deposited.

Abstract: A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed to implant nitrogen atoms into the silicon oxide layer. A thermal drive-in process is then performed to diffuse the implanted nitrogen atoms across the silicon oxide layer.

Abstract: A layer, such as a dielectric, formed on a substrate, such as a silicon substrate, is heated by selecting a specific wavelength or energy for the material of the layer, such that photons readily pass and are absorbed by the material and then reflected from the interface of the layer and the substrate.