Of Group Iii-v Compound (epo) Patents (Class 257/E21.286)
  • Patent number: 10490676
    Abstract: A method of manufacturing an oxidation layer for a solar cell is disclosed. The method includes exposing a substrate to a wet oxidation atmosphere and forming an oxidation layer on the substrate by maintaining a concentration of an oxidizing agent in the wet oxidation atmosphere for a process time.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: November 26, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyunjin Kim, Daeyeong Gong, Bokyeom Choi
  • Patent number: 8735303
    Abstract: One illustrative method disclosed herein includes forming a first recess in a first active region of a substrate, forming a first layer of channel semiconductor material for a first PFET transistor in the first recess, performing a first thermal oxidation process to form a first protective layer on the first layer of channel semiconductor material, forming a second recess in the second active region of the semiconducting substrate, forming a second layer of channel semiconductor material for the second PFET transistor in the second recess and performing a second thermal oxidation process to form a second protective layer on the second layer of channel semiconductor material.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: May 27, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Hans-Juergen Thees, Stephan Kronholz, Peter Javorka
  • Patent number: 8193016
    Abstract: A semiconductor laser device includes a substrate and a semiconductor layer formed on a surface of the substrate and having a waveguide extending in a first direction parallel to the surface, wherein the waveguide is formed on a region approaching a first side from a center of the semiconductor laser device in a second direction parallel to the surface and intersecting with the first direction, a first region separated from the waveguide on a side opposite to the first side of the waveguide and extending parallel to the first direction and a first recess portion separated from the waveguide on an extension of a facet of the waveguide, intersecting with the first region and extending in the second direction are formed on an upper surface of the semiconductor laser device, and a thickness of the semiconductor layer on the first region is smaller than a thickness of the semiconductor layer on a region other than the first region.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: June 5, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Ryoji Hiroyama, Daijiro Inoue, Yasuyuki Bessho, Masayuki Hata
  • Patent number: 7939454
    Abstract: A method for packaging solar cell module. The method includes providing a first substrate member and forming a plurality of thin film photovoltaic cells overlying the surface region of the first substrate member. A first connector member and a second connector member having a second thickness are operably coupled to each of the plurality of thin film photovoltaic cells. A first spacer element and a second spacer element overly portions of the surface region of the first substrate member. The method provides a laminating material overlying the plurality of thin film photovoltaic cells, the spacer elements, and the connector members. A second substrate member overlies the laminating material. A lamination process is performed to form the solar cell module by maintaining a spatial gap occupied by the laminating material between an upper surface regions of the connector members and the second substrate member using the spacer elements.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: May 10, 2011
    Assignee: Stion Corporation
    Inventor: Chester A. Farris, III
  • Patent number: 7932160
    Abstract: The invention relates to a method of producing a semiconductor device, comprising the following steps consisting in: forming first, second and third semiconductor layers (1, 2, 3), whereby the first and second layers (1, 3) contain a smaller concentration of oxidizable species than the second layer (2); forming a mask (4) on the third layer (3); and oxidizing the second layer (2) with the diffusion of oxidizing species through the third layer (3).
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: April 26, 2011
    Assignee: Centre National de la Recherche Scientifique (CNRS)
    Inventors: Guilhem Almuneau, Antonio Munoz-Yague, Thierry Camps, Chantal Fontaine, VĂ©ronique Bardinal-Delagnes
  • Publication number: 20100178721
    Abstract: A semiconductor device includes a p-type nitride semiconductor layer (14); and a p-side electrode (18) including a palladium oxide film (30) connected to a surface of the nitride semiconductor layer (14).
    Type: Application
    Filed: August 11, 2009
    Publication date: July 15, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji SAITO, Shinya Nunoue, Toshiyuki Oka
  • Patent number: 7670884
    Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: March 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Masafumi Morisue, Hironobu Shoji, Junya Maruyama, Kouji Dairiki, Tomoyuki Aoki
  • Patent number: 7655489
    Abstract: Disclosed is a method of doping an oxide. The example method includes forming at least one of an AlGaAs oxide or an InAlP oxide on a GaAs substrate, and incorporating Erbium into the at least one AlGaAs oxide or InAlP oxide via ion implantation to form an Erbium-doped oxide layer. The example method also includes annealing the substrate and the at least one AlGaAs oxide or InAlP oxide.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: February 2, 2010
    Assignee: The University of Notre Dame Du Lac
    Inventors: Douglas Hall, Mingjun Huang
  • Patent number: 7442654
    Abstract: A method of forming a dielectric layer structure on a supporting semiconductor structure having a first surface comprises providing a first beam of oxide; depositing a first layer of oxide on the first surface of the supporting semiconductor structure using the first beam of oxide, wherein the first layer of oxide has a second surface; terminating the first beam of oxide, and concurrently providing a second beam of oxide, a beam of metal and a beam of oxygen, wherein the first and second beams of oxide are separate and distinct beams of oxide; and depositing a second layer of oxide on the second surface simultaneously using the second beam of oxide, the beam of metal, and the beam of oxygen.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: October 28, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ravindranath Droopad, Matthias Passlack