Characterized By Semiconductor Body (epo) Patents (Class 257/E31.002)
- Including thin film deposited on metallic or insulating substrate (EPO) (Class 257/E31.041)
- Including polycrystalline semiconductor (EPO) (Class 257/E31.043)
- Including amorphous semiconductor (EPO) (Class 257/E31.047)
- Including other nonmonocrystalline material (e.g., semiconductor particles embedded in insulating material) (EPO) (Class 257/E31.051)
-
Publication number: 20120167967Abstract: An embodiment of a monolithic photovoltaic cell is provided. The photovoltaic cell comprises at least one junction; said at least one junction includes a base formed by an epitaxial doped semiconductor material of a first conductivity type and an emitter formed by a doped semiconductor material of a second conductivity type opposed to the first. Said emitter is stacked on the base according to a first direction, and the base of at least one of said at least one junction has a decreasing dopant concentration gradient along said first direction. Said base comprises a first portion far from the emitter, a second portion proximate to the emitter, and a third portion between the first portion and the second portion. In the first portion, said decreasing dopant concentration gradient has a slope whose average value ranges from approximately ?9*1017 cm?3/?m to ?4*1017 cm?3/?M.Type: ApplicationFiled: July 20, 2010Publication date: July 5, 2012Inventors: Gabriele Gori, Roberta Campesato
-
Patent number: 8198125Abstract: A method of making a monolithic photovoltaic module having a flexible substrate is described. The method includes the following steps. First, a flexible substrate is provided, and a first adhesive layer, a metal layer, and a second adhesive layer are formed thereon. The second adhesive layer, the metal layer and the first adhesive layer are etched with at least one etching paste. In addition, a patterned semiconductor body layer patterned by an etching paste or a laser scribing is formed thereon. Furthermore, transparent top electrodes patterned by an etching paste or a cold laser scribing are formed on the patterned semiconductor body layer.Type: GrantFiled: December 8, 2010Date of Patent: June 12, 2012Assignee: Du Pont Apollo LimitedInventors: Chiou-Fu Wang, Huo-Hsien Chiang
-
Patent number: 8198115Abstract: A method for manufacturing a solar cell, includes: forming, on a silicon substrate whose conductivity type is p-type or n-type, a silicon layer including a dopant whose conductivity type is different from that of the silicon substrate; and diffusing the dopant included in the silicon layer into the silicon substrate by heat-treating the silicon layer.Type: GrantFiled: April 21, 2009Date of Patent: June 12, 2012Assignee: ULVAC, Inc.Inventors: Miwa Watai, Kazuya Saito, Takashi Komatsu, Atsushi Ota, Shunji Kuroiwa, Miho Shimizu
-
Publication number: 20120125421Abstract: A reusable substrate and method for forming single crystal silicon solar cells are described. A method of forming a photovoltaic cell includes forming an intermediate layer on a monocrystalline silicon substrate, forming a monocrystalline silicon layer on the intermediate layer, and forming electrical features in the monocrystalline silicon layer. The method further includes forming openings in the monocrystalline silicon layer, and detaching the monocrystalline silicon layer from the substrate by selectively etching the intermediate layer through the openings.Type: ApplicationFiled: November 22, 2010Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brent A. ANDERSON, Edward J. NOWAK, Jed H. RANKIN
-
Publication number: 20120122260Abstract: An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within 10 s of microns).Type: ApplicationFiled: January 25, 2012Publication date: May 17, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ethan H. Cannon, Michael J. Hauser, Timothy D. Sullivan
-
Patent number: 8173475Abstract: A method of producing a photoelectric conversion device having a multilayer structure formed on a substrate, the multilayer structure including a lower electrode, a photoelectric conversion layer made of a compound semiconductor layer, an n-type buffer layer made of a compound semiconductor layer, and a transparent conductive layer, is disclosed. A reaction solution, which is an aqueous solution containing an n-type dopant element, at least one of ammonia and an ammonium salt, and thiourea, is prepared, the n-type dopant is diffused into the photoelectric conversion layer by immersing the substrate including the photoelectric conversion layer in the reaction solution controlled to a temperature in the range from 20° C. to 45° C.; and the buffer layer is deposited on the photoelectric conversion layer by immersing the substrate including the photoelectric conversion layer subjected to the diffusion step in the reaction solution controlled to a temperature in the range from 70° C. to 95° C.Type: GrantFiled: January 21, 2011Date of Patent: May 8, 2012Assignee: FUJIFILM CorporationInventors: Tetsuo Kawano, Takashi Koike
-
Patent number: 8173479Abstract: In a solid-state imaging device, the pixel circuit formed on the first surface side of the semiconductor substrate is shared by a plurality of light reception regions. The second surface side of the semiconductor substrate is made the light incident side of the light reception regions. The second surface side regions of the light reception regions formed in the second surface side part of the semiconductor substrate are arranged at approximately even intervals and the first surface side regions of the light reception regions formed in the first surface side part of the semiconductor substrate are arranged at uneven intervals, respectively, and the second surface side regions and the first surface side regions are joined respectively in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.Type: GrantFiled: August 9, 2010Date of Patent: May 8, 2012Assignee: Sony CorporationInventor: Keiji Mabuchi
-
Publication number: 20120103402Abstract: An apparatus, system, and method are disclosed for providing optical power to a semiconductor chip. An active semiconductor layer of the semiconductor chip is disposed toward a front side of the semiconductor chip. The active semiconductor layer comprises one or more integrated circuit devices. A photovoltaic semiconductor layer of the semiconductor chip is disposed between the active semiconductor layer and a back side of the semiconductor chip. The back side of the semiconductor chip is opposite the front side of the semiconductor chip. The photovoltaic semiconductor layer converts electromagnetic radiation to electric power. One or more conductive pathways between the photovoltaic semiconductor layer and the active semiconductor layer provide the electric power from the photovoltaic semiconductor layer to the one or more integrated circuit devices of the active semiconductor layer.Type: ApplicationFiled: November 2, 2010Publication date: May 3, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Eric V. Kline
-
Patent number: 8153456Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.Type: GrantFiled: January 20, 2011Date of Patent: April 10, 2012Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Atul Gupta, Nicholas P. T. Bateman
-
Patent number: 8148189Abstract: A method is described to create a thin semiconductor lamina adhered to a ceramic body. The method includes defining a cleave plane in a semiconductor donor body, applying a ceramic mixture to a first face of the semiconductor body, the ceramic mixture including ceramic powder and a binder, curing the ceramic mixture to form a ceramic body, and cleaving a lamina from the semiconductor donor body at the cleave plane, the lamina remaining adhered to the ceramic body. Forming the ceramic body this way allows outgassing of volatiles during the curing step. Devices can be formed in the lamina, including photovoltaic devices. The ceramic body and lamina can withstand high processing temperatures. In some embodiments, the ceramic body may be conductive.Type: GrantFiled: June 30, 2010Date of Patent: April 3, 2012Assignee: Twin Creeks Technologies, Inc.Inventors: Aditya Agarwal, Kathy J Jackson
-
Publication number: 20120070937Abstract: A method for producing a compound semiconductor layer comprises dissolving a metal feedstock comprising at least one of a group I-B element and a group III-B element, in a metal state, in a mixed solvent comprising an organic compound containing a chalcogen element and a Lewis base organic compound to produce a solution for forming a semiconductor; forming a coat using the solution for forming a semiconductor; and heat-treating the coat.Type: ApplicationFiled: July 27, 2010Publication date: March 22, 2012Applicant: KYOCERA CORPORATIONInventors: Seiichiro Inai, Yoshihide Okawa, Isamu Tanaka, Koichiro Yamada
-
Publication number: 20120070932Abstract: Aspects of the invention are directed to laser patterning apparatus capable of performing laser patterning on a thin film formed on a flexible substrate with a good yield and a laser patterning method thereof. The thin film formed on the flexible substrate can be patterned by laser using a laser patterning apparatus that can include a processing stage that has a reference processing surface on which the flexible substrate having the thin film formed thereon is disposed, a wrinkle removing device that is configured as a mechanism for stretching an outer periphery of a processing region of the flexible substrate so that tension is applied outward in the width direction and forward and backward in the transporting direction, and a laser scanner that scans a predetermined line of the thin film formed on the flexible substrate while emitting a laser beam thereto.Type: ApplicationFiled: September 16, 2011Publication date: March 22, 2012Applicant: FUJI ELECTRIC CO., LTD.Inventors: Masaaki TODA, Satoshi SAWAYANAGI
-
Publication number: 20120052610Abstract: The Total Internal Reflection Energy/Heat Source includes an object that allows electromagnetic radiation or phonons to be in total internal reflection within the object. The object, such as a microparticle or optical fiber, is doped with atoms or molecules that convert the electromagnetic radiation or phonons to heat, where the heat is transferred out of the object or converted to electricity. A second embodiment of the Total Internal Reflection Energy/Heat Source includes an object that allows electromagnetic radiation or phonons to be in total internal reflection within the object. The object, such as a microparticle, contains P-type and N-type materials beneath the surface, where the electromagnetic radiation or phonons in total internal reflection strikes the P-N junction of the P-type and N-type materials creating electricity.Type: ApplicationFiled: August 17, 2011Publication date: March 1, 2012Inventor: Gabriel James Tambunga
-
Publication number: 20120049067Abstract: The present invention aims to reduce a size and improve quality of an infrared sensor. An infrared sensor (203) according to the present invention includes a substrate (202) and an infrared detection element (201). A principal surface of the substrate (202) includes a convex shape. The infrared detection element (201) is formed over the principal surface including the convex shape of the substrate (202). Further, as for the infrared detection element (201), an entire light-receiving surface includes a planar shape. Then, it can be the small-sized infrared sensor (203) with improved quality.Type: ApplicationFiled: April 5, 2010Publication date: March 1, 2012Inventors: Masatake Takahashi, Yasuhiro Sasaki, Hiroshi Sakai
-
Publication number: 20120034725Abstract: In a method for the treatment of silicon wafers in the production of solar cells, a treatment liquid is applied to the surface of the silicon wafers for the purpose of texturization thereof. The treatment liquid contains, as additive, ethyl hexanol or cyclohexanol in an amount ranging from 0.5% to 3%, by weight.Type: ApplicationFiled: September 2, 2011Publication date: February 9, 2012Applicant: Gebr. Schmid GmbHInventor: Izaaryene Maher
-
Publication number: 20120009723Abstract: Image sensors have photodiodes separated by isolations regions formed from p-well or n-well implants. Isolation regions may be formed that are narrow and deep. Isolation regions may be formed in a multi-step process that selectively places implants at desired depths in a substrate. Complementary photoresist patterns may be used. To form an implant near the surface of a substrate, a photoresist pattern with openings over the desired implant area may be used. Subsequent implantation may use a complementary pattern such that ions pass through photoresist before implanting in desired regions of a substrate.Type: ApplicationFiled: July 6, 2010Publication date: January 12, 2012Inventor: Satyadev Nagaraja
-
Publication number: 20120003775Abstract: A method is described to create a thin semiconductor lamina adhered to a ceramic body. The method includes defining a cleave plane in a semiconductor donor body, applying a ceramic mixture to a first face of the semiconductor body, the ceramic mixture including ceramic powder and a binder, curing the ceramic mixture to form a ceramic body, and cleaving a lamina from the semiconductor donor body at the cleave plane, the lamina remaining adhered to the ceramic body. Forming the ceramic body this way allows outgassing of volatiles during the curing step. Devices can be formed in the lamina, including photovoltaic devices. The ceramic body and lamina can withstand high processing temperatures. In some embodiments, the ceramic body may be conductive.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Aditya Agarwal, Kathy J. Jackson
-
Publication number: 20120000516Abstract: A solar cell includes a semiconductor portion, a graphene layer disposed on a first surface of the semiconductor portion, and a first conductive layer patterned on the graphene layer, the first conductive layer including at least one bus bar portion and a plurality of fingers extending from the at least one bus bar portion.Type: ApplicationFiled: July 1, 2010Publication date: January 5, 2012Applicants: EGYPT NANOTECHNOLOGY CENTER, INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ageeth A. Bol, Amal Kasry, Ahmed Maarouf, Glenn J. Martyna, Dennis M. Newns, Razvan A. Nistor, George S. Tulevski
-
Publication number: 20110303265Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).Type: ApplicationFiled: June 9, 2010Publication date: December 15, 2011Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLCInventors: Hao-Chih Yuan, Howard M. Branz, Matthew R. Page
-
Publication number: 20110300657Abstract: There is provided a process for forming a layer of electroactive material. The process includes: depositing a liquid composition containing an electroactive material and at least one solvent onto a workpiece to form a wet layer; placing the wet layer on the workpiece into a vacuum chamber containing solid absorptive material; and treating the wet layer at a controlled temperature in the range of ?25° C. to 80° C. and under an applied vacuum in the range of 10?6 Torr to 1,000 Torr for a period of 1-100 minutes.Type: ApplicationFiled: March 9, 2010Publication date: December 8, 2011Applicant: E.I. DU PONT DE NEMOURS AND COMPANYInventors: Reid John Chesterfield, Justin Butler, Paul Anthony Sant
-
Publication number: 20110272689Abstract: An optical touch panel may be used remotely to control a large-sized display device. According to a method of fabricating the optical touch panel, an optical sensor transistor for sensing light and a switch transistor for drawing data can be formed together on the same substrate by using a relatively simple process. The optical touch panel may include an optical sensor transistor and a switch transistor. The optical sensor transistor may be configured to sense light and the switch transistor may be configured to draw data from the optical sensor transistor. The optical sensor transistor may include a light sensitive oxide semiconductor material as a channel layer. The switch transistor may include a non-light sensitive oxide semiconductor material as a channel layer.Type: ApplicationFiled: January 13, 2011Publication date: November 10, 2011Applicant: Samsung Electronics Co., Ltd.Inventors: Jae-chul Park, I-hun Song, Chang-jung Kim
-
Publication number: 20110253209Abstract: A solar cell includes a substrate of a first conductive type; an emitter layer that is positioned on the substrate and is a second conductive type that is opposite to the first conductive type; first electrodes that are connected to the emitter layer; and a second electrode that is connected to the substrate, wherein the emitter layer includes a first emitter portion and a second emitter portion, the first electrodes include a finger electrode, and a bus electrode intersecting and connected to the finger electrode, and the first emitter portion and the second emitter portion are positioned under the bus electrode.Type: ApplicationFiled: June 29, 2011Publication date: October 20, 2011Inventor: JaeSung YOU
-
Publication number: 20110253217Abstract: Disclosed are methods of using magnetic or electric fields to align magnetically responsive nanoparticles in a polymeric matrix, which has not yet been completely solidified. The nanoparticles are preferably magnetically doped, then blended with photovoltaic polymer material to form devices. The methods provided are particularly useful for the formation of solar cell devices. The devices include nanostructured electron-conducting channels arranged approximately parallel to one another, where the channels comprise magnetically doped materials, as well as photovoltaic materials interspersed with the nanostructured electron-conducting channels. The method provides a way to control the morphology of blended photovoltaic devices, which will improve efficiencies. In addition, the new method provides a way to control the growth of novel, cheap, solar cells, which can in turn lead to enhanced performance.Type: ApplicationFiled: September 28, 2009Publication date: October 20, 2011Inventors: Jeffrey C. Grossman, Alexander K. Zettl
-
Publication number: 20110249163Abstract: A photoelectric conversion device comprises a p-type region, an n-type buried layer formed under the p-type region, an element isolation region, and a channel stop region which covers at least a lower portion of the element isolation region, wherein the p-type region and the buried layer form a photodiode, and a diffusion coefficient of a dominant impurity of the channel stop region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.Type: ApplicationFiled: January 20, 2010Publication date: October 13, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Hajime Ikeda, Yoshihisa Kabaya, Takanori Watanabe, Takeshi Ichikawa, Mineo Shimotsusa
-
Patent number: 8030120Abstract: A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer.Type: GrantFiled: September 7, 2007Date of Patent: October 4, 2011Assignee: The University of ToledoInventors: Xunming Deng, Xianbo Liao, Wenhui Du
-
Publication number: 20110232759Abstract: The present invention generally relates to the field of photovoltaic devices. Specifically, the present invention relates to the areas of dye sensitized solar cells (DSSCs).Type: ApplicationFiled: March 29, 2010Publication date: September 29, 2011Inventor: Tao Xu
-
Publication number: 20110237022Abstract: Methods to form complementary implant regions in a workpiece are disclosed. A mask may be aligned with respect to implanted or doped regions on the workpiece. The mask also may be aligned with respect to surface modifications on the workpiece, such as deposits or etched regions. A masking material also may be deposited on the implanted regions using the mask. The workpiece may be a solar cell.Type: ApplicationFiled: March 23, 2011Publication date: September 29, 2011Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Nicholas P.T. BATEMAN, William T. WEAVER, Paul SULLIVAN, John W. GRAFF
-
Publication number: 20110233478Abstract: It is an object of the present invention to provide aluminum-containing silicon for n-type solar cells. It further provides a method of producing phosphorous-doped silicon refined form aluminum-containing silicone from an economical point of view. It provides silicon for n-type solar cells containing aluminum at a mass concentration of from 0.001 to 1.0 ppm and phosphorous at a mass concentration of from 0.0011 to 1.1 ppm, and having a mass concentration ratio of phosphorous to aluminum of 1.1 or greater. It further provides a method of producing phosphorous-doped silicon, including: preparing a melted mixture containing aluminum, phosphorous, and silicon, by heating and melting aluminum-containing silicon to obtain a melted product and adding phosphorous to the obtained melted product, or by adding phosphorous to aluminum-containing silicon to obtain a mixture and heating and melting the obtained mixture; and then solidifying the melted mixture in a mold under a temperature gradient in one direction.Type: ApplicationFiled: November 30, 2009Publication date: September 29, 2011Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGYInventors: Tomohiro Megumi, Hiroshi Tabuchi, Koichi Kamisako, Marwan Dhamrin
-
Patent number: 8022444Abstract: Provided are a biosensor with a silicon nanowire and a method of manufacturing the same, and more particularly, a biosensor with a silicon nanowire including a defect region formed by irradiation of an electron beam, and a method of manufacturing the same. The biosensor includes: a silicon substrate; a source region disposed on the silicon substrate; a drain region disposed on the silicon substrate; and a silicon nanowire disposed on the source region and the drain region, and having a defect region formed by irradiation of an electron beam. Therefore, by irradiating a certain region of a high-concentration doped silicon nanowire with an electron beam to lower electron mobility in the certain region, it is possible to maintain a low contact resistance between the silicon nanowire and a metal electrode and to lower operation current of a biomaterial detection part, thereby improving sensitivity of the biosensor.Type: GrantFiled: August 20, 2008Date of Patent: September 20, 2011Assignee: Electronics and Telecommunications Research InstituteInventors: Tae Youb Kim, Nae Man Park, Han Young Yu, Moon Gyu Jang, Jong Heon Yang
-
Publication number: 20110215434Abstract: Provided are a thin-film photoelectric conversion device of which thickness can be reduced to several tens nanometers (nm) or below, and a method of manufacturing the thin-film photoelectric conversion device. The thin-film photoelectric conversion device includes a metal silicide layer formed on a surface of a silicon substrate by diffusion of a first metal and silicon, a conductive thin-film layer formed on the surface of the silicon substrate in a region where the second metal thin-film layer is laminated, and a silicon diffused portion formed between the metal silicide layer and the conductive thin-film layer near the surface of the silicon substrate by diffusion of silicon nano-particles.Type: ApplicationFiled: September 14, 2008Publication date: September 8, 2011Applicant: SI-NANO INC.Inventor: Jose Briceno
-
Publication number: 20110215298Abstract: A photodetector is provided that includes a FET structure with a channel structure having one or more nanowire structures. Noble metal nanoparticles are positioned on the channel structure so as to produce a functionalized channel structure. The functionalized channel structure exhibits pronounced surface plasmon resonance (SPR) absorption near the SPR frequency of the noble metal nanoparticles.Type: ApplicationFiled: March 2, 2010Publication date: September 8, 2011Inventors: Jin Young Kim, Ramses Martinez, Francesco Stellacci, Javier Martinez, Ricardo Garcia
-
Publication number: 20110217810Abstract: A first species selectively dopes a workpiece to form a first doped region. In one embodiment, a selective implant is performed using a mask with apertures. A soft mask is applied to the first doped region. A second species is implanted into the workpiece to form a second implanted region. The soft mask blocks a portion of the second species. Then the soft mask is removed. The first species and second species may be opposite conductivities such that one is p-type and the other is n-type.Type: ApplicationFiled: February 24, 2011Publication date: September 8, 2011Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Nicholas P.T. BATEMAN, William T. WEAVER
-
Publication number: 20110203666Abstract: A solar cell including a base of single crystal silicon with a cubic crystal structure and a single crystal layer of a second material with a higher bandgap than the bandgap of silicon. First and second single crystal transition layers are positioned in overlying relationship with the layers graduated from a cubic crystal structure at one surface to a hexagonal crystal structure at an opposed surface. The first and second transition layers are positioned between the base and the layer of second material with the one surface lattice matched to the base and the opposed surface lattice matched to the layer of second material.Type: ApplicationFiled: February 19, 2010Publication date: August 25, 2011Inventors: Michael Lebby, Andrew Clark
-
Publication number: 20110203632Abstract: Photovoltaic (PV) devices employing layers of semiconducting carbon nanotubes as light absorption elements are disclosed. In one aspect a layer of p-type carbon nanotubes and a layer of n-type carbon nanotubes are used to form a p-n junction PV device. In another aspect a mixed layer of p-type and n-type carbon nanotubes are used to form a bulk hetero-junction PV device. In another aspect a metal such as a low work function metal electrode is formed adjacent to a layer of semiconducting nanotubes to form a Schottky barrier PV device. In another aspect various material deposition techniques well suited to working with nanotube layers are employed to realize a practical metal-insulator-semiconductor (MIS) PV device. In another aspect layers of metallic nanotubes are used to provide flexible electrode elements for PV devices. In another aspect layers of metallic nanotubes are used to provide transparent electrode elements for PV devices.Type: ApplicationFiled: February 22, 2010Publication date: August 25, 2011Inventors: RAHUL SEN, SUCHIT SHAH, HAO-YU LIN, THOMAS RUECKES
-
Publication number: 20110189805Abstract: An object of the present invention is to provide a method of producing a silicon wafer and a method of producing an epitaxial wafer, which enable easily forming a gettering site in a relatively short period of time and effectively suppressing occurrence of dislocation induced by internal stresses. Specifically, the present invention provides a method of producing a silicon wafer, comprising: irradiating a first laser beam having a relatively long wavelength and a second laser beam having a relatively short wavelength onto a portion of a silicon wafer located at a predetermined depth measured from a surface of the silicon wafer, wherein the first laser beam is concentrated at a portion located at a predetermined depth of the wafer to form a process-affected layer for gettering heavy metals thereat, the second laser beam is concentrated at a beam-concentration portion in the vicinity of the surface of the wafer to melt the beam-concentration portion, the beam-concentration portion is then recrystallized.Type: ApplicationFiled: January 28, 2011Publication date: August 4, 2011Applicant: SUMCO CORPORATIONInventor: Kazunari Kurita
-
Publication number: 20110175672Abstract: Examples of the present invention include a metamaterial comprising a plurality of resonators disposed on a substrate, the substrate comprising a dielectric support layer and a relatively thin semiconductor layer, having a Schottky junction between at least one conducting resonator and the semiconductor layer. The properties of the resonator may be adjusted by modifying the physical extent of a depletion region associated with the Schottky junction.Type: ApplicationFiled: January 28, 2009Publication date: July 21, 2011Applicants: Toyota Motor Engineering & Manufacturing North America Inc., Duke UniversityInventors: Vinh N. Nguyen, Nan Marie Jokerst, David R. Smith, Talmage Tyler, II, Jungsang Kim, Serdar H. Yonak
-
Publication number: 20110169120Abstract: Disclosed is an integrated circuit (100) comprising a substrate (110) carrying a plurality of light-sensitive elements (112) and a blazed grating (120) comprising a plurality of diffractive elements (122) for diffracting respective spectral components (123-125) of incident light (150) to respective light-sensitive elements (112), the blazed grating (120) comprising a stack of layers, at least some of these layers comprising first portions, e.g. metal portions (202, 222, 242) arranged such that each diffractive element (122) comprises a stepped profile of stacked first portions with a first portion in a higher layer laterally extending beyond a first portion in a lower layer of said stepped profile.Type: ApplicationFiled: September 12, 2009Publication date: July 14, 2011Applicant: NXP B.V.Inventors: Erwin Hijzen, Magali Lambert
-
Publication number: 20110168263Abstract: Higher efficiency, lower cost silicon based solar cells are provided by modifying the absorption coefficient of Silicon so that it strongly overlaps with the solar spectrum. In one embodiment this is achieved by co doping of the silicon with appropriate impurities. In another embodiment it is achieved by modifying the structure of silicon whereby a portion is converted into Silicon XII having the R8 structure.Type: ApplicationFiled: September 17, 2009Publication date: July 14, 2011Applicant: The Regents of the University of CaliforniaInventors: Steven G. Louie, Marvin L. Cohen
-
Publication number: 20110139230Abstract: Solar cells and methods for their manufacture are disclosed. An example method may include providing a p-type doped silicon substrate and introducing n-type dopant to a first and second region of the front surface of the substrate by ion implantation so that the second region is more heavily doped than the first region. The substrate may be subjected to a single high-temperature anneal cycle to activate the dopant, drive the dopant into the substrate, produce a p-n junction, and form a selective emitter. Oxygen may be introduced during the single anneal cycle to form in situ front and back passivating oxide layers. Fire-through of front and back contacts as well as metallization with contact connections may be performed in a single co-firing operation. Associated solar cells are also provided.Type: ApplicationFiled: June 3, 2010Publication date: June 16, 2011Inventors: Ajeet Rohatgi, Vijay Yelundur, Vinodh Chandrasekaran, Preston Davis, Ben Damiani
-
Publication number: 20110143496Abstract: A method of making a monolithic photovoltaic module having a flexible substrate is described. The method includes the following steps. First, a flexible substrate is provided, and a first adhesive layer, a metal layer, and a second adhesive layer are formed thereon. The second adhesive layer, the metal layer and the first adhesive layer are etched with at least one etching paste. In addition, a patterned semiconductor body layer patterned by an etching paste or a laser scribing is formed thereon. Furthermore, transparent top electrodes patterned by an etching paste or a cold laser scribing are formed on the patterned semiconductor body layer.Type: ApplicationFiled: December 8, 2010Publication date: June 16, 2011Applicant: Du Pont Apollo LimitedInventors: Chiou-Fu Wang, Huo-Hsien Chiang
-
Publication number: 20110140074Abstract: Self-healing photocathode device comprising a photoemissive multi-alkali semiconductor comprising a multi-alkali antimonide having the formula AxBy CzSb, where A, B and C are Group I alkali metals and x+y+z=3; a nanostructured porous membrane, one surface of which is in direct contact with the multi-alkali semiconductor and the opposing surface of which is disposed toward the inside of a sealed reservoir, such that the porous membrane and the sealed reservoir form a volume which is maintained at low pressure; a temperature control means in contact with the porous membrane, wherein the temperature control means regulates the temperature of the porous membrane at 200° C. or less; a source comprising elemental cesium which is releasable into the enclosed volume; and, a current conducting means attached to the source.Type: ApplicationFiled: December 15, 2010Publication date: June 16, 2011Applicant: LOS ALAMOS NATIONAL SECURITY, LLCInventors: Nathan A. Moody, David Charles Lizon, Dinh Cong Nguyen
-
Publication number: 20110136288Abstract: An embodiment relates to a method of manufacturing a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire.Type: ApplicationFiled: December 8, 2009Publication date: June 9, 2011Applicant: ZENA TECHNOLOGIES, INC.Inventors: Peter DUANE, Young-June Yu, Munib Wober
-
Publication number: 20110133203Abstract: A photoconductive semiconductor switch according to one embodiment includes a structure of sintered nanoparticles of a high band gap material exhibiting a lower electrical resistance when excited by light relative to an electrical resistance thereof when not exposed to the light. A method according to one embodiment includes creating a mixture comprising particles, at least one dopant, and at least one solvent; adding the mixture to a mold; forming a green structure in the mold; and sintering the green structure to form a transparent ceramic. Additional system, methods and products are also presented.Type: ApplicationFiled: December 8, 2009Publication date: June 9, 2011Inventors: Roger W. Werne, James S. Sullivan, Richard L. Landingham
-
Patent number: 7956427Abstract: Electrical devices comprised of nanowires are described, along with methods of their manufacture and use. The nanowires can be nanotubes and nanowires. The surface of the nanowires may be selectively functionalized. Nanodetector devices are described.Type: GrantFiled: June 2, 2010Date of Patent: June 7, 2011Assignee: President and Fellows of Harvard CollegeInventors: Charles M. Lieber, Hongkun Park, Qingqiao Wei, Yi Cui, Wenjie Liang
-
Publication number: 20110095334Abstract: A barrier-type photo-detector is provided with a Barrier between first and second layers. One of the layers is delineated into pixels without fully removing the non-pixel portions of the delineated layer. Delineation may be accomplished through material modification techniques such as ion damage, selective doping, ion induced disordering or layer material growth. Some variations may employ partial material removal techniques.Type: ApplicationFiled: October 22, 2010Publication date: April 28, 2011Applicant: Lockheed Martin CorporationInventor: Jeff Winfield Scott
-
Patent number: 7928486Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.Type: GrantFiled: December 18, 2009Date of Patent: April 19, 2011Assignee: Canon Kabushiki KaishaInventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
-
Publication number: 20110081744Abstract: A buffer layer manufacturing method, including the steps of forming a fine particle layer of ZnS, Zn(S, O), and/or Zn(S, O, OH), mixing an aqueous solution (I) which includes a component (Z), an aqueous solution (II) which includes a component (S), and an aqueous solution (III) which includes a component (C) to obtain a mixed solution and mixing an aqueous solution (IV) which includes a component (N) in the mixed solution to prepare a reaction solution in which the concentration of the component (C) is 0.001 to 0.25M, concentration of the component (N) is 0.41 to 1.0M, and the pH before the start of reaction is 9.0 to 12.0, and, using the reaction solution, forming a Zn compound layer of Zn(S, O) and/or Zn(S, O, OH) on the fine particle layer by a liquid phase method with a reaction temperature of 70 to 95° C.Type: ApplicationFiled: October 5, 2010Publication date: April 7, 2011Applicant: FUJIFILM CORPORATIONInventor: Tetsuo KAWANO
-
Publication number: 20110073168Abstract: The invention relates to a layered structure (1) with semiconducting materials on a support layer (3) comprising at least one planar semiconducting layer (6) and several electrodes, in particular a first (4) and second (5) one. The semiconducting layer (6) has a top (8) and bottom (7) flat face extending essentially parallel and spaced apart from one another by the height of the layer (10). The semiconducting layer (6) is also applied by the bottom flat face (7) to a flat face of the support layer (2) and the two electrodes are connected to the semiconducting layer in an electrically conducting manner The at least two electrodes are applied by means of a structuring process and are disposed on two oppositely lying faces of the semiconducting layer and/or in planes at least approximately parallel between the two faces.Type: ApplicationFiled: December 5, 2007Publication date: March 31, 2011Applicant: NANOIDENT TECHNOLOGIES AGInventors: Franz Padinger, Klaus Schröter
-
Publication number: 20110073973Abstract: A semiconductor light detecting element includes: a semiconductor substrate; and a distributed Bragg reflector layer of a first conductivity type, an optical absorption layer, and a semiconductor layer of a second conductivity type, sequentially laminated on the semiconductor substrate. The distributed Bragg reflector layer includes first and second alternately laminated semiconductor layers with different band-gap wavelengths, sandwiching the wavelength of detected incident light. The sum of thicknesses a first and a second semiconductor layer is approximately one-half the wavelength of the incident light detected.Type: ApplicationFiled: May 20, 2010Publication date: March 31, 2011Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Masaharu Nakaji, Ryota Takemura
-
Patent number: 7911009Abstract: Electrical devices comprised of nanowires are described, along with methods of their manufacture and use. The nanowires can be nanotubes and nanowires. The surface of the nanowires may be selectively functionalized. Nanodetector devices are described.Type: GrantFiled: September 30, 2009Date of Patent: March 22, 2011Assignee: President and Fellows of Harvard CollegeInventors: Charles M. Lieber, Hongkun Park, Qingqiao Wei, Yi Cui, Wenjie Liang