Abstract: Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.

Abstract: The present invention relates to a novel process for producing textured surfaces on multicrystalline, tricrystalline and monocrystalline silicon surfaces of solar cells or on silicon substrates which are used for photovoltaic purposes. It relates in particular to an etching process and an etching agent for producing a textured surface on a silicon substrate.

Abstract: A ceramic body is disposed in a path of light emitted by a light source. The light source may include a semiconductor structure comprising a light emitting region disposed between an n-type region and a p-type region. The ceramic body includes a plurality of first grains configured to absorb light emitted by the light source and emit light of a different wavelength, and a plurality of second grains. For example, the first grains may be grains of luminescent material and the second grains may be grains of a luminescent material host matrix without activating dopant.

Abstract: A method for fabrication of a multijunction photovoltaic (PV) cell includes forming a stack comprising a plurality of junctions on a substrate, each of the plurality of junctions having a respective bandgap, wherein the plurality of junctions are ordered from the junction having the largest bandgap being located on the substrate to the junction having the smallest bandgap being located on top of the stack; forming a metal layer, the metal layer having a tensile stress, on top of the junction having the smallest bandgap; adhering a flexible substrate to the metal layer; and spalling a semiconductor layer from the substrate at a fracture in the substrate, wherein the fracture is formed in response to the tensile stress in the metal layer.

Abstract: A novel photoelectric conversion device and a manufacturing method thereof are provided. The photoelectric conversion device includes an insulating layer over a light-transmitting base substrate; a single crystal semiconductor layer provided with a plurality of depressions which are filled with the insulating layer; a plurality of first impurity semiconductor layers formed in stripes having one conductivity type and a plurality of second impurity semiconductor layers formed in stripes having a conductivity type which is opposite to the one conductivity type, which are arranged alternately and do not overlap with each other, in a surface layer or over a surface of the single crystal semiconductor layer; first electrodes which are in contact with the first impurity semiconductor layers; and second electrodes which are in contact with the second impurity semiconductor layers.

Abstract: A photovoltaic device includes a heterojunction between different semiconductor materials which are present in charge transporting layers. The device can include laterally-arranged electrodes.

Abstract: The present invention features a solar-to-electric energy conversion device based on a light absorbing electrode coupled to a one-dimensional nanoparticle based photonic crystal. The function of the latter is to localize the incident light within the electrode thus enhancing the optical absorption and the power conversion efficiency of the so called dye-sensitized and organic (polymer based or hybrids) cell. The photonic crystal comprises alternating layers possessing different index of refraction and can be easily integrated into the cell.

Abstract: A phase change memory device resistant to stack pattern collapse is presented. The phase change memory device includes a silicon substrate, switching elements, heaters, stack patterns, bit lines and word lines. The silicon substrate has a plurality of active areas. The switching elements are connected to the active areas. The heaters are connected to the switching elements. The stack patterns are connected to the heaters. The bit lines are connected to the stack patterns. The word lines are connected to the active areas of the silicon substrate.

Abstract: A semiconductor donor body such as a wafer is implanted with ions to form a cleave plane. The donor wafer is affixed to a polyimide receiver element, for example by applying polyimide in liquid form to the donor wafer, then curing, or by affixing the donor wafer to a preformed polyimide sheet. Annealing causes a lamina to cleave from the donor wafer at the cleave plane. The resulting adhered lamina and polyimide body are not adhered to another rigid substrate and can be jointly flexed.

Abstract: A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles.

Abstract: A method for producing a film of compound semiconductor includes providing a substrate and a compound bulk material having a first chemical composition that includes at least one first chemical element and a second chemical element. A film is deposited on the substrate using the compound bulk material as a single source of material. The deposited film has a composition substantially the same as the first chemical composition. A residual chemical reaction is induced in the deposited film using a source containing the second chemical element to thereby increase the content of the second chemical element in the deposited film so that the deposited film has a second chemical composition. The film may be employed in a photovoltaic device.

Abstract: In a solid-state imaging device, the pixel circuit formed on the first surface side of the semiconductor substrate is shared by a plurality of light reception regions. The second surface side of the semiconductor substrate is made the light incident side of the light reception regions. The second surface side regions of the light reception regions formed in the second surface side part of the semiconductor substrate are arranged at approximately even intervals and the first surface side regions of the light reception regions formed in the first surface side part of the semiconductor substrate are arranged at uneven intervals, respectively, and the second surface side regions and the first surface side regions are joined respectively in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

Abstract: Method and apparatus for providing a photon conversion device including a first layer for photon absorption, and a second layer for photon emission wherein the first layer is separate from the second layer, wherein the first and second layers enable excited electrons and holes to move from the first layer to the second layer and recombine in the second layer.

Abstract: Photonic crystal cavities and related devices and methods are described. The described cavities can be used as lasers, photovoltaic sources, and single photon sources. The cavities can be both optically and electrically pumped. A fabrication process of the cavities is also described.

Abstract: On a surface of a GaAs substrate, layers to be a top cell are formed by epitaxial growth. On the top cell, layers to be a bottom cell are formed. Thereafter, on a surface of the bottom cell, a back surface electrode is formed. Thereafter, a glass plate is adhered to the back surface electrode by wax. Then, the GaAs substrate supported by the glass plate is dipped in an alkali solution, whereby the GaAs substrate is removed. Thereafter, a surface electrode is formed on the top cell. Finally the glass plate is separated from the back surface electrode. In this manner, a compound solar battery that improves efficiency of conversion to electric energy can be obtained.

Abstract: An infrared sensor manufacturing method according to this invention includes a step of forming a bridge structure of an insulating material on an Si substrate, a step of forming a vanadium oxide thin film on the bridge structure by a dry film forming method, a step of irradiating laser light onto the vanadium oxide thin film to thereby change material properties thereof, a step of forming the vanadium oxide thin film with the changed material properties into a bolometer resistor having a predetermined pattern, and a step of forming a protective layer of an insulating material so as to cover the bolometer resistor having the predetermined pattern and the bridge structure.

Abstract: Provided is a photodetector converting an optical signal into an electrical signal. The photodetector includes: a plurality of semiconductor layers sequentially stacked on a substrate; a plurality of photoelectric conversion units formed in the semiconductor layers, respectively, and having different spectral sensitivities from each other; and buffer layers interposed between the adjacent semiconductor layers, respectively. Each of the buffer layers alleviates stress between the adjacent semiconductor layers.

Abstract: This invention relates to an apparatus and a method for solar cells with laser fired contacts in thermally diffused doped regions. The cell includes a doped wafer and a plurality of first highly doped regions having a first conductivity type. The cell also includes a plurality of second highly doped regions having an opposite conductivity type from the first conductivity type and a passivation layer disposed over at least a portion of each the plurality of first highly doped regions and the plurality of second highly doped regions. The cell also includes a network of conductors having a first conductor and a second conductor, and a plurality of contacts electrically connecting the first highly doped regions with the first conductor and electrically connecting the second highly doped regions with the second conductor.

Abstract: A photoresponsive ionogel comprising a photo-responsive polymer polymerised within an ionic liquid matrix is described. This solid-state electrolyte material maintains its ionic liquid characteristics but these characteristics can be altered upon irradiation of the gel with light of a particular wavelength. By suitably configuring the ionogel through the incorporation of specific ions within the gel it is possible to cause dramatic changes in properties of the ionogel such as viscosity, conductivity, acidity, basicity and polarity using light as the stimulus.

Abstract: Disclosed is a method for manufacturing a solar cell. The method includes forming an impurity layer on a substrate of a first conductive type, the impurity layer having impurities of a second conductive type opposite the first conductive type; forming a first emitter portion having a first impurity concentration in the substrate using the impurity layer by heating the substrate with the impurity layer; forming a second emitter portion having a second impurity concentration at the first emitter portion using the impurity layer by irradiating laser beams on a region of the impurity layer, the second impurity concentration being greater than the first impurity concentration; and forming a first electrode connected to the second emitter portion and a second electrode connected to the substrate.

Abstract: Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping (ART) and epitaxial layer overgrowth (ELO). In general, in a first aspect, embodiments of the invention may include a method of forming a structure. The method includes forming a first opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semi-conductor material lattice-mismatched to the first semiconductor material, is formed within the first opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer.

Abstract: A method of fabricating a solar cell is disclosed. The solar cell fabricating method includes forming a first transparent conductive layer on a transparent substrate, texturing an upper surface of the first transparent conductive layer using an etchant solution configured to contain an acid with a molecular weight of about 58˜300, forming a photoelectric conversion layer on the first transparent conductive layer, forming a second transparent conductive layer on the photoelectric conversion layer, and forming a rear electrode on the second transparent conductive layer.

Abstract: A process for producing a photovoltaic device having a substrate comprising silicon doped with a first dopant, the process comprising the steps of: a. forming a first layer over a front surface of the substrate, the first layer comprising a second dopant of a conductivity type opposite the first dopant; b. forming a second surface coating over the first layer; c. forming elongate grooves reaching or entering the silicon substrate, d. forming a third layer within the grooves, the layer comprising a third dopant of a conductivity type opposite to the first dopant; e. forming a contact finger system which intersects with the grooves to provide an electrically conducting front contact; and f. forming a second contact.

Abstract: A solid-state image capturing apparatus is manufactured, which has a high sensitivity and high resolution with no color filter or no on-chip microlens required and with no shading generated or no variance in performance between pixel sections. In a solid-state image capturing apparatus 1, a plurality of pixel sections 2 (solid-state image capturing devices), each having light receiving sections 21 to 23 laminated in a depth direction of a semiconductor substrate 3, is repeatedly arranged according to a sequence in a direction along a plane of the semiconductor substrate 3. For incident light, electromagnetic waves having wavelength bands corresponding to the depths of the respective light receiving sections 21 to 23 are detected at the light receiving sections 21 to 23 in accordance with the wavelength dependency of optical absorption coefficient of semiconductor substrate material, and signal charges are generated.

Abstract: A method of manufacturing a photo-detector array device integrated with a read-out integrated circuit (ROIC) monolithically integrated for a laser-radar image signal. A detector array device, a photodiode and control devices for selecting and outputting a laser-radar image signal are simultaneously formed on an InP substrate. In addition, after the photodiode and the control devices are simultaneously formed on the InP substrate, the photodiode and the control devices are electrically separated from each other using a polyamide, whereby a PN junction surface of the photodiode is buried to reduce surface leakage current and improve electrical reliability, and the structure of the control devices can be simplified to improve image signal reception characteristics.

Abstract: An image sensor may include a readout circuit formed over a first substrate made of InSb, the first substrate including a pixel part and a periphery part. A wiring and interlayer dielectric layer may be formed over the first substrate including the readout circuit. A photodiode may be formed over the interlayer dielectric layer and over the pixel part of the first substrate, and an upper electrode layer may be connected with the photodiode.

Abstract: The present invention relates to a semiconductor device comprising a homojunction or a heterojunction with a controlled dopant (concentration) profile and a method of making the same. Accordingly, one aspect of the invention is a method for manufacturing a junction comprising forming a first semiconductor material comprising a first dopant having a first concentration and thereupon; forming a second semiconductor material comprising a second dopant, having a second concentration thereby forming a junction, and depositing by Atomic Layer Epitaxy or Vapor Phase Doping at least a fraction of a monolayer of a precursor suitable to form the second dopant on the first semiconductor material, prior to forming the second semiconductor material, thereby increasing the second concentration of the second dopant at the junction.

Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. The doped regions are created on the substrate, using a mask or without the use of lithography or masks. After the implantation is complete, visual recognition is used to determine the exact region that was implanted. This information can then be used by subsequent process steps to maintain this alignment. This information can also be fed back to the ion implantation equipment to modify the implant parameters. These techniques can also be used in other ion implanter applications.

Abstract: A method for neutralizing trapped charges in a buried oxide layer. The method includes providing a semiconductor structure which includes (a) a semiconductor layer, (b) a charge accumulation layer on top of the semiconductor layer, and (c) a doped region in direct physical contact with the semiconductor layer, wherein the charge accumulation layer comprises trapped charges of a first sign, and wherein the doped region and the semiconductor layer form a P-N junction diode. Next, free charges are generated in the P-N junction diode, wherein the free charges are of a second sign opposite to the first sign. Next, the free charges are accelerated towards the charge accumulation layer, resulting in some of the free charges entering the charge accumulation layer and neutralizing some of the trapped charges in the charge accumulation layer.

Abstract: A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each converter is able to (1) convert received electromagnetic signals into electronic signals, which it then may relay to leads on the device on which it is disposed; and (2) receive electronic signals from leads on the device on which it is disposed and convert them into corresponding electromagnetic signals, which it may transmit to a corresponding converter on the other device. Not having a direct physical connection between the chip and the chip package decreases the inductive and capacitive effects commonly experienced with physical bonds.

Abstract: Strands of active electronic devices (AEDs), such as field-effect transistors, are made by processing a semiconductor substrate so that it yields a number of elongate semiconductor members liberated from the starting substrate. The elongate semiconductor members are secured to wires or wire-like structures so as to form semiconductor-member-on-a-wire composites upon which the AEDs are formed using various deposition and etching techniques. The AED strands have many uses, including the creating of electronic components, including flexible, conformal, rigid and foldable electronics, such as displays and sensors.

Abstract: A semiconductor radiation detector crystal is patterned by using a Q-switched laser to selectively remove material from a surface of said semiconductor radiation detector crystal, thus producing a groove in said surface that penetrates deeper than the thickness of a diffused layer on said surface.

Abstract: A method of manufacturing an image sensor and an image sensor. A method of manufacturing an image sensor may include forming an interlayer dielectric including a metal line on and/or over a semiconductor substrate, forming an image sensing part on and/or over an interlayer dielectric, and/or forming a hard mask in which an opening corresponding to a metal line may be defined on and/or over an image sensing part. A method of manufacturing an image sensor may include performing an etch process to form an auxiliary via hole exposing an inside of an image sensing part, and/or forming a spacer within a auxiliary via hole by an etch byproduct of a hard mask. A method of manufacturing an image sensor may include performing an etch process including a chemical to remove a spacer, and/or etching an image sensing part and/or an interlayer dielectric to form a deep via hole.

Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Abstract: An image sensor and manufacturing method thereof are provided. The image sensor can include a readout circuitry, an interconnection, a second interlayer dielectric, an image sensing device, a contact plug, and a sidewall dielectric. The contact plug can electrically connect the first conductive type layer to the interconnection through a via hole passing through the image sensing device. The sidewall dielectric can be disposed on a sidewall of the second conductive type layer within the via hole.

Abstract: A photoelectric conversion device includes one or more unit cells between a first electrode and a second electrode, in which a semiconductor junction is formed by sequentially stacking: a first impurity semiconductor layer of one conductivity type; an intrinsic non-single-crystal semiconductor layer including an NH group or an NH2 group; and a second impurity semiconductor layer of opposite conductivity type to the first impurity semiconductor layer. In the non-single-crystal semiconductor layer of a unit cell on a light incident side, the nitrogen concentration measured by secondary ion mass spectrometry is 5×1018/cm3 or more and 5×1020/cm3 or less and oxygen and carbon concentrations measured by secondary ion mass spectrometry are less than 5×1018/cm3.

Abstract: A photovoltaic nanostructure according to one embodiment of the present invention includes an electrically conductive nanocable coupled to a first electrode, a second electrode extending along at least two sides of the nanocable, and a photovoltaically active p-n junction formed between the nanocable and the second electrode. A photovoltaic array according to one embodiment includes a plurality of photovoltaic nanostructures as recited above. Methods for forming nanostructures are also presented.

Abstract: A front-surface-illuminated photovoltaic device, having a first semiconductor layer (180) with a back surface, a second semiconductor layer (130) with a front surface, the second layer (130) having the opposite doping type to the first layer (180) and deposited on the first layer (180); and at least one ohmic contact (160, 230) to each of the first (180) and second (130) semiconductor layers; and a process for making the photovoltaic device. The device may also have a barrier layer (190) for reducing diffusion of impurities from the first semiconductor layer (180) into the second semiconductor layer (130), a blocking layer (120), and a reflector layer (200). The device may have an array of first regions (115) in which the second layer (130) is of opposite doping type to that of the first layer (180) and forms p-n junctions (240) in these first regions (115), and second regions (300), each second region (300) containing the barrier layer (190) and the reflector layer (200).

Abstract: A semiconductor device 1 according to one embodiment of the invention includes: a semiconductor thin film having a light incident plane 30b on which a light is incident and a photodiode portion 30a; an interlayer 62 provided above a surface of the semiconductor thin film on an opposite side of the light incident plane 30b and having a convex surface 62a; and a concave reflective layer 70 having a concave surface 70a for reflecting the light toward the photodiode portion 30a.

Abstract: A bonding pad includes a metal layer, a gate insulting layer, a passivation layer, and a transparent conductive layer. The metal layer has a first metal pattern and a second metal pattern which are separated from each other. The gate insulating layer covers the metal layer, and the passivation layer covers the gate insulating layer. The gate insulating layer and the passivation layer have a first contact opening and a second contact opening respectively exposing a portion of the first metal pattern and a portion of the second metal pattern. The transparent conductive layer covers the passivation layer and fills the first and second contact openings. The transparent conductive layer on the second contact opening serves as a testing-probe contact area. The present invention also provides an active device array substrate having the bonding pad.

Abstract: An energy-enhanced, low-temperature growth technique is used for direct deposition of periodic table column III nitrides-based negative electron affinity (NEA) photocathodes on standard glass microchannel plates (MCPs.) As working examples, low-temperature RF plasma-assisted molecular beam epitaxy growth (MBE) of p-type GaN layers on sapphire, quartz, and glass and alumina MCPs and their photoemission characterization is disclosed.

Abstract: A method of fabricating a large area photodiode is provided. The method includes providing a substrate having a first contact layer formed thereon. Also, the method includes forming a dielectric layer on the first contact layer and patterning selective areas of the dielectric layer to form a plurality of dielectric windows. Each of the dielectric windows has an open region exposing the first contact layer. Furthermore, the method includes epitaxially growing photodiode material(s) in the dielectric windows, wherein each of the dielectric windows are individualized photodiode structures.

Abstract: A photodetector 1 according to an embodiment of the present invention includes: an n-type InAs substrate 12; an n-type InAs buffer layer 14 formed on the n-type InAs substrate 12; an n-type InAs light absorbing layer 16 formed on the n-type InAs buffer layer 14; an InAsXPYSb1-X-Y cap layer 18 (X?0, Y>0) formed on the n-type InAs light absorbing layer 16; a first inorganic insulating film 20 formed on the cap layer 18, and having an opening portion 20h in a deposition direction; a p-type impurity semiconductor region 24 formed by diffusing a p-type impurity from the opening portion 20h of the first inorganic insulating film 20, and reaching from the cap layer 18 to an upper layer of the n-type InAs light absorbing layer 16; and a second inorganic insulating film 22 formed on the first inorganic insulating film 20 and on the p-type impurity semiconductor region 24.

Abstract: A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.

Abstract: Embodiments provide an electronic device package and a method for fabricating thereof. A semiconductor chip has a substrate. A supporting brick is separated from the substrate by a certain distance. A bonding pad having a surface is disposed across the substrate and the supporting brick.

Abstract: Electrical devices comprised of nanowires are described, along with methods of their manufacture and use. The nanowires can be nanotubes and nanowires. The surface of the nanowires may be selectively functionalized. Nanodetector devices are described.

Abstract: A semiconductor device that attenuates light to the circuit element area is provided. The semiconductor device includes light-sensitive element area formed on substrate and a circuit element area formed on the substrate. Additionally, a multilayer wiring area is formed on circuit element area. A Tantalum film (which is generally made of tantalum or a tantalum compound) is formed on the surface of the multilayer wiring area to attenuate incident light on circuit element area.

Abstract: A method for forming emitter layer of a solar cell includes preparing a substrate including a first impurity of a first conductive type, diffusing a second impurity of a second conductive type opposite to the first conductive type in the substrate to form a first emitter portion of the emitter layer in the substrate, and selectively heating a portion of the first emitter portion, which corresponds to a position for forming at least one electrode, to form a second emitter portion.

Abstract: A substrate holding unit, a plasma treatment chamber, and a nanoparticle supplying chamber are housed in a single chamber. The substrate holding unit holds a substrate. The plasma treatment chamber includes a gas passage for introducing a source gas to a vicinity of the substrate and a plasma generating unit that generates a plasma from the source gas. The nanoparticle supplying chamber includes a spraying member for spraying a nanoparticle-containing medium onto a surface of the substrate.

Abstract: An infrared emitter, which utilizes a photonic crystal (PC) structure to produce electromagnetic emissions with a narrow hand of wavelengths, includes a semiconductor material layer, a dielectric material layer overlaying the semiconductor material layer, and a metallic material layer having an inner side overlaying the dielectric material layer. The semiconductor material layer is capable of being coupled to an energy source for introducing energy to the semiconductor material layer. An array of surface features are defined in the device in a periodic manner or quasi-periodic. The emitter device is adapted to emit electromagnetic energy having spectral characteristics determined by parameters of the periodically distributed surface features, the parameters including shape, size, depth, distribution geometry, periodicity, material properties and defects.