Abstract: Provided are a method and apparatus for reproducing digital broadcasting. The method includes parsing an input video stream to extract a presentation time stamp (PTS) and a compressed frame and decoding the extracted compressed frame to generate frames sequentially. If a PTS corresponding to a current frame does not exist, a virtual PTS is generated based on the extracted PTS The extracted PTS or the virtual PTS is compared with a system time clock (STC) in synchronization with a vertical synchronization signal and an output time of a display frame is determined.

Abstract: A video horizontal synchronizer outputting a line timing signal and an indicating flag of a received video signal for use in a video signal post-processing unit, including a filter outputting a wide bandwidth filtered and a narrow bandwidth filtered signals of the received video signal, a dynamic slicer threshold generator generating a slicer threshold, a timing recovery circuit generating a phase error and the line timing signal, a phase error statistics circuit averaging the phase error to generate a average phase error, a HSYNC checker generating a matching flag indicating whether a periodic pattern appears in the narrow bandwidth filtered signal according to the line timing signal, and a finite state machine controlling the dynamic slicer threshold generator, the timing recovery circuit, the phase error statistics circuit and the HSYNC checker and generating an indicating flag when the average phase error is small enough and the matching flag is confirmed.

Abstract: A user can become involved in an Event presented to the user by a media stream. Suitable motion and location cameras and other sensors capture characteristics information on objects, environments, and people in the Event, and that information enables a virtual representation of the user to become a player in the media stream of the Event. Views are generated that include images or representations of one or more real objects in a real space and representations of viewers and that enable the viewers to interact with other images or representations of the objects. To put it another way, a viewer can interact with a TV broadcast of a sporting event, such as a baseball game, an automobile race, etc.

Abstract: Timing of internally generated horizontal synchronization signal and vertical synchronization signal is shifted. An internal clock is synchronized with a horizontal synchronization signal separated in a synchronization separation circuit 10, an H reset signal is generated based thereon in an H countdown circuit 14, and a horizontal synchronization signal is generated based thereon. A vertical synchronization signal separated in the synchronization separation circuit 10 is normalized by a 2×FH signal obtained in the H countdown circuit 14, and based on an obtained V reset signal, a vertical synchronization signal is obtained in a VS output circuit 18. Here, the VS output circuit 18 internally has a delay circuit, and the timing of a vertical synchronization signal VS to be output is shifted from that of a horizontal synchronization signal HS.

Abstract: A verbal description method and system. A computing system broadcasts first audio data and video data associated with the first audio data. The computing system determines that the video data comprises a graphic without a description in the first audio data. The computing system receives audible description data associated with the graphic. The computing system generates second audio data comprising the first audio data and the audible description data. The computing system synchronizes portions of the second audio data with associated portions of the video data. The computing system generates synchronized audio/video data comprising the portions of said second audio data aligned with the associated portions of said video data. The computing system broadcasts the synchronized audio/video data.

Abstract: A multimedia processor includes an audio processor configured to process an audio input signal to generate an audio output signal and an assistant signal, and a video processor coupled with the audio processor and configured to process video input signal and the assistant signal to generate a video output signal simultaneously according to the video input signal and the assistant signal. Provided with the assistant signal, the video processor acquires more video processing-related information for rendering video content in a more realistic manner. Mal-motion detection can thus be prevented, and video quality can be improved.

Abstract: A method for processing an analog television signal. A reference signal based on a field synchronizing signal of the analog television signal and equalizing the analog television signal based on the reference signal are determined. The reference signal is determined by calculating a difference between a first part of the field synchronizing signal and a second part of the field synchronizing signal, wherein the first and second parts are selected such that the reference signal is non-zero.

Abstract: An exemplary method includes a video content analysis system capturing a first set of video frames representative of a first video content instance and a second set of video frames representative of a second video content instance, applying a morphing heuristic to at least one of the first and second sets of video frames to result in the first and second sets of video frames having a common aspect ratio, a common resolution, and a common container, frame synchronizing, subsequent to the applying of the morphing heuristic, the first and second sets of video frames, and performing a comparative analysis of the frame synchronized first and second sets of video frames. Corresponding methods and systems are also disclosed.

Abstract: Some demonstrative embodiments include devices, systems and/or methods of wireless video communication. Some embodiments include a wireless video receiver to receive a wireless video transmission including data representing pixels of a video frame and a synchronization signal indicative of a beginning of the video frame, the wireless receiver including a clock generator to generate a pixel clock signal synchronized to the synchronization signal, wherein a clock rate of the pixel clock signal corresponds to a pixel rate of the pixels. Other embodiments are described and claimed.

Abstract: A screen frame transmission method includes a transmitting end capturing screen frame data and transmitting the screen frame data to a receiving end, and detecting for a user's operation and outputting a mode switching signal; a receiving end buffering the screen frame data transmitted by the transmitting end based on which a display device updates its screen, and according to the mode switching signal, switching to the operating mode or the video mode, wherein during the video mode, a longer playback period of the screen frame data are buffered, and during an operating mode, a shorter playback period of the screen frame data are buffered. According to the aforementioned method, during the video mode, the video may be played back smoothly; during the operating mode, a low latency delay control experience may be provided. A receiving device and screen frame transmission system realizing the above method are also disclosed.

Abstract: Briefly, a system time clock (STC) recovery apparatus includes an STC counter that receives a program clock reference (PCR) signal. The STC recovery apparatus also includes a phase lock loop that generates an STC signal having an STC frequency and a fractional divider that generates a modified STC signal by adjusting the STC frequency of the STC signal such that the modified STC signal is provided to the STC counter. The STC clock recovery apparatus further includes a register, such as any suitable memory, which stores a target frequency value and a source frequency value. The target frequency value is the value of the target frequency for the modified STC signal and the source frequency value is the value of the frequency of the STC signal from the phase lock loop.

Abstract: A receiving device includes: a first signal processor, for receiving a radio frequency signal, and converting the radio frequency signal to generate a first signal, where the radio frequency signal includes a plurality of frames; a second signal processor, coupled to the first signal processor, for performing a Fourier transform operation on the first signal according to a synchronization signal to generate an output signal; a first filter, coupled to the first signal processor, for filtering the first signal to generate a second signal; and a synchronization detection circuit, coupled to the first filter, for detecting the second signal to generate the synchronization signal. The first signal includes a channel signal and at least a portion of neighboring channel signals from neighboring channels, and the output signal corresponds to the channel signal.

Abstract: The present invention relates to a main electronic device (1) for communicating within a network (7) comprising an interface (6) for enabling communication within the network (7) and a controller (4) for sending polling messages via the network (7) to logical addresses via said interface (6) in order to request information from at least one further electronic device (1a, 1b . . . 1f). The present invention further relates to a method for operating a main electronic device (1) for communicating within a network (7).

Abstract: Various methods and systems permit digital data, such as video data, audio/video data, audio/video/subpicture data and the like, to be processed in a manner that permits playback at different speeds in both forward and reverse directions. Various embodiments are also directed to handling playback rate changes in a manner that can enhance the user's experience.

Abstract: A synchronizing signal control circuit includes: a phase detecting section configured to detect a phase difference between a display synchronizing signal and an input synchronizing signal; an adding section configured to add a set value for setting a synchronization compensation period and the detected phase difference; a synchronization phase correcting section configured to correct the phase of the input synchronizing signal on the basis of the output signal of the adding section; a gate signal generating section configured to generate a gate signal representing the synchronization compensation period based on the display synchronizing signal; a synchronization determining section configured to determine whether the synchronization can be effected, by detecting whether the input synchronizing signal exists within the synchronization compensation period; and a selecting section configured to perform switching to the corrected input synchronizing signal on the basis of the determination result of the synchron

Abstract: A method and apparatus are described for modifying an analogue video signal to impair its conversion to a digital signal by an analogue to digital converter. The resulting modified signal may prevent the operation of the analogue to digital converter altogether, or, even if a digital signal can be output and recorded, may result in a signal which is difficult to view due to a reduction in quality on playback. The modifications made to the signal include altering the amplitude of the horizontal synchronization pulses in the original signal, and/or modifying the level of the back porch, or the region of the signal adjacent the back porch. Additionally, methods are contemplated for the use of specific response models for target analogue to digital converters, and display devices.

Abstract: In one embodiment, a method can include: determining a topology of digital picture frames in a frame network; identifying a lead picture frame from among the digital picture frames; sending the digital picture frame topology to a client coupled to the lead picture frame; receiving in the lead picture frame and from the client, media content for display on a destination digital picture frame in the frame network; and routing the received media content to the destination digital picture frame using router functionality in at least one of the plurality of digital picture frames.

Abstract: Systems and methods of synchronizing devices may include detecting a movement of a first mobile device and conducting a time synchronization procedure with respect to a second mobile device in response to the movement of the two mobile devices. The time synchronization can be conducted without network infrastructure support at the mobile devices.

Abstract: A display image of a frame is input in time series. An inverse colored image to cancel the display image is generated. The display image is divided into a plurality of subfields, and the inverse colored image is also divided into a plurality of subfields. A time divisional image is generated by disposing a display time of a subfield of the inverse colored image before and after a display time of a corresponding subfield of the display image. While displaying the time divisional image on a screen, a light from the screen is transmitted in synchronization with display timing of the display image in a display time of the time divisional image, and the light is cut off in synchronization with display timing of the inverse colored image in the display time of the time divisional image.

Abstract: A digital driving system for a display includes a scan driver adapted to supply scan signals serially to scan lines of the display, a data driver adapted to supply a first data signal and a second data signal to data lines of the display, a timing controller adapted to control the scan driver and the data driver in accordance with a main clock, and to supply external data to the data driver, and a vertical synchronizing signal synchronizing circuit adapted to synchronize an internal vertical synchronizing signal and an external vertical synchronizing signal.

Abstract: The present invention discloses an source driver circuit scheme for displayer, which comprises a shifter register to register data signal, a line buffer coupled with said shifter register to latch the data signal, a level shifter coupled with line buffer to level output electrical potential, a digital-to-analog converter (DAC) to convert digital signal to analog signal, an output buffer coupled with said digital-to-analog converter (DAC) to output converted signal, and an output control circuit coupled with output buffer. Said output control circuit comprises a D flip-flop and CMOS switching element to output a LP_out signal and control the data signal output of the source driver IC to avoid the power-on noise of the displayer.

Abstract: A display and input appliance may include one or more wireless communication circuits for wirelessly communicating with a functionally associated processing core or engine. The core may include one or more processors adapted to execute an application and to communicate visual output of the application to the appliance through a wireless communication link established between the appliance's communication circuits and one or more wireless communication circuits associated with the core. Communication may be bidirectional—for example: (1) the core may transmit video and audio streams to the appliance, and (2) the appliance may transmit detected user inputs (e.g. touch, accelerometer input, gyroscope input, GPS, etc.) to the core.

Abstract: A mechanism for mitigating undesired color image breakup artifacts arising in display systems that exploit the principle of field sequential color generation. By suitably reducing the time interval during which image information strikes the moving retina, such that the differential position for the respective red, green, and blue components of the image falling upon the moving retina does not exceed the diameter of a retinal cone or rod, the cause of the breakup is negated and the image becomes unitary as expected: the eye sees the image as if all the components arrived at the same time. The truncation of light emission into shorter time frames necessitates a compensatory increase in imaging light intensity, such that the net amount of photonic flux striking the retina, averaged over time, remains unchanged. The mechanism can be applied to systems with discrete red, green, and blue sources as well as to color-wheel-based systems.

Abstract: Embodiments of the invention relate generally to computing devices and systems, software, computer programs, applications, and user interfaces, and more particularly, to synchronizing portions of video as a function of the post-capture generation of synchronization points for audio, the portions of video being captured at multiple cameras.

Abstract: A signal switching apparatus includes: a video reference input block; a plurality of synchronous signal generating blocks; a plurality of video signal input blocks; a signal processing block; a video signal output processing block; a switching block; and a control block.

Abstract: An image display device, a viewing device, and a method for operating the same are provided. The method includes pairing a first viewing device with the image display device; displaying a first image corresponding to a first channel during a first period in synchronization with the first viewing device so that the first image can be viewed with the use of the first viewing device; and displaying a second image during a second period subsequent to the first period in synchronization with the first viewing device so that the second image cannot be viewed with the use of the first viewing device. This allow users to concurrently view different images using different viewing devices on a single image display device.

Abstract: A multimedia device generates and outputs video signals to a display component and an external display device, and includes a video output circuit and a load detection circuit. The load detection circuit isolates and buffers the video output circuit and the load detection circuit, and retrieves horizontal sync signals from the video signals. The load detection circuit further amplifies and integrates the retrieved horizontal sync signals to output direct current signals, and finally compares the direct current signals with a predetermined voltage to output a control signal indicating a connection between the video output circuit and the external display device. The multimedia device turns off the display component according to the control signal indicating that the video output circuit has been connected to the external display device.

Abstract: A method of identifying a target synchronization point pair including a source synchronization point corresponding to a source end and a destination synchronization point corresponding to a destination end is provided. The method includes receiving a source scan-line image corresponding to a first video source from the source end; selecting at least a comparing frame out of the source scan-line image; providing a destination scan-line image corresponding to a second video source at the destination end; and determining the target synchronization point pair by comparing the comparing frame and the destination scan-line image.

Abstract: A H-sync phase locked loop device for TV video signal is provided herein. After the TV video signal is digitalized, clamping and slicing operations are performed on the digitalized TV video signal to respectively generate a clamped signal and a sliced signal. According to the clamped signal and the sliced signal, an H-sync frequency calculator can calculate the falling and rising transients of the H-sync signal and an H-sync frequency is obtained therefrom. Because the H-sync frequency is dynamically adjusted according to the input TV video signal, the phase locking of the input TV video signal can tolerate more deviations of the H-sync by replacing a predetermined H-sync frequency.

Abstract: A display apparatus, display method, image processing apparatus, and image processing method which are capable of allowing a stereoscopic image to be recognized exactly by a left eye and a right eye. The display apparatus includes: an image signal receiving unit which receives an image signal; an image signal processing unit which generates a scanning signal for scanning a left eye image signal and a right eye image signal of the image signal alternately and for scanning a part of the left eye image signal or a part of the right eye image signal between a section for scanning the left eye image signal and a section for scanning the right eye image signal; and an image output unit which displays the image signal according to the scanning signal.

Abstract: A circuit is used to process video signal from a video sensor. The video signal includes video content signal and synchronization signals. The circuit includes a status register, a data register, and a processor. The status register provides a sampling clock signal to the data register and the video sensor. The sampling clock signal is synchronized with the synchronization signals to sample the video signal. The status register stores the synchronization signals. The data register storing the video content signal. The processor is coupled to the status register and the data register. The processor reads the video content signal from the data register according to the synchronization signals in the status register.

Abstract: An image-capturing device includes image-capturing section, an image-data-generation section, and an image capture control section. The image-capturing section is for capturing an image of a subject and starting generating of image-capture data corresponding to a single frame in synchronization with a vertical synchronization signal, The image-data-generation section is for carrying out processing for generating image data showing an image of the subject, on the basis of the image-capture data. The image capture control section is for varying, at a minimum, either a number of pulses of subsignals generated a plurality of times within a period of one cycle of the vertical synchronization signal, or the cycle for generating the vertical synchronization signal.

Abstract: To provide an AV data recording and reproducing apparatus capable of easily carrying out real-time recording and reproducing via a 1394 interface, and method thereof. Input time information relating to one or a plurality of transport packets are stored in the different transport packet; the transport packets and the different transport packet having input time information relating to the transport packets are recorded; and at the same time the transport packet recorded in the recording medium and the different transport packet are read; the different transport packet corresponding to one of a plurality of the recorded transport packets are extracted and the input time is specified; and based on the input time information, the corresponding transport packet is output.

Abstract: A system and method for displaying video images in response to each frame of field-sequential video signals. The system comprises a backlight comprising first, second and third primary color light sources. The backlight is operable to emit light for at most 5.67 milliseconds of each frame (on-time), and to emit no light during the remainder of each frame (off-time). During a portion of the on-time, at least two of the primary color light sources are on simultaneously. For another portion of the on-time, the primary color light sources are on sequentially.

Abstract: A process and device for detecting colon cancer by classifying and annotating clinical features in video data containing colonoscopic features by applying a probabilistic analysis to intra-frame and inter-frame relationships between colonoscopic features in spatially and temporally neighboring portions of video frames, and classifying and annotating as clinical features any of the colonoscopic features that satisfy the probabilistic analysis as clinical features. Preferably the probabilistic analysis is Hidden Markove Model analysis, and the process is carried out by a computer trained using semi supervised learning from labeled and unlabeled examples of clinical features in video containing colonoscopic features.

Abstract: A method of synchronizing the phase of a local image synchronization signal generator of a local video data processor in communication with an asynchronous switched packet network to the phase of a reference image synchronization signal generator of a reference video data processor also coupled to the network, the local and reference processors having respective clocks, the reference and local image synchronization signal generators generating periodic image synchronization signals in synchronism with the reference and local clocks respectively comprises the steps of: frequency synchronizing the local and reference clocks; the reference video data processor sending, via the network, to the local data processor an image timing packet providing reference image synchronization data indicating the difference in timing, measured with respect to the reference processor's clock, between the time at which the image timing packet is launched onto the network and the time of production of a reference image synchroni

Abstract: A reception device is able to receive packets in a communication network comprising at least two stations. The device is capable of receiving packets containing samples of the network which originate from data sampled every period Tsmp, where Tsmp emanates from a time base synchronized on all the stations of the said network; regenerating a counting ramp with the aid of a loop receiving the samples and furthermore delivering local samples every period Tsmp and a clock. The phase-locked loop comprises: a samples comparator comparing the samples and the local samples and delivering an error signal; a corrector receiving the signal and delivering a corrected error signal, the corrector having a static gain equal to 1; a digital oscillator receiving the corrected error signal and delivering the clock, which has a frequency dependent on the signal and is proportional to a gain.

Abstract: The invention provides an apparatus, system and method for allowing multiple television (TV) sets to communicate with each other in synchronizing their audiovisual signal output (when set to the same TV channel) to allow simultaneous viewing of common programming content.

Abstract: In a communication system in which a transmitting device transmits a video signal to a receiving device, one or both of these devices includes a beacon analyzer that analyzes beacon signals transmitted by other wireless systems operating in the same frequency band and predicts periods during which beacon transmission is expected. During these predicted periods, video transmission is suspended and the video signal is stored in a buffer in the transmitting device. At the end of each predicted period, the stored video signal is read from the buffer and transmitted without horizontal and vertical blanking periods until the buffering delay is made up. The receiving device displays the received video signal with standard video timing. A normal unbroken video picture is thereby obtained despite beacon interference.

Abstract: An apparatus having a complex sine wave generating circuit (3) that generates a complex sine wave, a multiplying circuit (4) that multiplies an input signal by the complex sine wave, a first integrating circuit (5) that integrates the product obtained by the multiplying circuit (4) in the time direction, a first squaring circuit (6) that takes the square of the absolute value of a complex signal output by the first integrating circuit (5), a second squaring circuit (7) that takes the square of the absolute value of the instantaneous amplitude of the input signal, a second integrating circuit (8) that integrates the results obtained by the second squaring circuit (7) in the time direction, and a frequency difference calculating circuit (9) that finds the difference between the frequency of the input signal and the oscillation frequency of the complex sine wave on the basis of the ratio between the output signal level of the first squaring circuit (6) and the output signal level of the second integrating circui

Abstract: A method and an apparatus for synchronizing a data stream are disclosed. The method comprises: decoding the data stream to generate a decoded data stream and program clock references; generating a local clock reference; generating a simulated clock reference according to the program clock references and the local clock reference; comparing the local clock reference with the simulated clock reference; adjusting a processing timing of the decoded data stream according to the comparison result; and processing the decoded data stream according to the processing timing.

Abstract: The display controller includes a decoder, a control circuit, and a video output logic circuit. The decoder is configured to decode a first display command and output a decoding signal and first synchronizing information indicating the first display command is received. The control circuit is configured to generate a first control signal based on second synchronizing information and the decoding signal. The second synchronizing information is output from a second display controller and indicates a second display command is received. The video output logic circuit is configured to send a part of video data stored in a video source and a plurality of first timing control signals for displaying the part of the video data on a display to the display based on the first control signal.

Abstract: A system for minimizing signals for video data communication is provided. The system comprises a first interface for selecting at least one video signal for transmission via a video data vector based on a data enable signal and a second interface for outputting at least one video signal from the video data vector based on the data enable signal.

Abstract: According to one embodiment, an image processing device includes a control signal generator, a selector, a memory, and a combined image generator. The control signal generator is configured to detect a synchronization pulse from a vertical synchronization signal in each of a plurality of video signals and configured to generate a first control signal indicative of selecting one video signal of the plurality of video signals of which the synchronization pulse is detected in turn for a predetermined period. The selector is configured to select the one video signal of the plurality of video signals according to the first control signal. The memory is configured to store the selected video signal in one region of a plurality of regions corresponding to the selected video signal in a predetermined format. The combined image generator is configured to generate a combined image by combining the plurality of video signals stored in the plurality of regions.

Abstract: The invention relates to a method and to a device for determining the value of a delay to be applied between sending a first dataset and sending a second dataset, the data being representative of a sequence of coded images, the datasets consisting of data subsets, the coded images being coded according to a first level of resolution and at least a second level of resolution higher than the first level of resolution, the data subsets containing data of a first level of resolution. According to the invention: first and second datasets are obtained (E506); and the value of the delay is determined (E507), the value of the delay being dependent on the number of decoded images that can be formed from the data subsets of the first dataset which contain data of the second or of a second level of resolution.

Abstract: Systems and methods are described herein that cause data from asynchronous data sources to be provided with a timestamp that corresponds to a common time base. A trigger board can be used to control synchronized data sources, and can generate timestamps when data is collected by the synchronized data sources. Unsynchronized data sources can generate data independent of the trigger board. System timestamps are generated each time data from the synchronized data source and the unsynchronized data source is received. Values of the system timestamp can be modified, and can be replaced by timestamps that correspond to the time base used by the trigger board.

Abstract: A screen synchronous control apparatus includes a reference timing transmitting unit 3 for transmitting a reference timing signal about display of a plurality of display screens 11, 12, and 13 at predetermined intervals, a display control unit 1 for transmitting a drawing instruction for displaying display data on the plurality of display screens 11, 12, and 13, and a plurality of display processing units 101, 201, and 301 each for receiving the drawing instruction transmitted from the display control unit 1, for executing the drawing instruction according to the reference timing signal transmitted from the reference timing transmitting unit 3, and for displaying the display data on the corresponding one of the display screens 11, 12, or 13.

Abstract: The invention relates to electronic equipment (2) capable of presenting a demonstration routine. The electronic equipment comprises a processing unit for receiving and processing a synchronization signal and a memory for storing a demonstration routine. The processing unit is adapted for presentation of the demonstration routine in accordance with the synchronization signal. A synchronous presentation of the demonstration routine may thereby be achieved on an ensemble of electronic equipment. In an embodiment the electronic equipment is an ensemble of TV-sets synchronously presenting an electronic sticker (3) overlaid on the display.

Abstract: The invention provides a frequency and data synchronization control system through the 8VSB SFN DTx modulation to prevent the deterioration of the digitally broadcasted receiving sensitivity caused by a discrepancy of the frequency or data between the receiver of the digital broadcasting signal and the distributed translator or between distributed translators. The invention can synchronize the frequency signal and data signal of the distributed translators, while maintaining optimum receiving sensitivity through the assumed combination of the OCXO phase lock clock, which is synchronized with the recovered 8VSB symbol clock, and the Trellis Encoder Memory in the DTx Translator Exciter.

Abstract: An application for transmission of a three-dimensional eyewear synchronization signal to synchronize the operation of shutters of three-dimensional eyewear uses an industry standard wireless transmission technique. To compensate for inherent latencies of such transmission techniques, the latencies are measured and monitored to determine expected latencies and the shutter synchronization signal is skewed by the latency. In some embodiments, the synchronization signal is further adjusted by a user skew control.