Abstract: A method of growing semiconductor materials in the Indium, Aluminium, Gallium Nitride (InAlGaN) material system and to devices made therefrom, in particular optical devices in the ultraviolet to green region of the visible spectrum. Certain optical devices, for example Vertical Cavity Surface Emitting Lasers (VCSELs) require great precision in the thickness of certain semiconductor layers. One aspect of the present invention provides a gallium-rich group III nitride layer (200, 201) and an adjacent layer of AlxInyGa1-x-yN layer (202). The AlxInyGa1-x-yN layer (202) acts as a fabrication facilitation layer and is selected to provide a good lattice match and high refractive index contrast with the gallium-rich group III nitride layer (200, 201). The high refractive index contrast permits in-situ optical monitoring. The extra layer (202) can be used as an etch marker or etch stop layer in subsequent processing and may be used in a lift-off process.

Abstract: Disclosed is a group III nitride compound semiconductor device having a substrate, buffer layers on the substrate, and a group III nitride compound semiconductor layer on the top layer of the buffer layers. The buffer layers comprises a first buffer layer formed on the substrate and a second buffer layer formed on the first buffer layer. The first buffer layer is made of transition metal nitride, and the second buffer layer is made of nitride of gallium and a transition metal.

Abstract: Methods for producing nanostructures, particularly Group III-V semiconductor nanostructures, are provided. The methods include use of novel Group III and/or Group V precursors, novel surfactants, oxide acceptors, high temperature, and/or stable co-products. Related compositions are also described. Methods and compositions for producing Group III inorganic compounds that can be used as precursors for nanostructure synthesis are provided. Methods for increasing the yield of nanostructures from a synthesis reaction by removal of a vaporous by-product are also described.

Abstract: Disclosed herein is a technique for forming a high quality ohmic contact utilizable in the fabrication of short-wavelength light emitting diodes (LEDs) emitting blue and green visible light and ultraviolet light, and laser diodes (LDs) using a gallium nitride (GaN) semiconductor. The ohmic contact is formed by depositing a nickel (Ni)-based solid solution on top of a p-type gallium nitride semiconductor. The ohmic contact thus formed has an excellent current-voltage characteristic and a low specific contact resistance due to an increased effective carrier concentration around the surface of the gallium nitride layer, as well as a high transmittance in the short-wavelength region.

Abstract: An alternating current light-emitting device and the fabrication method thereof is disclosed. The alternating current light-emitting device includes at least one alternating current micro-die light-emitting module formed on a substrate and composed of at least two micro-dies connected to one another. The micro-dies, each includes at least two active layers, are electrically connected by a conductive structure, such that the active layers of the micro-dies take turns emitting light during positive and negative half cycles of alternating current, thereby providing a full-scale light-emitting area for all-time light emission.

Abstract: A semiconductor optical amplification device is disclosed that has a gain spectrum of a wide bandwidth. The semiconductor optical amplification device includes an InP substrate and an active layer on the InP substrate. The active layer has a quantum well structure formed by alternately stacking a barrier layer and a well layer, the barrier layer is formed from a tensile-strained InGaAs film, and the well layer is formed from a compressively-strained InGaAs film.

Abstract: Methods are disclosed of fabricating a compound nitride semiconductor structure. A substrate is disposed over a susceptor in a processing chamber, with the susceptor in thermal communication with the substrate. A group-III precursor and a nitrogen precursor are flowed into the processing chamber. The susceptor is heated with a nonuniform temperature profile to heat the substrate. A nitride layer is deposited over the heated substrate with a thermal chemical vapor deposition process within the processing chamber using the group-III precursor and the nitrogen precursor.

Abstract: A method of manufacturing a light emitting diode includes forming an active layer of a nitride semiconductor on a first conductive type of a nitride semiconductor layer, thermally treating the active layer at a first temperature, and forming a second conductive type of a nitride semiconductor layer on the active layer at a second temperature lower than the first temperature.

Abstract: The object of the invention is to reduce the deterioration of crystallinity in the vicinity of an active layer when C, which is a p-type dopant, is doped and to suppress the diffusion of Zn, which is a p-type dopant, into an undoped active layer, thus to realize a sharp doping profile. When a Zn-doped InGaAlAs layer having favorable crystallinity is provided between a C-doped InGaAlAs upper-side guiding layer and an undoped active layer, the influence of the C-doped InGaAlAs layer whose crystallinity is lowered can be reduced in the vicinity of the active layer. Further, the Zn diffusion from a Zn-doped InP cladding layer can be suppressed by the C-doped InGaAlAs layer.

Abstract: A semiconductor device which includes a laterally extending stack of laterally adjacent conductive semiconductor regions formed over a support surface of a substrate, and a method for fabricating the device.

Abstract: A semiconductor device includes a semiconductor substrate including silicon and an oxide layer on the substrate. The oxide layer includes silicon. An interfacial dielectric layer is disposed on the oxide layer opposite the substrate. The interfacial dielectric layer includes HfO2, ZrO2, a zirconium silicate alloy, and/or a hafnium silicate alloy having a thickness between about 0.5 nm and 1.0 nm. A primary dielectric layer is disposed on the interfacial dielectric layer opposite the substrate. The primary dielectric layer includes AlO3; TiO2; a group IIIB or VB transition metal oxide; a trivalent lanthanide series rare earth oxide; a silicate alloy; an aluminate alloy; a complex binary oxide having two transition metal oxides and/or a complex binary oxide having a transition metal oxide and a lanthanide rare earth oxide. A thickness of the primary dielectric layer is at least about five times greater than the thickness of the interfacial dielectric layer.

Abstract: A gallium nitride crystal with a polyhedron shape having exposed {10-10} m-planes and an exposed (000-1) N-polar c-plane, wherein a surface area of the exposed (000-1) N-polar c-plane is more than 10 mm2 and a total surface area of the exposed {10-10} m-planes is larger than half of the surface area of (000-1) N-polar c-plane. The GaN bulk crystals were grown by an ammonothermal method with a higher temperature and temperature difference than is used conventionally, and using an autoclave having a high-pressure vessel with an upper region and a lower region. The temperature of the lower region of the high-pressure vessel is at or above 550° C., the temperature of the upper region of the high-pressure vessel is set at or above 500° C., and the temperature difference between the lower and upper regions is maintained at or above 30° C. GaN seed crystals having a longest dimension along the c-axis and exposed large area m-planes are used.

Abstract: The object of the present invention is to provide a semiconductor element containing an n-type gallium nitride based compound semiconductor and a novel electrode that makes an ohmic contact with the semiconductor. The semiconductor element of the present invention has an n-type Gallium nitride based compound semiconductor and an electrode that forms an ohmic contact with the semiconductor, wherein the electrode has a TiW alloy layer to be in contact with the semiconductor. According to a preferable embodiment, the above-mentioned electrode can also serve as a contact electrode. According to a preferable embodiment, the above-mentioned electrode is superior in the heat resistance. Moreover, a production method of the semiconductor element is also provided.

Abstract: An AlGaN composition is provided comprising a group III-Nitride active region layer, for use in an active region of a UV light emitting device, wherein light-generation occurs through radiative recombination of carriers in nanometer scale size, compositionally inhomogeneous regions having band-gap energy less than the surrounding material. Further, a semiconductor UV light emitting device having an active region layer comprised of the AlGaN composition above is provided, as well as a method of producing the AlGaN composition and semiconductor UV light emitting device, involving molecular beam epitaxy.

Abstract: Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain zinc and monolayers that contain magnesium are deposited onto a substrate and subsequently processed to form magnesium-doped zinc oxide. The resulting transparent conducing oxide includes properties such as an amorphous or nanocrystalline microstructure. Devices that include transparent conducing oxides formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.

Abstract: The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode 22 formed on the n-GaN cap layer 18; a gate electrode 26 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; a first protection layer 24 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; and a second protection layer 30 buried in an opening 28 formed in the first protection layer 24 between the gate electrode 26 and the drain electrode 22 down to the n-GaN cap layer 18 and formed of an insulation film different from the first protection layer.

Abstract: Various embodiments proved a buffer layer that is grown over a silicon substrate that provides desirable isolation for devices formed relative to III-V material device layers, such as InSb-based devices, as well as bulk thin film grown on a silicon substrate. In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate. In addition, the buffer layer addresses and mitigates lattice mismatches between the film relative to which the transistor is formed and the silicon substrate.

Abstract: A memory device utilizing a phase change material as the storage medium, the phase change material based on antimony as the solvent in a solid solution.

Abstract: A semiconductor device composed of III-nitride materials is produced with epitaxial growth that permits vertical and lateral growth geometries to improve device characteristics. The resulting device has a greater breakdown voltage due to the greater integrity of the semiconductor material structure since no ion implantation processes are used. The epitaxially grown layers also exhibit greater thermal conductivity for improved operation with power semiconductor devices. The device may include a laterally grown charge compensated area to form a superjunction device. The resulting device may be bidirectional and have improved breakdown voltage in addition to higher current capacity for a given voltage rating.

Abstract: An amorphous silicon (Si) film is taken to form a metal silicide of Si—Al(aluminum) under a high temperature. Al atoms is diffused into the amorphous Si film for forming the metal silicide of Si—Al as nucleus site. Then through heating and annealing, a microcrystalline or nano-crystalline silicon thin film is obtained. The whole process is only one process and is done in only one reacting chamber.

Abstract: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. The III-V crystals are obtained by manufacturing method characterized in including: a step of depositing a metal film (2) on a substrate (1); a step of heat-treating the metal film (2) in an atmosphere in which a patterning compound is present; and a step of growing a group III-V crystal (4) on the metal film after the heat treatment. Alternatively, the III-V crystal manufacturing method is characterized in including: a step of growing a group III-V compound buffer film on the metal film after the heat treatment; and a step of growing a group III-V crystal on the group III-V compound buffer film.

Abstract: A semiconductor device comprising: a substrate; a first contact; a first layer of doped semiconductor material deposited on the substrate; a semiconductor junction region deposited on the first layer; a second layer of doped semiconductor material deposited on the junction region, the second layer having opposite semiconductor doping polarity to that of the first layer; and a second contact; wherein the second contact is in electrical communication with the second layer and the first contact is embedded within the semiconductor device between the substrate and the junction region and is in electrical communication with the first layer; and processes for manufacture of an embedded contact semiconductor device.

Abstract: Oxygen is doped in a quantum well active layer. First, an n-type In0.02Ga0.98N barrier layer 550 of 10 nm is formed by supplying TMG at 10 sccm, TMI at 30 sccm, O2 at 20 sccm, and NH3 at 10 slm, on the n-type GaN optical guide layer 405. Next, a molar flow rate of TMI is increased to 50 sccm, and an undoped In0.2Ga0.8N well layer 553 of 3 nm is formed. This process is repeated three cycles, and finally, the process is completed with the n-type In0.02Ga0.98N barrier layer 550. A p-type Al0.2Ga0.8N cap layer 407 whose thickness is 20 nm is formed by supplying TMG at 15 sccm, TMA at 5 sccm, and (EtCp)2Mg at 5 sccm and NH3 at 10 slm, on a multi-quantum well structure active layer 420 formed in this way.

Abstract: Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.

Abstract: A nitride semiconductor stacked structure having good working efficiency includes a p-type nitride semiconductor layer of low resistance, which is formed from an organometallic compound, compounds including Group V elements, including ammonia and a hydrazine derivative, and a p-type impurity material on a substrate. The p-type nitride layer has a carbon concentration not higher than 1×1018 cm?3.

Abstract: The present invention relates to a structure and a manufacturing method of epitaxial layers of gallium nitride-based compound semiconductors with less dislocation densities. Surface treatment is carried out first on the surface of a substrate using reaction precursors Cp2Mg and NH3. Then a gallium nitride-based buffer layer is formed on the substrate to form a semiconductor epitaxial structure with an interface layer or an interface zone between the substrate and the buffer layer. The structure can reduce effectively the dislocation density formed in the gallium nitride-based epitaxial layer on top of the gallium nitride-based buffer layer. Thereby, high-quality epitaxial layers tend to be attained and the uniformity of the dislocation density can be enhanced.

Abstract: A contact is formed on indium-phosphide material. Regions of the indium-phosphide material are exposed. An energetic bombardment is performed on exposed regions of the indium-phosphide material. Metal is deposited on the exposed regions of the indium-phosphide material where energetic bombardment occurred.

Abstract: A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of a triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, where in each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.

Abstract: Semi-insulating Group III nitride layers and methods of fabricating semi-insulating Group III nitride layers include doping a Group III nitride layer with a shallow level p-type dopant and doping the Group III nitride layer with a deep level dopant, such as a deep level transition metal dopant. Such layers and/or method may also include doping a Group III nitride layer with a shallow level dopant having a concentration of less than about 1×1017 cm?3 and doping the Group III nitride layer with a deep level transition metal dopant. The concentration of the deep level transition metal dopant is greater than a concentration of the shallow level p-type dopant.

Abstract: A method for improving Mg doping of Group III-N materials grown by MOCVD preventing condensation in the gas phase or on reactor surfaces of adducts of magnesocene and ammonia by suitably heating reactor surfaces between the location of mixing of the magnesocene and ammonia reactants and the Group III-nitride surface whereon growth is to occur.

Abstract: Affords methods of surface treating a substrate and of manufacturing Group III-V compound semiconductors, in which a substrate made of a Group III-V semiconductor compound is rendered stoichiometric, and microscopic roughness on the surface following epitaxial growth is reduced. The methods include preparing a substrate made of a Group III-V semiconductor compound (S10), and cleaning the substrate with a cleaning solution whose pH has been adjusted to an acidity of 2 to 6.3 inclusive, and to which an oxidizing agent has been added (S20).

Abstract: A method for fabricating transistors such as high electron mobility transistors, each transistor comprising a plurality of epitaxial layers on a common substrate, method comprising: (a) forming a plurality of source contacts on a first surface of the plurality of epitaxial layers; (b) forming at least one drain contact on the first surface; (c) forming at least one gate contact on the first surface; (d) forming at least one insulating layer over and between the gate contacts, source contacts and the drain contacts; (e) forming a conductive layer over at least a part of the at least one insulating layer for connecting the source contacts; and (f) forming at least one heat sink layer over the conductive layer.

Abstract: A semiconductor device and a manufacturing method thereof are provided which enable reduction and enhanced stability of contact resistance between the back surface of a nitride substrate and an electrode formed thereover. A nitride semiconductor device includes an n-type GaN substrate (1) over which a semiconductor element is formed, and an n-electrode (10) as a metal electrode formed over the back surface of the GaN substrate (1). A connection layer (20) is formed between the GaN substrate (1) and the n-electrode (10), and the connection layer (20) is composed of a material that is other than nitride semiconductors and that contains silicon.

Abstract: A process for fabricating a III-nitride power semiconductor device which includes forming a gate structure while providing a protective body over areas that are to receive power electrodes.

Abstract: An integrated circuit and a method for making an integrated circuit is disclosed. In one embodiment, at least one contact of an electrically conductive material is formed on a substrate. A layer is disposed on the substrate to a predetermined height of the contact. An electrically conductive via hole is provided in the layer by the contact.

Abstract: A semiconductor device and a method of manufacturing such a semiconductor device having a field effect transistor with improved current driving performance (e.g., an increase of drain current) of the field effect transistor comprising the steps of ion implanting an element from the main surface to the inside of a silicon layer as a semiconductor substrate to a level shallower than the implantation depth of the impurities in the step of forming the semiconductor region before the step of ion implanting impurities from the main surface to the inside of the silicon layer as a semiconductor substrate to form the semiconductor region being aligned with the gate electrode.

Abstract: A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portions are removed. After removing the photoresist portions, the second layer is used to modify the substrate to create at least a portion of the semiconductor device.

Abstract: A method of growing a p-type nitride semiconductor material having magnesium as a p-type dopant by molecular beam epitaxy (MBE), comprises supplying ammonia gas, gallium and magnesium to an MBE growth chamber containing a substrate so as to grow a p-type nitride semiconductor material over the substrate. Magnesium is supplied to the growth chamber at a beam equivalent pressure of at least 1 10-9 mbar, and preferably in the range from 1 10-9 mbar to 1 10-7 mbar during the growth process. This provides p-type GaN that has a high concentration of free charge carriers and eliminates the need to activate the magnesium dopant atoms by annealing or irradiating the material.

Abstract: Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, <001> III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substrate surface by effectively inhibiting growth in the preferential <111>B direction. As one example, <001> InP nano-wires were grown by metal-organic vapor phase epitaxy directly on (001) InP substrates. Characterization by scanning electron microscopy and transmission electron microscopy revealed wires with nearly square cross sections and a perfect zincblende crystalline structure that is free of stacking faults.

Abstract: A crystalline thin structure (104, 204, 404) is grown on a surface (108, 228) of a substrate (112, 208, 400) by depositing molecules (136, 220) from a molecular precursor to a lateral growth front (144, 224) of the structure using a crystal grower (116, 200). In one embodiment, the crystal grower comprises a solution (124) containing the molecular precursor in a solvent (140). Molecules are added to the lateral growth front by moving one or both of the free surface (120, 120?) of the solution and deposition surface relative to the other at a predetermined rate. In another embodiment, the crystal grower comprises a mask (212) that includes at least one opening (216). Precursor molecules are vacuum deposited via a molecular beam (236) at the growth front (228) of the crystalline thin structure (204) as one or both of the opening and surface are moved relative to the other at a predetermined rate.

Abstract: The present disclosure relates to the use of III-nitride wide bandgap semiconductor materials for optical communications. In one embodiment, an optical device includes an optical waveguide device fabricated using a III-nitride semiconductor material. The III-nitride semiconductor material provides for an electrically controllable refractive index. The optical waveguide device provides for high speed optical communications in an infrared wavelength region. In one embodiment, an optical amplifier is provided using optical coatings at the facet ends of a waveguide formed of erbium-doped III-nitride semiconductor materials.

Abstract: A method of growing planar non-polar m-plane III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane silicon carbide (m-SiC) substrate, using metalorganic chemical vapor deposition (MOCVD). The method includes performing a solvent clean and acid dip of the substrate to remove oxide from the surface, annealing the substrate, growing a nucleation layer such as an aluminum nitride (AlN) on the annealed substrate, and growing the non-polar m-plane III-Nitride epitaxial layer on the nucleation layer using MOCVD.

Abstract: A process for preparing a nitride based semiconductor device in accordance with the present invention comprises growing a high temperature AlN single crystal layer on a substrate; growing a first GaN layer on the high temperature AlN single crystal layer in a first V/III ratio, under a first pressure of 300 Torr or more, such that the predominant direction of growth is the lateral direction; and growing a second GaN layer on the first GaN layer in a second V/III ratio lower than the first V/III ratio, under a second pressure lower than the first pressure such that the predominant direction of growth is the lateral direction.

Abstract: A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In. The second III-V compound semiconductor layer is formed over the first III-V compound semiconductor layer and growing an InP layer at regions adjacent the stacked structure to form a stepped structure of InP. The process further includes the step of wet-etching the stepped structure and the second III-V compound semiconductor layer using an etchant containing hydrochloric acid and acetic acid to remove at least the second III-V compound semiconductor layer.

Abstract: A method of manufacturing a group III-V crystal is made available by which good-quality group III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. A method of manufacturing a group III-V crystal, characterized in including: a step of depositing a metal film (2) on a substrate (1); a step of heat-treating the metal film (2) in an atmosphere in which a patterning compound is present; and a step of growing a group III-V crystal (4) on the metal film after the heat treatment. Additionally, a method of manufacturing a group III-V crystal, characterized in including: a step of growing a group III-V compound buffer film on the metal film after the heat treatment; and a step of growing a group III-V crystal on the group III-V compound buffer film.

Abstract: A method of making a semiconductor device includes providing a laminate substrate made by bonding a II-VI or III-V semiconductor laminate film to a support substrate, and preparing the laminate film to enable growth of a II-VI or III-V semiconductor device layer on the laminate substrate.

Abstract: This invention provides a process for growing Ge epitaxial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaxial layers by using metal organic chemical vapor deposition (MOCVD). The process comprises steps of, firstly, pre-cleaning a silicon wafer in a standard cleaning procedure, dipping it with HF solution and prebaking to remove its native oxide layer. Then, growing a high Ge-composition epitaxial layer, such as Si0.1Ge0.9 in a thickness of 0.8 ?m on said Si substrate by using ultra-high vacuum chemical vapor deposition under certain conditions. Thus, many dislocations are generated and located near the interface and in the low of part of Si01.Ge0.9 due to the large mismatch between this layer and Si substrate. Furthermore, a subsequent 0.8 ?m Si0.05Ge0.95 layer, and/or optionally a further 0.8 ?m Si0.02Ge0.98 layer, are grown.

Abstract: MBE nitrogen sources of dimethylhydrazine, tertiarybutlyhydrazine, nitrogentrifloride, and NHx radicals. Those nitrogen sources are beneficial in forming nitrogen-containing materials on crystalline subtrates using MBE. Semiconductor lasers in general, and VCSEL in particular, that have nitrogen-containing layers can be formed using such nitrogen sources.

Abstract: A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V reactant or a group VI reactant. The group III reactant or the group II reactant is introduced into a growth chamber at an elevated growth temperature to wet a substrate surface prior to any actual crystal growth. Once the pre-treatment of the surface is complete, a group V reactant or a group VI reactant is introduced to the growth chamber to commence the deposition of a nucleation layer. A buffer layer is then grown on the nucleation layer providing a surface upon which the epitaxial layer is grown preferably without changing the temperature within the chamber.

Abstract: In a semiconductor light-emitting element, an underlayer is composed of a high crystallinity AlN layer having a FWHM in X-ray rocking curve of 90 seconds or below, and a first cladding layer is composed of an n-AlGaN layer. A light-emitting layer is composed of a base layer made of i-GaN and plural island-shaped single crystal portions made of i-AlGaInN isolated in the base layer.