Abstract: The present disclosure provides a method for making metal gate stacks of a semiconductor device. The method includes applying a first etching process to the substrate to remove a polysilicon layer and a metal gate layer on the substrate; applying a diluted hydrofluoric acid (HF) to the substrate to remove polymeric residue; thereafter applying to the substrate with a cleaning solution including hydrochloride (HCl), hydrogen peroxide (H2O2) and water (H2O); applying a wet etching process diluted hydrochloride (HCl) to the substrate to remove a capping layer; and applying to the substrate with a second etching process to remove a high k dielectric material layer.

Abstract: A catalyst-aided chemical processing method is a novel processing method having a high processing efficiency and suited for processing in a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: immersing a workpiece in a processing solution in which a halogen-containing molecule is dissolved, said workpiece normally being insoluble in said processing solution; and bringing a platinum, gold or ceramic solid catalyst close to or into contact with a processing surface of the workpiece, thereby processing the workpiece through dissolution in the processing solution of a halogenide produced by chemical reaction between a halogen radical generated at the surface of the catalyst and a surface atom of the workpiece.

Abstract: A method for forming a fine pattern of a semiconductor device includes forming a first hard mask layer over a semiconductor substrate, forming a second hard mask layer pattern over the first hard mask layer, forming a spacer on a sidewall of the second hard mask layer pattern, selectively etching the first hard mask layer by using the spacer and the second hard mask layer pattern as an etching mask to form a first hard mask layer pattern, forming a first insulating film filling the second hard mask layer pattern and the first hard mask layer pattern, selectively etching the second hard mask layer pattern and the underlying first hard mask layer pattern to form a third hard mask layer pattern, removing the first insulating film and the spacer, and patterning the semiconductor substrate by using the third hard mask layer pattern as an etching mask to form a fine pattern.

Abstract: Methods for forming connective elements on integrated circuits for packaging applications are provided herein. In some embodiments, a method of forming connective elements on an integrated circuit for flipchip packaging may include providing a resist layer on the integrated circuit; forming a plurality of holes through the resist layer; filling the plurality of holes with conductive material; and stripping at least a portion of the resist layer using a stripping solution containing acetic anhydride and ozone to expose the connective elements.

Abstract: A method of fabricating integrated circuits is described. A multi-material hard mask is formed on an underlying layer to be patterned. In a first patterning process, portions of the first material of the hard mask are etched, the first patterning process being selective to etch the first material over the second material. In a second patterning process, portions of the second material of the hard mask are etched, the second patterning process being selective to etch the second material over the first material. The first and second patterning processes forming a desired pattern in the hard mask which is then transferred to the underlying layer.

Abstract: The present disclosure suggests apparatus and methods that can be used to chemically process microfeature workpieces, e.g., semiconductor wafers. One implementation of the invention provides a method in which a surface of a microfeature workpiece is contacted with an etchant liquid. The wall of the processing chamber may be highly transmissive of an operative wavelength range of radiation, but the etchant liquid is absorptive of the operative wavelength range. The etchant liquid is heated by delivering radiation through the wall of a processing chamber. This permits processing chambers to be formed of materials (e.g., fluoropolymers) that cannot be used in conventional systems that must conduct heat through the wall of the processing chamber.

Abstract: A method of manufacturing a semiconductor device of the present invention has the steps of forming a pattern made of a processed film or a resist on a substrate, washing the pattern with a washing liquid which is a liquid including at least water, spreading an amphiphilic material that has a hydrophilic group and a hydrophobic group on the surface of the washing liquid remaining on the substrate after washing the pattern, and drying the substrate to remove the washing liquid on the substrate after spreading the amphiphilic material. When moisture is removed in the drying step, molecules of the amphiphilic material are spread on the surface of the washing liquid, so that the surface tension of the washing liquid is reduced to prevent the pattern from inclining.

Abstract: For providing a flexible printed circuit board in which the distance between each of plural wiring patterns is a desired distance by cutting the flexible printed circuit board having plural wiring patterns, plural wiring patterns are formed so as to extend on the surface of an electrically insulative base film, and each of the plural wiring patterns is formed so as to include a portion where the distance between each of them is narrowed along the extending direction of the base film.

Abstract: A surface texturization process for a silicon wafer, which is applied to a method for making a solar cell, is provided. The surface texturization process substantially comprises: 1) providing an acidic mixed solution; 2) immersing the silicon wafer in the acidic mixed solution; and 3) etching the acidic mixed solution for a predetermined time section. The mixed acidic solution includes nitric acid and ammonium fluoride and a predetermined mixture selecting from the group consisting of phosphoric acid, sulfuric acid or acetic acid.

Abstract: A method of forming an impurity-introduced layer is disclosed. The method includes at least a step of forming a resist pattern on a principal face of a solid substrate such as a silicon substrate (S27); a step of introducing impurity into the solid substrate through plasma-doping in ion mode (S23), a step of removing a resist (S28), a step of cleaning metal contamination and particles attached to a surface of the solid substrate (S25a); a step of anneal (S26). The step of removing a resist (S28) irradiates the resist with oxygen-plasma or brings mixed solution of sulfuric acid and hydrogen peroxide water, or mixed solution of NH4OH, H2O2 and H2O into contact with the resist. The step of cleaning (S25a) brings mixed solution of sulfuric acid and hydrogen peroxide water, or mixed solution of NH4OH, H2O2 and H2O into contact with the principal face of the solid substrate.

Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.

Abstract: A method of making a light emitting element, the light emitting element with a semiconductor layer represented by: AlXInYGa1?X?YN (0?X?1, 0?Y?1, 0?X+Y?1), has the step of wet-etching a surface of the semiconductor layer by using an etching solution to have a roughened surface on the semiconductor layer. The wet-etching is conducted without irradiating the surface of the semiconductor layer with a light with a wavelength region corresponding to energy higher than bandgap energy of the semiconductor layer.

Abstract: The cleaning of silicon carbide materials on a large-scale is described. Certain silicon carbide materials in the form of wafer-lift pins, wafer-rings and/or wafer-showerheads are cleaned by using a combination of two of more of the following steps, comprising: high temperature oxidation, scrubbing, ultrasonic assisted etching in an aqueous acid solution, ultrasonication in deionized water, immersion in an aqueous acid solution, and high temperature baking. The silicon carbide materials may either be sintered or formed by chemical vapor deposition.

Abstract: A T-shaped gate structure and method for forming the same the method including providing a semiconductor substrate comprising at least one overlying sacrificial layer; lithographically patterning a resist layer overlying the at least one sacrificial layer for etching an opening; forming the etched opening through a thickness of the at least one sacrificial layer to expose the semiconductor substrate, said etched opening comprising a tapered cross section having a wider upper portion compared to a bottom portion; and, backfilling the etched opening with a gate electrode material to form a gate structure.

Abstract: A semiconductor substrate shaped to have a curved surface profile by anodization. Prior to being anodized, the substrate is finished with an anode pattern on its bottom surface so as to be consolidated into a unitary structure in which the anode pattern is precisely reproduced on the substrate. The anodization utilizes an electrolytic solution which etches out an oxidized portion as soon as it is formed as a result of the anodization, to thereby develop a porous layer in a pattern in match with the anode pattern. The anode pattern brings about an in-plane distribution of varying electric field intensity by which the porous layer develops into a shape complementary to a desired surface profile. Upon completion of the anodization, the curves surface is revealed on the surface of the substrate by etching out the porous layer and the anode pattern from the substrate.

Abstract: A manufacture method for a ZnO based semiconductor device includes the steps of: (a) preparing a ZnO based semiconductor wafer including a ZnO based semiconductor substrate having a wurzeit structure with a +C plane on one surface and a ?C plane on an opposite surface, a first ZnO based semiconductor layer having a first conductivity type epitaxially grown above the +C plane of the ZnO based semiconductor substrate, and a second ZnO based semiconductor layer having a second conductivity type opposite to the first conductivity type epitaxially grown above the first semiconductor layer; and (b) wet-etching the ZnO based semiconductor wafer with acid etching liquid to etch the ?C plane of the ZnO based semiconductor substrate

Abstract: An etch stop layer is formed over a first structure by depositing a metal oxide material over the first structure and annealing the deposited metal oxide material. A second structure is formed over the etch stop layer, and a formation is etched through the second structure using the etch stop layer as an etch stop.

Abstract: A highly selective metal wet etchant with an active ingredient comprising one or more types of molecules having two or more oxygen atoms is described. In one embodiment, the wet etchant is utilized to pattern a metal layer in a semiconductor structure. In another embodiment, a highly selective metal wet etchant with an active ingredient comprising one or more types of molecules having two or more oxygen atoms is used to pattern a metal gate electrode in a replacement gate processing scheme.

Abstract: A pattern of conductive ink is disposed on the topside of the unsingulated integrated circuits of a wafer, and, typically after wafer probing, the pattern of conductive ink is removed. The conductive ink pattern provides an electrical pathway between bond pads on an integrated circuit and large contact pads disposed on the topside of the integrated circuit. Each of the large contact pads is much greater in area than the corresponding bond pads, and are spaced apart so that the pitch of the large contact pads is much greater than that of the bond pads. In one aspect of the present invention, the conductive ink includes a mixture of conductive particles and wafer bonding thermoset plastic. In another aspect of the present invention, the conductive ink is heated and disposed on a wafer by an ink jet printing system.

Abstract: Embodiments of the invention generally relate to apparatuses and methods for producing epitaxial thin films and devices by epitaxial lift off (ELO) processes. In one embodiment, a method for forming thin film devices during an ELO process is provided which includes coupling a plurality of substrates to an elongated support tape, wherein each substrate contains an epitaxial film disposed over a sacrificial layer disposed over a wafer, exposing the substrates to an etchant during an etching process while moving the elongated support tape, and etching the sacrificial layers and peeling the epitaxial films from the wafers while moving the elongated support tape. Embodiments also include several apparatuses, continuous-type as well as a batch-type apparatuses, for forming the epitaxial thin films and devices, including an apparatus for removing the support tape and epitaxial films from the wafers on which the epitaxial films were grown.

Abstract: A flexible electronic device excellent in heat liberation characteristics and toughness and a production method for actualizing thereof in low cost and with satisfactory reproducibility are provided. A protection film is adhered onto the surface of a substrate on which surface a thin film device is formed. Successively, the substrate is soaked in an etching solution to be etched from the back surface thereof so as for the residual thickness of the substrate to fall within the range larger than 0 ?m and not larger than 200 ?m. Then, a flexible film is adhered onto the etched surface of the substrate, and thereafter the protection film is peeled to produce a flexible electronic device.

Abstract: The present embodiments relate to an etchant and a method of fabricating an electric device including a thin film transistor. The etchant includes a fluorine ion (F?) source, hydrogen peroxide (H2O2), a sulfate, a phosphate, an azole-based compound, and a solvent. The etchant and method of fabricating an electric device including a thin film transistor, can etch a multi-layered film including copper layer, and a titanium or titanium alloy layer in a batch and can provide a thin film transistor having a good pattern profile at high yield. When reusing the etchant, uniform etching performance can be maintained with a long replacement period of the etchant, and therefore costs can be saved.

Abstract: There are provided an inspection method of a compound semiconductor substrate that can have the amount of impurities at the surface of the compound semiconductor substrate reduced, a compound semiconductor substrate, a surface treatment method of a compound semiconductor substrate, and a method of producing a compound semiconductor crystal. In the inspection method of the surface of the compound semiconductor substrate, the surface roughness Rms of the compound semiconductor substrate is measured using an atomic force microscope at the pitch of not more than 0.4 nm in a scope of not more than 0.2 ?m square. The surface roughness Rms of the compound semiconductor substrate measured by the inspection method is not more than 0.2 nm.

Abstract: A method for fabricating a integrated circuit with improved performance is disclosed. The method comprises providing a substrate; forming a hard mask layer over the substrate; forming protected portions and unprotected portions of the hard mask layer; performing a first etching process, a second etching process, and a third etching process on the unprotected portions of the hard mask layer, wherein the first etching process partially removes the unprotected portions of the hard mask layer, the second etching process treats the unprotected portions of the hard mask layer, and the third etching process removes the remaining unprotected portions of the hard mask layer; and performing a fourth etching process to remove the protected portions of the hard mask layer.

Abstract: In the ozone water treatment process, the silicon wafer is treated with the first ultra-pure water that includes ozone. The first ultra-pure water is refined by the ultraviolet ray sterilization method. The first ultra-pure water includes total organic carbon content of more than 1 ?g/liter and not more than 20 ?g/liter, so that the silicon wafer of the predetermined degree of cleanliness is obtained. The silicon wafer is treated by using the second ultra-pure water that has a lower TOC value than the first ultra-pure water in the ultra-pure water rinsing process (including the chemical solution cleaning process as required). The second ultra-pure water is refined by the ultraviolet ray oxidization method, and includes total organic carbon content with a concentration of 1 ?g/liter or less. Thus the silicon wafer of the predetermined degree of cleanliness is obtained.

Abstract: A wet cleaning process is provided. The wet cleaning process includes at least one first rinse process and a second rinse step. The first rinse step includes rinsing a substrate using deionized water containing CO2, and then draining the water containing CO2 to expose the substrate in an atmosphere of CO2. The second rinse step includes rinsing the substrate using deionized water containing CO2.

Abstract: The present invention provides a method for manufacturing an integrated circuit. In one embodiment, the method includes etching one or more openings within a substrate using an etch tool, and subjecting the one or more openings to a post-etch clean, wherein a delay time exists between removing the substrate from the etch tool and the subjecting the one or more opening to the post-etch clean. This method may further include exposing the substrate having been subjected to the post-etch clean to a rinsing agent, wherein a resistivity of the rinsing agent is selected based upon the delay time.

Abstract: A method for manufacturing a shallow trench isolation (STI) structure is provided. In the method, a substrate is initially provided. Then, a patterned pad layer and a patterned mask layer are successively formed in order on the substrate. After that, a portion of the substrate is removed by using the patterned mask layer and the patterned pad layer as a mask to form trenches in the substrate. Next, a first insulation layer is formed in the trenches. Afterwards, a protection layer is conformally formed on the substrate. Then, a second insulation layer is formed on the protection layer above the first insulation layer. Next, the patterned mask layer and the patterned pad layer are removed. Finally, a portion of the protection layer and the second insulation layer are removed.

Abstract: A method for cleaning structured surfaces of semiconductor components to remove photoresist and etching residues after the etching of the surface, comprising: a) treatment of the surface with an acidic aqueous solution comprising one or more acids and one or more oxidizing agents, b) removal of the photoresist and c) washing with demineralized water in the stated sequence.

Abstract: A manufacturing apparatus for a semiconductor device, treating a SiN film formed on a wafer with phosphoric acid solution, including a processing bath to store phosphoric acid solution provided for treatment of the wafer, a control unit for calculating integrated SiN etching amount of the phosphoric acid solution, determining necessity of quality adjustment of the phosphoric acid solution, based on correlation between the integrated SiN etching amount calculated and etching selectivity to oxide film, and calculating a quality adjustment amount of the phosphoric acid solution as needed, and also including a mechanism to adjust the quality of the phosphoric acid solution based on the quality adjustment amount calculated.

Abstract: The present invention provides a manufacturing method of a substrate for an ink jet head including forming an ink supply opening to a silicon substrate, including (a) forming, at the back surface of the silicon substrate, an etching mask layer, which has an opening that is asymmetric with a center line, extending in the longitudinal direction, of an area on the surface of the silicon substrate where the ink supply opening is to be formed; (b) forming a non-through hole on the silicon substrate via the opening on the etching mask layer; and (c) forming the ink supply opening by performing a crystal anisotropic etching to the silicon substrate from the opening.

Abstract: A fine treatment agent according to the present invention is a fine treatment agent for the fine treatment of a multilayer film, including a tungsten film and a silicon oxide film comprising at least one from among hydrogen fluoride, nitric acid, ammonium fluoride and ammonium chloride. Thus, a fine treatment agent which makes fine treatment on a multilayer film, including a tungsten film and a silicon oxide film, possible by controlling the etching rate and a fine treatment method using the same can be provided.

Abstract: A substrate chucking member includes a substrate supporting member and a rotation adjustment unit. The supporting member includes a rotatable supporting plate to load a substrate, and chucking pins disposed at the supporting plate for spacing the substrate off the top of the supporting plate by supporting the edge of the substrate from a side of the substrate. Each of the chucking pins is rotatable for rotating the substrate supported on the chucking pins. The rotation adjustment unit is disposed under the supporting plate for adjusting rotation of the chucking pins. During a process, since a substrate is rotated by the chucking pins to vary points of the substrate making contact with the chucking pins, positions of the substrate where a process liquid falls after colliding with the chucking pins can be continuously varied. Therefore, the substrate can be processed without defects at an end part of the substrate.

Abstract: According to the present invention, high-k film can be etched to provide a desired geometry without damaging the silicon underlying material. A silicon oxide film 52 is formed on a silicon substrate 50 by thermal oxidation, and a high dielectric constant insulating film 54 comprising HfSiOx is formed thereon. Thereafter, polycrystalline silicon layer 56 and high dielectric constant insulating film 54 are selectively removed in stages by a dry etching through a mask of the resist layer 58, and subsequently, the residual portion of the high dielectric constant insulating film 54 and the silicon oxide film 52 are selectively removed by wet etching through a mask of polycrystalline silicon layer 56. A liquid mixture of phosphoric acid and sulfuric acid is employed for the etchant solution. The temperature of the etchant solution is preferably equal to or lower than 200 degree C., and more preferably equal to or less than 180 degree C.

Abstract: A method for manufacturing a semiconductor device is disclosed including determining a dimension or other physical characteristic of a pattern in a layer of material that is disposed on a workpiece, and etching the layer of material using information that is related to the dimension. A system is also disclosed for manufacturing a semiconductor device including a first etch system configured to etch a layer to define a pattern in the layer, and a second etch system configured to measure a physical characteristic of the pattern, determine an etch control parameter based on the physical characteristic, and etch the layer in accordance with the etch control parameter.

Abstract: An electrophoretic display device includes: a transparent substrate positioned at a display side and having a transparent front electrode; a wiring substrate disposed to face the transparent substrate and having a field applying unit; a spacer disposed between the transparent substrate and the wiring substrate and having a plurality of accommodating holes with upper and lower portions open; and a plurality of microcapsules respectively positioned in the plurality of accommodating holes and including a dispersion solvent encapsulated with a plurality of charged particles contained therein, wherein the accommodating holes comprise upper holes with a width for receiving the microcapsules and lower holes allowing the microcapsules to be mounted thereon.

Abstract: A method for cleaning structured surfaces of semiconductor components to remove photoresist and etching residues after the etching of the surface, comprising: a) removal of the photoresist, b) treatment of the surface with an acidic aqueous solution comprising one or more acids and one or more oxidizing agents, c) treatment of the surface with an alkaline aqueous solution and d) washing of the surface with demineralized water, the steps a), b) and c) being effected before step d).

Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.

Abstract: A method for forming a micro-pattern in a semiconductor device includes forming a hard mask layer and a sacrificial layer over an etch target layer, forming a plurality of openings having a hole shape in the sacrificial layer, forming spacers over inner sidewalls of the openings to form first hole patterns inside the openings, etching the sacrificial layer outside of the sidewalls of the openings using the spacers in a manner that the sacrificial layer in a first area remains partially and the sacrificial layer in a second area is removed to form second hole patterns, wherein the first area is smaller than the second area, and etching the hard mask layer using the remaining sacrificial layer and the spacers including the first and second hole patterns.

Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.

Abstract: The present invention provides an etching solution in which a change in the composition due to the evaporation of the chemical solution or the like is small, thus reducing the frequency with which the chemical solution must be replaced, and in which the time-dependent change in etch rate is also small, thus allowing uniform etching of a silicon oxide film. Specifically, the present invention relates to an etching solution, a process of producing the same, and an etching process using the same, in which the etching solution includes hydrofluoric acid (a), ammonium fluoride (b), and salt (c) formed between hydrogen fluoride and a base having a boiling point higher than that of ammonia; the concentration of ammonium fluoride (b) is not higher than 8.2 mol/kg, and the total amount of ammonium fluoride (b) and salt (c) formed between hydrogen fluoride and a base having a boiling point higher than that of ammonia is not less than 9.5 mol/kg.

Abstract: A method for manufacturing a semiconductor device is provided. In particular, a method for removing unwanted material layers from an edge and lower bevel region of a wafer is provided. The method includes performing a first etch of an edge region of a wafer having material layers formed thereon, coating the wafer with a photoresist layer, and patterning the photoresist layer to expose at least the edge and an upper bevel region of the wafer for etching the material layers remaining after performing the first etch.

Abstract: Provided herein are chemical mechanical polishing (CMP) slurries and methods for producing the same. Embodiments of the invention include CMP slurries that include (a) a metal oxide; (b) a quaternary ammonium base; and (c) a fluorinated surfactant. In some embodiments, the fluorinated surfactant is a non-ionic perfluoroalkyl sulfonyl compound. Also provided herein are methods of polishing a polycrystalline silicon surface, including providing a slurry composition according to an embodiment of the invention to a polycrystalline silicon surface and performing a CMP process to polish the polycrystalline silicon surface.

Abstract: A method for producing a semiconductor device includes the steps of forming a predetermined device in a device layer grown on a semiconductor substrate with a sacrificial layer provided therebetween; and removing the sacrificial layer by etching to separate the semiconductor substrate from the device layer while a supporting substrate is bonded to the side of the device layer, wherein in the step of removing the sacrificial layer, a groove extending from the device layer to the sacrificial layer is formed before the sacrificial layer is removed, and the etching solution is allowed to penetrate to the sacrificial layer through the groove.

Abstract: There is provided a method of forming a pattern on a group III nitride semiconductor substrate. A method of forming a pattern on a group III nitride semiconductor substrate according to an aspect of the invention may include: irradiating a laser beam onto at least one first region for preventing etching in a group III nitride semiconductor substrate; and etching at least one second region exclusive of the first region using the first region irradiated with the laser beam as a mask.

Abstract: A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.

Abstract: A method of substantially uniformly etching oxides from non-homogeneous substrates is provided. The method utilizes a substantially non-aqueous etchant including an organic solvent and a fluorine-containing compound. The fluorine containing compound may include HF, HF:NH4F, (NH4)HF2, or TMAF:HF and mixtures thereof. The etchant may be applied to chemically non-homogeneous layers such as shallow trench isolation fill oxide layers, or to layers having a non-homogeneous composition or density at different depths within the layers, such as spin-on-glass or spin-on-dielectric films.

Abstract: A method of improving the flatness of a microdisplay surface is disclosed. A reflective mirror layer and a raised layer are formed in order on substrate. The raised layer may comprise a buffer layer and a stop layer, and pixel electrode areas are defined therefrom and gaps are consequently formed among the pixel electrode areas. A dielectric layer is deposited on the pixel electrode areas and fills the gaps. A dielectric layer is partially removed such that the portion on the raised layer is completely removed and the portion filling the gaps are partially removed, thereby the remaining dielectric layer in the gaps has a height not lower than the top of the mirror layer. Thereafter, the raised layer is entirely or partially removed. A transparent conductive layer may be further combined onto the semiconductor substrate and a liquid crystal filling process is performed to form an LCoS display panel.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming a first opening pattern and a second opening pattern larger in size than the first opening pattern in a first film formed above a semiconductor substrate and in a second film on the first film, the second film comprising a material different from the first film; forming a blocking film on the second film, the blocking film substantially blocking only the first opening pattern between the first and second opening patterns of the second film; and selectively applying isotropic etching to an inner side face of the second opening pattern of the first film after forming the blocking film, thereby enlarging only the size of the second opening pattern between the size of the first opening pattern and the size of the second opening pattern of the first film.

Abstract: A mirror package is provided which can reflect a laser to an external screen according to a video signal when the laser enters from outside, and a method of manufacturing the mirror package. The mirror is packaged with a glass to protect from external contamination, an inlet and an outlet are formed by, for example, an anisotropic etching on the glass and blocks a reflected light reflected from the glass. The mirror package is formed as a set, combined on a wafer using a wafer level package and diced to individual chips. Subsequently, a productivity is improved and a ghost image or phenomenon is removed.