Abstract: A stacked structure including a soluble organic semiconductor material and a water soluble photosensitive material is provided. The water soluble photosensitive material is disposed on the surface of the soluble organic semiconductor material.

Abstract: A method of manufacturing a flash memory device and devices thereof, which may be capable of preventing damage to a gate. A method of manufacturing a flash memory device may include preparing a semiconductor substrate having an active region defined by a device separator. A method of manufacturing a flash memory device may include forming a floating gate, a oxide-nitride-oxide (ONO) layer and/or a control gate layer on and/or over a substrate. A method of manufacturing a flash memory device may include forming a low temperature oxide (LTO) film on and/or over a control gate, etching a LTO film to expose a desired part of a control gate, using a LTO film as a mask to etch a desired part of each of a floating gate layer, a ONO layer and/or a control gate to form a gate pattern, and/or substantially removing a LTO film by wet etching.

Abstract: Substrate treatment equipment includes a wet treatment apparatus for treating a substrate with a solution (liquid), a drying (treatment) apparatus discrete from the wet treatment apparatus and for drying the substrate using a supercritical fluid, and a transfer device. The substrate is extracted by the transfer device from the wet treatment apparatus after the substrate has been treated and the substrate is transferred by the device while wet to the dry treatment apparatus. To this end, various elements/methods may be used to keep the substrate wet or wet the substrate. In any case, the substrate is prevented from drying naturally, i.e., from air-drying, as the substrate is being transferred from the wet treatment apparatus to the drying apparatus. Thus, equipment and method prevent defects such as water spots and the leaning of fine structures on the substrate.

Abstract: An acidic etcher solution for etching a substrate's surface. The acidic etcher solution includes an acid and a pH indicator, the pH indicator having at least one color transition at a pH below 7. The acidic etcher solution having an initial color at an initial pH when applied to the surface to allow determination of the evenness of the coating and the etcher having a second color at a second pH higher than the first pH wherein visual inspection allows for a determination that the etcher is substantially finished reacting.

Abstract: Disclosed are cleaning solvents and cleaning methods for metallic compounds deposited on the equipment that supplies organometallic compounds to the manufacturing tool in the photovoltaic industry or the semiconductor industry. The cleaning solvents and the cleaning methods disclosed not only selectively remove the metallic compound without corroding the equipment, but also improve the ordinary cleaning process. Moreover, the cleaning solvents and the cleaning methods disclosed improve maintenance costs for the supply system because the equipment may be cleaned without being detached from the supply system.

Abstract: A first oxide film and a second oxide film 16 are formed in a first region 13a and a second region 13b, respectively, on the surface of the semiconductor substrate 10, via thermal oxidization method, and the first oxide film is removed while the second oxide film 16 is covered with the resist layer 18 formed thereon, and then the resist layer 18 is removed with a chemical solution containing an organic solvent such as isopropyl alcohol as a main component. Subsequently, a third oxide film 22 having different thickness than the second oxide film 16 is formed in the first region 13a.

Abstract: A benign all-wet process for stripping photoresist after an implantation process performed to fabricate a device is provided. A method of stripping implanted resist includes a first step of disrupting a crust formed on the surface of the resist during the implantation process and then removing the underlying resist. In accordance with embodiments of the invention, a catalyzed hydrogen peroxide (CHP) chemical system is used to disrupt the crust and allow for low temperature (<180° C.) removal of the underlying resist.

Abstract: Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the invention use a self-templating or multilayer approach to induce ordering of a self-assembling block copolymer film to an underlying base film to produce a multilayered film having an ordered array of nanostructures that can be removed to provide openings in the film which, in some embodiments, can be used as a template or mask to etch openings in an underlying material layer.

Abstract: As a washing liquid and an etching solution for semiconductor substrates and glass substrates, alkaline aqueous solutions are used; however, since metal impurities are adsorbed on the substrate surface during processing, a next process for removing the adsorbed metal impurities is required. In addition, when a washing liquid is used, it cannot wash off metal impurities; therefore an acid washing process is required. The present invention provides an aqueous solution composition, which is an alkaline aqueous solution but is able to prevent adsorption of metal impurities, which also has cleaning capability. By means of an alkaline aqueous solution composition used for washing or etching a substrate, the composition comprising a chelating agent represented by the general formula (1): and an alkaline component, the adsorption of metal impurities on the substrate is prevented, and metal impurities adsorbed on the substrate are washed off.

Abstract: It is an object of the present invention to provide a semiconductor device including a wiring having a preferable shape. A manufacturing method includes the steps of forming a first conductive layer connected to an element and a second conductive layer thereover; forming a resist mask over the second conductive layer; processing the second conductive layer by dry etching with the use of the mask; and processing the first conductive layer by wet etching with the mask left, wherein the etching rate of the second conductive layer is higher than that of the first conductive layer in the dry etching, and wherein the etching rate of the second conductive layer is the same as or more than that of the first conductive layer in the wet etching.

Abstract: A method is provided for selectively etching native oxides or other contaminants to metal nitrides and metal oxides during manufacture of a semiconductor device. The method utilizes a substantially non-aqueous etchant which includes a source of fluorine ions. In a preferred embodiment, the etchant comprises H2SO4 and HF. The etchant selectively etches native and doped oxides or other contaminants without excessively etching metal nitrides or metal oxides on the substrate or on adjacent exposed surfaces.

Abstract: Disclosed herein is a fabrication method of a semiconductor device to order to increase an operation liability of the semiconductor device. A method for fabricating a semiconductor device comprises forming a recess in a semiconductor substrate, forming a word line in a lower part of the recess, oxidizing a top portion of the word line, and depositing an insulating material in a remained part of the recess.

Abstract: The present invention provides an etching solution for revealing defects in a germanium layer, a method for revealing defects in a germanium layer using such an etching solution and to a method for making such an etching solution. The etching solution according to embodiments of the present invention is able to exhibit an etch rate of between 4 nm·min?1 and 450 nm·min?1, which makes it suitable to be used for revealing defects in a thin layer of germanium, i.e. in a layer of germanium with a thickness of between 20 nm and 10 ?m, for example between 20 nm and 2 ?m, between 20 nm and 1 ?m or between 20 nm and 200 nm.

Abstract: In an etching composition for an under-bump metallurgy (UBM) layer and a method of forming a bump structure, the etching composition includes about 40% by weight to about 90% by weight of hydrogen peroxide (H2O2), about 1% by weight to about 20% by weight of an aqueous basic solution including ammonium hydroxide (NH4OH) or tetraalkylammonium hydroxide, about 0.01% by weight to about 10% by weight of an alcohol compound, and about 2% by weight to 30% by weight of an ethylenediamine-based chelating agent. The etching composition may effectively etch the UBM layer including titanium or titanium tungsten and remove impurities. A method of forming a bump structure may employ such an etching composition.

Abstract: A semiconductor process is disclosed. The semiconductor process includes the steps of: providing a substrate having a specific area defined thereon; and performing an etch process by using an etchant comprising H2O2 to etch the specific area for forming a recess.

Abstract: A semiconductor wet etchant includes deionized water, a fluorine-based compound, an oxidizer and an inorganic salt. A concentration of the fluorine-based compound is 0.25 to 10.0 wt % based on a total weight of the etchant, a concentration of the oxidizer is 0.45 to 3.6 wt % based on a total weight of the etchant, and a concentration of the inorganic salt is 1.0 to 5.0 wt % based on a total weight of the etchant. The inorganic salt comprises at least one of an ammonium ion (NH4+) and a chlorine ion (Cl?).

Abstract: An exemplary method of etching sacrificial layer includes steps of: providing a substrate formed with a sacrificial layer and defined with a first region and a second region, the sacrificial layer disposed in both the first and second regions; forming a hard mask covering the first region while exposing the second region; performing a first etching process on the sacrificial layer to thin the sacrificial layer while forming a byproduct film overlying the thinned sacrificial layer; performing a second etching process on the byproduct film to remove a portion of the byproduct layer for exposing a portion of the thinned sacrificial layer, while another portion of the byproduct film disposed on sidewalls of the thinned sacrificial layer being remained; and performing a third etching process on the thinned sacrificial layer, to remove the portion of the thinned sacrificial layer exposed in the second etching process.

Abstract: The present invention relates to a semiconductor device and a method of manufacture thereof, particularly, to a semiconductor device including a vertical type gate and a method of forming the same. According to the present invention, a semiconductor device includes a vertical pillar which is protruded from a semiconductor substrate, has a vertical channel, and has a first width; an insulating layer which has a second width smaller than the first width, provided in both sides of the vertical pillar which is adjacent in a first direction; and a nitride film provided in a side wall of the insulating layer.

Abstract: Embodiments provide an LED comprising a quantum well region operable to generate light and a substrate having an interface with the quantum well region, wherein light generated by the quantum well region traverses the interface to enter the substrate and exit the LED through an exit face of the substrate. The exit face may be opposite from and a distance from the interface, with some portion or all of this LED being shaped to optimize the light extraction efficiency of the device. The exit face can have at least 70% of a minimum area necessary to conserve brightness for a desired half-angle of light. Sidewalls of the LED may be positioned and shaped so that rays incident on a sidewall reflect to the exit face with an angle of incidence at the exit face at less than or equal to a critical angle at the exit face.

Abstract: There is provided a substrate treatment method for performing treatment by feeding a chemical liquid to a surface of a substrate, in which, before feeding the chemical liquid to a predetermined area of the substrate, a liquid substance having a resistivity lower than that of the chemical liquid is fed to the surface of the substrate so that the liquid substance wets at least the predetermined area, and then, the chemical liquid is fed to the predetermined area so that the treatment is performed on the substrate with the chemical liquid fed to the surface of the substrate.

Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.

Abstract: During the fabrication of sophisticated metallization systems of semiconductor devices, material deterioration of conductive cap layers may be significantly reduced by providing a noble metal on exposed surface areas after the patterning of the corresponding via openings. Hence, well-established wet chemical etch chemistries may be used while not unduly contributing to process complexity.

Abstract: Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and a conductive region, introducing a hydroquinone to the substrate after cleaning the substrate using the preclean operation, and forming a capping layer over the conductive region of the substrate after introducing the hydroquinone.

Abstract: In an inventive resist removing method, sulfuric acid and hydrogen peroxide water are supplied to a surface of a substrate to remove a resist from the substrate surface. Thereafter, hydrogen peroxide water is supplied to the substrate surface to remove the sulfuric acid from the substrate surface.

Abstract: A fabrication method produces a mechanically patterned layer of group III-nitride. The method includes providing a crystalline substrate and forming a first layer of a first group III-nitride on a planar surface of the substrate. The first layer has a single polarity and also has a pattern of holes or trenches that expose a portion of the substrate. The method includes then, epitaxially growing a second layer of a second group III-nitride over the first layer and the exposed portion of substrate. The first and second group III-nitrides have different alloy compositions. The method also includes subjecting the second layer to an aqueous solution of base to mechanically pattern the second layer.

Abstract: A method for processing a substrate includes receiving a substrate and processing the substrate using a first fluid meniscus and a second fluid meniscus. The first fluid meniscus and the second fluid meniscus are applied to a surface of the substrate such that the first fluid meniscus is spaced apart from the second fluid meniscus by a transition region. A saturated gas chemistry is applied to the surface of the substrate at the transition region. The saturated gas chemistry is configured to maintain moisture in the transition region so as to prevent drying of the surface of the substrate in the transition region, before the second fluid meniscus is applied to the surface of the substrate.

Abstract: A monolithic, multi-bandgap, tandem solar photovoltaic converter has at least one, and preferably at least two, subcells grown lattice-matched on a substrate with a bandgap in medium to high energy portions of the solar spectrum and at least one subcell grown lattice-mismatched to the substrate with a bandgap in the low energy portion of the solar spectrum, for example, about 1 eV.

Abstract: Methods of making current tracks for semiconductors are disclosed. The methods involve selectively depositing a hot melt ink resist containing rosin resins and waxes on a silicon dioxide or silicon nitride layer coating a semiconductor followed by etching uncoated portions of the silicon dioxide or silicon nitride layer with an inorganic acid etch to expose the semiconductor and simultaneously inhibit undercutting of the hot melt ink resist. The etched portions may then be metallizaed to form a plurality of substantially uniform current tracks.

Abstract: The present invention relates to aqueous compositions comprising amidoxime compounds and methods for cleaning plasma etch residue from semiconductor substrates including such dilute aqueous solutions. The compositions of the invention may optionally contain one or more other acid compounds, one or more basic compounds, and a fluoride-containing compound and additional components such as organic solvents, chelating agents, amines, and surfactants. The invention also relates to a method of removing residue from a substrate during integrated circuit fabrication.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF.

Abstract: A semiconductor process includes the following steps. Firstly, a conductive substrate is provided. Then, at least one insulating pattern is formed on the conductive substrate. Thereafter at least one metal pattern is formed on the insulating pattern. After that, a passivation layer is formed on the conductive substrate to cover the metal pattern by an electroplating process.

Abstract: A mixture of perhalogenic acid and sulfuric acid is unexpectedly stable at high temperatures and is effective in stripping photoresists, including difficult to treat ion-implanted photoresists, with short processing times. In use, no decomposition of the mixture is observed up to a temperature of 145° C. In the mixture, the sulfuric acid is highly purified and has a concentration of 96 wt % or greater. The perhalogenic acid is preferably H5IO6.

Abstract: A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon.

Abstract: A method for producing a silicon substrate for solar cells is provided. The method includes performing a saw damage removal (SDR) and surface macro-texturing on a silicon substrate with acids solution, so that a surface of the silicon substrate becomes an irregular surface. Thereafter, a metal-activated selective oxidation is performed on the irregular surface with an aqueous solution containing an oxidant and a metal salt, in which the oxidant is one selected from persulfate ion, permanganate ion, bichromate ion, and a mixture thereof. Afterwards, the irregular surface is etched with an aqueous solution containing HF and H2O2 so as to form a nano-texturized silicon substrate.

Abstract: A slurry composition includes about 4.25 to about 18.5 weight percent of an abrasive, about 80 to about 95 weight percent of deionized water, and about 0.05 to about 1.5 weight percent of an additive. The slurry composition may further include a surfactant. In a polishing method using the slurry composition, a polysilicon layer may be rapidly polished, and also dishing and erosion of the polysilicon layer may be suppressed.

Abstract: An object is to provide a single crystal semiconductor layer with extremely favorable characteristics without performing CMP treatment or heat treatment at high temperature. Further, an object is to provide a semiconductor substrate (or an SOI substrate) having the above single crystal semiconductor layer. A first single crystal semiconductor layer is formed by a vapor-phase epitaxial growth method on a surface of a second single crystal semiconductor layer over a substrate; the first single crystal semiconductor layer and a base substrate are bonded to each other with an insulating layer interposed therebetween; and the first single crystal semiconductor layer and the second single crystal semiconductor layer are separated from each other at an interface therebetween so as to provide the first single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween. Thus, an SOI substrate can be manufactured.

Abstract: The present invention relates to systems and methods associated with selective wet etching and textured surface planarization. The systems and methods described herein can be used to etch a component of a multi-layer stack, such as a GaN layer. In some embodiments, the multi-layer stack can include a substrate having a patterned surface and a light generating region. The substrate can be removed from the first multi-layer stack to form a second multi-layer stack. In some embodiments, the pattern on the surface of the substrate can leave behind a pattern on a surface of the second multi-layer stack. Accordingly, in some cases, the surface of the second multi-layer stack can be wet etched, for example, to smoothen the surface. In some embodiments, removing the substrate can expose an N-face of a GaN layer, and the wet etch can be performed such that the N-face of the GaN layer is etched. In some embodiments, the multi-layer stack includes a light generating region and can be part of a light emitting device.

Abstract: A method of manufacturing a semiconductor device may include, but is not limited to the following processes. A first recess is formed in a semiconductor substrate to define an active region on the semiconductor substrate. The active region includes a protruding portion of the semiconductor substrate surrounded by the first recess. The protruding portion has a sloped side surface. A first insulating film that fills the first recess is formed. A gate recess is formed in the active region to form a thin film portion that upwardly extends. The thin film portion is positioned between the gate recess and the first insulating film. The thin film portion is a part of the protruding portion. An upper part of the thin film portion is removed by wet-etching to adjust a height of the thin film portion.

Abstract: A method of forming a light conversion element includes providing a semiconductor construction having a first photoluminescent element epitaxially grown together with a second photoluminescent element. A first region is etched in the first photoluminescent element from a first side of the semiconductor construction and a second region is etched in the second photoluminescent element from a second side of the semiconductor construction. In some embodiments the wavelength converter is attached to an electroluminescent element, such as a light emitting diode (LED).

Abstract: A wafer thinning apparatus for treating wafers each having at least a circuit-forming surface thereof protected, by immersing the wafers in a treating solution. The apparatus includes a support table for receiving, as placed thereon, containers each containing a plurality of wafers in one of groups into which the wafers are sorted according to predetermined ranges of thickness, a treating tank for storing the treating solution and receiving the containers, a transport mechanism for transporting the containers between the support table and the treating tank, and a control unit for controlling the transport mechanism to transport the containers successively to the treating tank, and for changing an immersion time of the containers in the treating tank for each group.

Abstract: To grasp a removable particle contamination and appropriately removing a particle contamination exposing from a surface of a semiconductor layer, this production method of the semiconductor optical device includes a surface treatment step in which particle contaminations removed from a surface of a cap layer 5 by etching are limited to particle contaminations A1, C2 higher than the thickness of a resist layer 22 formed on the surface of the cap layer 5. Therefore, the heights of removable particle contaminations can be preliminarily grasped based on the thickness of the resist layer 22 formed, whereby the particle contaminations exposing from the surface of the cap layer 5 can be appropriately removed by etching just enough. By repeating steps S11-S17 while changing the thickness of the resist layer 22, it is feasible to prevent unnecessary etching of a wafer and to remove the particle contaminations more completely.

Abstract: The embodiments of methods described in this disclosure for trimming back nitride spacers for replacement gates allows the hard mask layers (or hard mask) to protect the polysilicon above the high-K dielectric during trim back process. The process sequence also allows determining the trim-back amount based on the process uniformity (or control) of nitride deposition and nitride etchback (or trimming) processes. Nitride spacer trim-back process integration is critical to avoid creating undesirable consequences, such as silicided polyisicon on top of high-K dielectric described above. The integrated process also allows widening the space between the gate structures to allow formation of silicide with good quality and allow contact plugs to have sufficient contact with the silicide regions. The silicide with good quality and good contact between the contact plugs and the silicide regions increase the yield of contact and allows the contact resistance to be in acceptable and workable ranges.

Abstract: A method of simultaneously cleaning inorganic and organic contaminants from semiconductor wafers and micro-etching the semiconductor wafers. After the semiconductor wafers are cut or sliced from ingots, they are contaminated with cutting fluid as well as metal and metal oxides from the saws used in the cutting process. Aqueous alkaline cleaning and micro-etching solutions containing alkaline compounds and mid-range alkoxylates are used to simultaneously clean and micro-etch the semiconductor wafers.

Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor memory device. A contact plug is formed by wet etching. An aspect ratio of SAC is decreased and SAC fail is reduced so that a process margin is secured. The semiconductor device includes a semiconductor substrate comprising an active region and a device isolation layer defining the active region, a conductive pattern formed on the semiconductor substrate, and a nitride layer formed on the semiconductor substrate perpendicularly to the conductive pattern.

Abstract: After a liquid chemical treatment is finished, in parallel with a washing away treatment and/or a drying treatment, by spraying from a nozzle for a cleaning liquid supplied by a cleaning line to an outer surface of a nozzle for a liquid chemical, crystals and the like of components of the liquid chemical adhered on the outer surface of the nozzle are removed. In the cleaning treatment, a spraying time of the cleaning liquid is five seconds to ten seconds. In addition, the components of the cleaning liquid is not specifically limited, however, since ammonium phosphate tends to be solved in purified water, if a liquid chemical containing ammonium phosphate is used, it is preferable to use purified water as the cleaning liquid. Depending on the components and the like of the liquid chemical, a solution that can solve the crystals and the like may be used in stead.

Abstract: The present invention is directed to provide an etching agent for a semiconductor substrate, which is capable of etching a titanium (Ti)-based metal film or a tungsten (W)-based metal film on a semiconductor substrate and an etching method using relevant etching agent, and relates to a liquid for preparing the etching agent for a semiconductor substrate composed of a solution comprising (A) hydrogen peroxide, (B) a phosphonic acid chelating agent having a hydroxyl group, (C) a basic compound, and (D-1) a copper anticorrosive and/or (D-2) 0.

Abstract: An inkjet ink comprises phosphoric acid; one or more solvents for the phosphoric acid, preferably ethyl lactate and water; and one or more aprotic organic sulfoxides, preferably dimethyl sulfoxide (DMSO) or dimethyl sulfone (SMSO2). The inks do not leave a carbon residue on heating and so are suited to use in etching and/or doping silicon wafers, e.g. in the production of crystalline silicon solar cells.

Abstract: A method for manufacturing an array substrate of liquid crystal display is performed with the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist layer; performing a first ashing process on the photoresist layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist layer.

Abstract: As a method for constituting a pre-metal interlayer insulating film, such method is considered as forming a CVD silicon oxide-based insulating film having good filling properties of a silicon oxide film by ozone TEOS, reflowing the film at high temperatures to planarize it, then stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and, further, planarizing it by CMP. However, it was made clear that, in a process for forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects. In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the remaining ozone TEOS film, and then the plasma TEOS film is planarized by CMP.